[llvm-branch-commits] [clang-tools-extra] a96af6c - Revert "[clang-tidy] fix misc-const-correctness to work with function-try-blo…"

2024-07-22 Thread via llvm-branch-commits
Author: Piotr Zegar Date: 2024-07-23T08:46:14+02:00 New Revision: a96af6c18ea45269c4d2e1fd762a14d763be0358 URL: https://github.com/llvm/llvm-project/commit/a96af6c18ea45269c4d2e1fd762a14d763be0358 DIFF: https://github.com/llvm/llvm-project/commit/a96af6c18ea45269c4d2e1fd762a14d763be0358.diff L

[llvm-branch-commits] [llvm] [BOLT] Match blocks with pseudo probes (PR #99891)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
@@ -266,6 +287,47 @@ class StaleMatcher { } return BestBlock; } + // Uses pseudo probe information to attach the profile to the appropriate + // block. + const FlowBlock *matchWithPseudoProbes( + const std::vector &PseudoProbes) const { +// Searches for th

[llvm-branch-commits] [llvm] [BOLT][NFC] Track fragment relationships using EquivalenceClasses (PR #99979)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
@@ -241,6 +242,10 @@ class BinaryContext { /// Function fragments to skip. std::unordered_set FragmentsToSkip; + /// Fragment equivalence classes to query belonging to the same "family" in + /// presence of multiple fragments/multiple parents. + EquivalenceClasses Fragm

[llvm-branch-commits] [libcxx] [libc++][spaceship] Marks P1614 as complete. (PR #99375)

2024-07-22 Thread via llvm-branch-commits
h-vetinari wrote: This now closes #100018 https://github.com/llvm/llvm-project/pull/99375 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT] Support more than two jump table parents (PR #99988)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/99988 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT] Support more than two jump table parents (PR #99988)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/99988 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT][NFC] Track fragment relationships using EquivalenceClasses (PR #99979)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov updated https://github.com/llvm/llvm-project/pull/99979 >From f6478e36a962843329c519ba35ad2a132ffd8c9e Mon Sep 17 00:00:00 2001 From: Amir Ayupov Date: Mon, 22 Jul 2024 16:34:02 -0700 Subject: [PATCH] fix getOrCreateJumpTable Created using spr 1.3.4 --- bolt/lib/Core

[llvm-branch-commits] [BOLT] Support more than two jump table parents (PR #99988)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/99988 Multi-way splitting can cause multiple fragments to access the same jump table. Relax the assumption that a jump table can only have up to two parents. Test Plan: added bolt/test/X86/three-way-split-jt.s __

[llvm-branch-commits] [BOLT][NFC] Track fragment relationships using EquivalenceClasses (PR #99979)

2024-07-22 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov created https://github.com/llvm/llvm-project/pull/99979 Three-way splitting can create references between split fragments (warm to cold or vice versa) that are not handled by `isChildOf/isParentOf/isChildOrParentOf`. Generalize fragment relationships to allow checking i

[llvm-branch-commits] [libc] 052f002 - Revert "[libc] New HeaderGen Switch Flip (#99929)"

2024-07-22 Thread via llvm-branch-commits
Author: RoseZhang03 Date: 2024-07-22T15:25:52-07:00 New Revision: 052f002d33e247b9e00994a100bf32531fefe615 URL: https://github.com/llvm/llvm-project/commit/052f002d33e247b9e00994a100bf32531fefe615 DIFF: https://github.com/llvm/llvm-project/commit/052f002d33e247b9e00994a100bf32531fefe615.diff L

[llvm-branch-commits] [llvm] [BOLT] Match blocks with pseudo probes (PR #99891)

2024-07-22 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/99891 >From 0274f697376264c2d77816190f9a434f64e79089 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 22 Jul 2024 11:56:23 -0700 Subject: [PATCH 1/2] Changed assignment of profiles with pseudo probe index Creat

[llvm-branch-commits] [llvm] [BOLT] Match blocks with pseudo probes (PR #99891)

2024-07-22 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/99891 >From 0274f697376264c2d77816190f9a434f64e79089 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 22 Jul 2024 11:56:23 -0700 Subject: [PATCH] Changed assignment of profiles with pseudo probe index Created u

[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-22 Thread Piotr Zegar via llvm-branch-commits
https://github.com/PiotrZSL commented: Except pointed out issues, looks fine for me. https://github.com/llvm/llvm-project/pull/99681 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Create `.noalloc` variant of switch ABI coroutine ramp functions during CoroSplit (PR #99283)

2024-07-22 Thread Wei Wang via llvm-branch-commits
@@ -1455,6 +1462,64 @@ struct SwitchCoroutineSplitter { setCoroInfo(F, Shape, Clones); } + static Function *createNoAllocVariant(Function &F, coro::Shape &Shape, +SmallVectorImpl &Clones) { +auto *OrigFnTy = F.getFunctionType(

[llvm-branch-commits] [llvm] [LLVM][Coroutines] Transform "coro_must_elide" calls to switch ABI coroutines to the `noalloc` variant (PR #99285)

2024-07-22 Thread Wei Wang via llvm-branch-commits
@@ -968,8 +969,8 @@ PassBuilder::buildInlinerPipeline(OptimizationLevel Level, // it's been modified since. MainCGPipeline.addPass(createCGSCCToFunctionPassAdaptor( RequireAnalysisPass())); - MainCGPipeline.addPass(CoroSplitPass(Level != OptimizationLevel::O0)); +

[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-22 Thread Paul Kirth via llvm-branch-commits
@@ -1,4 +1,6 @@ -// RUN: %check_clang_tidy %s llvmlibc-implementation-in-namespace %t +// RUN: %check_clang_tidy %s llvmlibc-implementation-in-namespace %t -fix ilovepi wrote: ack. I saw those running, but I saw `-fix` on a lot of other tests outside of llvmlibc

[llvm-branch-commits] [clang-tidy] Add FixIts for libc namespace macros (PR #99681)

2024-07-22 Thread Paul Kirth via llvm-branch-commits
@@ -41,8 +50,26 @@ void ImplementationInNamespaceCheck::check( // Enforce that the namespace is the result of macro expansion if (Result.SourceManager->isMacroBodyExpansion(NS->getLocation()) == false) { -diag(NS->getLocation(), "the outermost namespace should be the '

[llvm-branch-commits] [llvm] AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics (PR #97050)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/97050 >From 2541faa229c0099ff05eb8e451772d9410005463 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Thu, 27 Jun 2024 16:32:48 +0200 Subject: [PATCH] AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics These a

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for flat/global atomic min/max f64 builtins (PR #96876)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96876 >From 06b6158450a2af1d4b9f8cb585a9bd8597c54ed8 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 26 Jun 2024 23:18:32 +0200 Subject: [PATCH] clang/AMDGPU: Emit atomicrmw for flat/global atomic min/max f64

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96875 >From 415dfe8521d5065f103727449adb7bc30d4193fe Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 26 Jun 2024 19:34:43 +0200 Subject: [PATCH] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtin

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw from flat_atomic_{f32|f64} builtins (PR #96874)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96874 >From 9b0e5ee3db46e3a39f2ec5f4d5b9d5c99bbe2feb Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 26 Jun 2024 19:15:26 +0200 Subject: [PATCH] clang/AMDGPU: Emit atomicrmw from flat_atomic_{f32|f64} builtins

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw from {global|flat}_atomic_fadd_v2f16 builtins (PR #96873)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96873 >From 48fd0a62922171fd563f9c5fdba640153075578e Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Wed, 26 Jun 2024 19:12:59 +0200 Subject: [PATCH] clang/AMDGPU: Emit atomicrmw from {global|flat}_atomic_fadd_v2f1

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for __builtin_amdgcn_global_atomic_fadd_{f32|f64} (PR #96872)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96872 >From e1da39eaef8785570f687dd2a00ae89b918252b1 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Tue, 11 Jun 2024 10:58:44 +0200 Subject: [PATCH 1/2] clang/AMDGPU: Emit atomicrmw for __builtin_amdgcn_global_ato

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Paul Kirth via llvm-branch-commits
@@ -3,7 +3,7 @@ ; RUN: llvm-profdata merge %S/Inputs/misexpect-branch-correct.proftext -o %t.profdata -; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -pgo-missing-annotations -pass-remarks=missing-annotation -S 2>&1 | File

[llvm-branch-commits] [libcxx] [libc++][spaceship] Marks P1614 as complete. (PR #99375)

2024-07-22 Thread Mark de Wever via llvm-branch-commits
https://github.com/mordante updated https://github.com/llvm/llvm-project/pull/99375 >From be0f12219752be987ca6674fe384281e890520a2 Mon Sep 17 00:00:00 2001 From: Mark de Wever Date: Mon, 15 Jul 2024 07:45:02 +0200 Subject: [PATCH] [libc++][spaceship] Marks P1614 as complete. Implements parts o

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Paul Kirth via llvm-branch-commits
@@ -369,9 +369,21 @@ static bool lowerExpectIntrinsic(Function &F) { if (BranchInst *BI = dyn_cast(BB.getTerminator())) { if (handleBranchExpect(*BI)) ExpectIntrinsicsHandled++; + else { +SmallVector Weights; +if (extractBranchWeights(*BI,

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Shilei Tian via llvm-branch-commits
@@ -48,7 +48,7 @@ void test_local_add_2f16_noret(__local half2 *addr, half2 x) { } // CHECK-LABEL: test_flat_add_2f16 -// CHECK: [[RMW:%.+]] = atomicrmw fadd ptr %{{.+}}, <2 x half> %{{.+}} syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !{{[0-9]+$}} +// C

[llvm-branch-commits] [BOLT] Match blocks with pseudo probes (PR #99891)

2024-07-22 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung created https://github.com/llvm/llvm-project/pull/99891 Implemented pseudo probe block matching. When matched functions have equal pseudo probe checksums, the indices of block pseudo probes are used to match blocks following opcode and call hash block matching. Tes

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm approved this pull request. https://github.com/llvm/llvm-project/pull/96163 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
@@ -48,7 +48,7 @@ void test_local_add_2f16_noret(__local half2 *addr, half2 x) { } // CHECK-LABEL: test_flat_add_2f16 -// CHECK: [[RMW:%.+]] = atomicrmw fadd ptr %{{.+}}, <2 x half> %{{.+}} syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !{{[0-9]+$}} +// C

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Teresa Johnson via llvm-branch-commits
@@ -369,9 +369,21 @@ static bool lowerExpectIntrinsic(Function &F) { if (BranchInst *BI = dyn_cast(BB.getTerminator())) { if (handleBranchExpect(*BI)) ExpectIntrinsicsHandled++; + else { +SmallVector Weights; +if (extractBranchWeights(*BI,

[llvm-branch-commits] [misexpect] Support diagnostics from frontend profile data (PR #96524)

2024-07-22 Thread Teresa Johnson via llvm-branch-commits
@@ -3,7 +3,7 @@ ; RUN: llvm-profdata merge %S/Inputs/misexpect-branch-correct.proftext -o %t.profdata -; RUN: opt < %s -passes="function(lower-expect),pgo-instr-use" -pgo-test-profile-file=%t.profdata -pgo-missing-annotations -pass-remarks=missing-annotation -S 2>&1 | File

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Shilei Tian via llvm-branch-commits
https://github.com/shiltian approved this pull request. LGTM with one question regarding the memory order https://github.com/llvm/llvm-project/pull/96875 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Shilei Tian via llvm-branch-commits
@@ -48,7 +48,7 @@ void test_local_add_2f16_noret(__local half2 *addr, half2 x) { } // CHECK-LABEL: test_flat_add_2f16 -// CHECK: [[RMW:%.+]] = atomicrmw fadd ptr %{{.+}}, <2 x half> %{{.+}} syncscope("agent") seq_cst, align 4, !amdgpu.no.fine.grained.memory !{{[0-9]+$}} +// C

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-07-22 Thread Christudasan Devadasan via llvm-branch-commits
cdevadas wrote: The latest patch optimizes the PatFrag and the patterns written further by using OtherPredicates. The lit test changes in the latest patch are a missed optimization I incorrectly introduced earlier in this PR for GFX7. It is now fixed and matches the default behavior with the c

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-07-22 Thread Jay Foad via llvm-branch-commits
https://github.com/jayfoad approved this pull request. LGTM. https://github.com/llvm/llvm-project/pull/96163 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-07-22 Thread Jay Foad via llvm-branch-commits
@@ -34,18 +34,17 @@ entry: } define amdgpu_kernel void @test_llvm_amdgcn_fdot2_bf16_bf16_dpp( -; SDAG-GFX11-LABEL: test_llvm_amdgcn_fdot2_bf16_bf16_dpp: -; SDAG-GFX11: ; %bb.0: ; %entry -; SDAG-GFX11-NEXT:s_load_b128 s[0:3], s[0:1], 0x24 -; SDAG-GFX11-NEXT:s_wait

[llvm-branch-commits] [llvm] [AMDGPU] Codegen support for constrained multi-dword sloads (PR #96163)

2024-07-22 Thread Jay Foad via llvm-branch-commits
https://github.com/jayfoad edited https://github.com/llvm/llvm-project/pull/96163 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for global/flat fadd v2bf16 builtins (PR #96875)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: ping https://github.com/llvm/llvm-project/pull/96875 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-22 Thread Jay Foad via llvm-branch-commits
https://github.com/jayfoad approved this pull request. https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-22 Thread Jay Foad via llvm-branch-commits
@@ -6,7 +6,7 @@ declare i32 @llvm.amdgcn.global.atomic.csub(ptr addrspace(1), i32) ; GCN-LABEL: {{^}}global_atomic_csub_rtn: ; PREGFX12: global_atomic_csub v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9:]+}}, s{{\[[0-9]+:[0-9]+\]}} glc -; GFX12PLUS: global_atomic_sub_clamp_u32 v0, v0, v1

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
arsenm wrote: > > I still think it is terribly surprising all of the test diff shows up in > > this commit, and not the selection case > > Because the selection support is done in the next PR of the review stack, > #96162. This patch takes care of choosing the right opcode while merging the >

[llvm-branch-commits] [clang] 9fb427c - Revert "[Clang][NEON] Add neon target guard to intrinsics (#98624)"

2024-07-22 Thread via llvm-branch-commits
Author: Lukacma Date: 2024-07-22T12:32:23+01:00 New Revision: 9fb427c61f9444e90bad89b14723f1c369f67aad URL: https://github.com/llvm/llvm-project/commit/9fb427c61f9444e90bad89b14723f1c369f67aad DIFF: https://github.com/llvm/llvm-project/commit/9fb427c61f9444e90bad89b14723f1c369f67aad.diff LOG:

[llvm-branch-commits] [clang] clang/AMDGPU: Emit atomicrmw for __builtin_amdgcn_global_atomic_fadd_{f32|f64} (PR #96872)

2024-07-22 Thread Matt Arsenault via llvm-branch-commits
@@ -49,7 +49,7 @@ void test_s_wait_event_export_ready() { } // CHECK-LABEL: @test_global_add_f32 -// CHECK: {{.*}}call{{.*}} float @llvm.amdgcn.global.atomic.fadd.f32.p1.f32(ptr addrspace(1) %{{.*}}, float %{{.*}}) +// CHECK: = atomicrmw fadd ptr addrspace(1) %addr, float %x

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Add missing clauses to OpenMP op definitions (PR #99507)

2024-07-22 Thread Tom Eccles via llvm-branch-commits
https://github.com/tblah edited https://github.com/llvm/llvm-project/pull/99507 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Add missing clauses to OpenMP op definitions (PR #99507)

2024-07-22 Thread Tom Eccles via llvm-branch-commits
@@ -432,9 +439,10 @@ def SimdOp : OpenMP_Op<"simd", traits = [ AttrSizedOperandSegments, DeclareOpInterfaceMethods, RecursiveMemoryEffects, SingleBlock ], clauses = [ -// TODO: Complete clause list (linear, private, reduction). +// TODO: Complete clause list (

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Add missing clauses to OpenMP op definitions (PR #99507)

2024-07-22 Thread Tom Eccles via llvm-branch-commits
@@ -238,9 +237,9 @@ def SectionOp : OpenMP_Op<"section", [HasParent<"SectionsOp">], def SectionsOp : OpenMP_Op<"sections", traits = [ AttrSizedOperandSegments ], clauses = [ -// TODO: Complete clause list (private). // TODO: Sort clauses alphabetically.

[llvm-branch-commits] [mlir] [MLIR][OpenMP] Add missing clauses to OpenMP op definitions (PR #99507)

2024-07-22 Thread Tom Eccles via llvm-branch-commits
https://github.com/tblah commented: I think it would be best to add errors for these unsupported clauses to the OpenMPToLLVMIR translation, so that clauses in MLIR are not silently ignored. https://github.com/llvm/llvm-project/pull/99507 ___ llvm-bran

[llvm-branch-commits] [llvm] ebf0fc9 - Revert "[AArch64] Lower scalable i1 vector add reduction to cntp (#99031)"

2024-07-22 Thread via llvm-branch-commits
Author: Max Beck-Jones Date: 2024-07-22T10:24:54+01:00 New Revision: ebf0fc9ae845af15baed663d79a5e4e88542f1e4 URL: https://github.com/llvm/llvm-project/commit/ebf0fc9ae845af15baed663d79a5e4e88542f1e4 DIFF: https://github.com/llvm/llvm-project/commit/ebf0fc9ae845af15baed663d79a5e4e88542f1e4.diff