[llvm-branch-commits] [lld] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
MaskRay wrote: > [RISCV][lld] ... I usually omit `[RISCV]` when the title already contains `RISC-V` or `RISCV`... https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.ll

[llvm-branch-commits] [lld] [RISCV][lld] Support merging RISC-V Atomics ABI attributes (PR #97347)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/97347 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [lld] [llvm] Reapply "[llvm][RISCV] Enable trailing fences for seq-cst stores by default (#87376)" (PR #90267)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay approved this pull request. https://github.com/llvm/llvm-project/pull/90267 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [mlir] 68b8f5f - Revert "[MLIR][Vector] Generalize DropUnitDimFromElementwiseOps to non leadin…"

2024-07-03 Thread via llvm-branch-commits
Author: Han-Chung Wang Date: 2024-07-03T16:02:17-07:00 New Revision: 68b8f5f684395f5057731f1dc67d27493d7660fa URL: https://github.com/llvm/llvm-project/commit/68b8f5f684395f5057731f1dc67d27493d7660fa DIFF: https://github.com/llvm/llvm-project/commit/68b8f5f684395f5057731f1dc67d27493d7660fa.diff

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96444 >From 308e31175185edc0d1aba78653b137c6a6f53a0e Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 17:07:53 +0200 Subject: [PATCH] AMDGPU: Add subtarget feature for memory atomic fadd f64 --- ll

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96443 >From 637bb436aa8472c2380364e573219c2a7524fdb1 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 16:44:08 +0200 Subject: [PATCH 1/3] AMDGPU: Add subtarget feature for global atomic fadd denorma

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Maksim Panchenko via llvm-branch-commits
maksfb wrote: Could you please reword the summary and add an example where the new matching technique helps. https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Maksim Panchenko via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/97521 >From 9bedda3fa950fbb418a53945f6e36da9a7582e3b Mon Sep 17 00:00:00 2001 From: Fangrui Song Date: Wed, 3 Jul 2024 11:45:26 -0700 Subject: [PATCH] fix header Created using spr 1.3.5-bogner --- llvm/include/llvm/A

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/97521 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/97521 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
MaskRay wrote: > Not that the patch is especially long/complicated, but could be split into > the refactor/move of the MC function, then the new usage, if you like (usual > reasons - smaller patches are easier to root cause, functionality can be > reverted without thrashing the refactored code

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/8] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/8] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/96596 >From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 24 Jun 2024 23:00:59 -0700 Subject: [PATCH 01/14] Added call to matchWithCallsAsAnchors Created using spr 1.

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -220,17 +245,27 @@ class StaleMatcher { return BestBlock; } - /// Returns true if the two basic blocks (in the binary and in the profile) - /// corresponding to the given hashes are matched to each other with a high - /// confidence. - static bool isHighConfidence

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -193,18 +193,43 @@ class StaleMatcher { public: /// Initialize stale matcher. void init(const std::vector &Blocks, -const std::vector &Hashes) { +const std::vector &Hashes, +const std::vector &CallHashes) { assert(Blocks.size() ==

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -193,18 +193,43 @@ class StaleMatcher { public: /// Initialize stale matcher. void init(const std::vector &Blocks, -const std::vector &Hashes) { +const std::vector &Hashes, +const std::vector &CallHashes) { assert(Blocks.size() ==

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -412,33 +447,62 @@ createFlowFunction(const BinaryFunction::BasicBlockOrderType &BlockOrder) { /// of the basic blocks in the binary, the count is "matched" to the block. /// Similarly, if both the source and the target of a count in the profile are /// matched to a jump in

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov commented: Sorry, couple of final comments https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-com

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
MaskRay wrote: > [jh7370](https://github.com/jh7370) I've skimmed briefly and the changes look > reasonable - will look more in depth on a separate occasion when I have more > time. Thanks! > Not for this PR, but I wonder if there would be some benefit in a > `--decode-crel` and/or `--encode

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
@@ -1861,7 +1886,15 @@ template Error ELFBuilder::readSections(bool EnsureSymtab) { const typename ELFFile::Elf_Shdr *Shdr = Sections->begin() + RelSec->Index; - if (RelSec->Type == SHT_REL) { + if (RelSec->Type == SHT_CREL) { +auto Rels = E

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
@@ -0,0 +1,60 @@ +//===- MCELFExtras.h - Extra functions for ELF --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
@@ -207,6 +209,43 @@ bool isSectionInSegment(const typename ELFT::Phdr &Phdr, checkSectionVMA(Phdr, Sec); } +template +Error decodeCrel(ArrayRef Content, + function_ref HdrHandler, MaskRay wrote: thx for the suggestion. adopted http

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
@@ -207,6 +209,43 @@ bool isSectionInSegment(const typename ELFT::Phdr &Phdr, checkSectionVMA(Phdr, Sec); } +template MaskRay wrote: thx for the suggestion. adopted https://github.com/llvm/llvm-project/pull/97382 ___

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/97382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Fangrui Song via llvm-branch-commits
https://github.com/MaskRay updated https://github.com/llvm/llvm-project/pull/97382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/96596 >From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 24 Jun 2024 23:00:59 -0700 Subject: [PATCH 01/13] Added call to matchWithCallsAsAnchors Created using spr 1.

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/96596 >From 05d59574d6260b98a469921eb2fccf5398bfafb6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Mon, 24 Jun 2024 23:00:59 -0700 Subject: [PATCH 01/13] Added call to matchWithCallsAsAnchors Created using spr 1.

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung edited https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Alexander Yermolovich via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Alexander Yermolovich via llvm-branch-commits
@@ -456,6 +435,39 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { ++MatchedWithLTOCommonName; } } + return MatchedWithLTOCommonName; +} + +Error YAMLProfileReader::readProfile(BinaryContext &BC) { + if (opts::Verbosity >= 1) { +outs() << "BOLT-INF

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/97502 >From c6212e4b26b0f0d8abde323fa5fc04ecc6dd34fd Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Wed, 3 Jul 2024 09:45:46 -0700 Subject: [PATCH 1/2] Changed profileMatches comment Created using spr 1.3.4 --- b

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov approved this pull request. LG % nit https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -334,6 +334,13 @@ Error YAMLProfileReader::preprocessProfile(BinaryContext &BC) { return Error::success(); } +bool YAMLProfileReader::profileMatches( +const yaml::bolt::BinaryFunctionProfile &Profile, BinaryFunction &BF) { aaupov wrote: ```suggestio

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for memory atomic fadd f64 (PR #96444)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96444 >From 5945915a9a9f0caf3ed890ce450a25cff58ef608 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 17:07:53 +0200 Subject: [PATCH] AMDGPU: Add subtarget feature for memory atomic fadd f64 --- ll

[llvm-branch-commits] [llvm] AMDGPU: Add subtarget feature for global atomic fadd denormal support (PR #96443)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
https://github.com/arsenm updated https://github.com/llvm/llvm-project/pull/96443 >From dfefb503c35bb1744bffed759221d12f654c99d8 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sun, 23 Jun 2024 16:44:08 +0200 Subject: [PATCH 1/3] AMDGPU: Add subtarget feature for global atomic fadd denorma

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/8] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
@@ -36,38 +32,43 @@ using namespace llvm; #define AARCH64_SLS_HARDENING_NAME "AArch64 sls hardening pass" +static const char SLSBLRNamePrefix[] = "__llvm_slsblr_thunk_"; + namespace { -class AArch64SLSHardening : public MachineFunctionPass { -public: - const TargetInstrIn

[llvm-branch-commits] [llvm] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/97502 >From c6212e4b26b0f0d8abde323fa5fc04ecc6dd34fd Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Wed, 3 Jul 2024 09:45:46 -0700 Subject: [PATCH] Changed profileMatches comment Created using spr 1.3.4 --- bolt/

[llvm-branch-commits] [llvm] [AArch64][PAC] Support BLRA* instructions in SLS Hardening pass (PR #97605)

2024-07-03 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-backend-aarch64 Author: Anatoly Trosinenko (atrosinenko) Changes Make SLS Hardening pass handle BLRA* instructions the same way it handles BLR. The thunk names have the form __llvm_slsblr_thunk_xNfor BLR thunks __llvm_slsblr_thunk_(

[llvm-branch-commits] [llvm] [AArch64][PAC] Support BLRA* instructions in SLS Hardening pass (PR #97605)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko created https://github.com/llvm/llvm-project/pull/97605 Make SLS Hardening pass handle BLRA* instructions the same way it handles BLR. The thunk names have the form __llvm_slsblr_thunk_xNfor BLR thunks __llvm_slsblr_thunk_(aaz|abz)_xN for BLR

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung edited https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
@@ -73,13 +73,26 @@ class YAMLProfileReader : public ProfileReaderBase { bool parseFunctionProfile(BinaryFunction &Function, const yaml::bolt::BinaryFunctionProfile &YamlBF); + /// Returns block cnt equality if IgnoreHash is true, otherwise, hash

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov approved this pull request. LG with a couple of nits. https://github.com/llvm/llvm-project/pull/95884 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -342,6 +350,107 @@ bool YAMLProfileReader::mayHaveProfileData(const BinaryFunction &BF) { return false; } +uint64_t YAMLProfileReader::matchWithNameSimilarity(BinaryContext &BC) { + uint64_t MatchedWithNameSimilarity = 0; + ItaniumPartialDemangler Demangler; + + // De

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -342,6 +350,107 @@ bool YAMLProfileReader::mayHaveProfileData(const BinaryFunction &BF) { return false; } +uint64_t YAMLProfileReader::matchWithNameSimilarity(BinaryContext &BC) { + uint64_t MatchedWithNameSimilarity = 0; + ItaniumPartialDemangler Demangler; + + // De

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -342,6 +350,107 @@ bool YAMLProfileReader::mayHaveProfileData(const BinaryFunction &BF) { return false; } +uint64_t YAMLProfileReader::matchWithNameSimilarity(BinaryContext &BC) { + uint64_t MatchedWithNameSimilarity = 0; + ItaniumPartialDemangler Demangler; + + // De

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -342,6 +350,107 @@ bool YAMLProfileReader::mayHaveProfileData(const BinaryFunction &BF) { return false; } +uint64_t YAMLProfileReader::matchWithNameSimilarity(BinaryContext &BC) { + uint64_t MatchedWithNameSimilarity = 0; + ItaniumPartialDemangler Demangler; + + // De

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
@@ -342,6 +350,107 @@ bool YAMLProfileReader::mayHaveProfileData(const BinaryFunction &BF) { return false; } +uint64_t YAMLProfileReader::matchWithNameSimilarity(BinaryContext &BC) { + uint64_t MatchedWithNameSimilarity = 0; + ItaniumPartialDemangler Demangler; + + // De

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Amir Ayupov via llvm-branch-commits
https://github.com/aaupov edited https://github.com/llvm/llvm-project/pull/95884 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Davide Italiano via llvm-branch-commits
dcci wrote: > I have a couple of general comments about this. Can you also please add a > description explaining what this patch does? i.e. why we're refactoring these functions. https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Davide Italiano via llvm-branch-commits
https://github.com/dcci edited https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Davide Italiano via llvm-branch-commits
https://github.com/dcci commented: I have a couple of general comments about this. Can you also please add a description explaining what this patch does? https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-c

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Davide Italiano via llvm-branch-commits
@@ -73,13 +73,26 @@ class YAMLProfileReader : public ProfileReaderBase { bool parseFunctionProfile(BinaryFunction &Function, const yaml::bolt::BinaryFunctionProfile &YamlBF); + /// Returns block cnt equality if IgnoreHash is true, otherwise, hash

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Davide Italiano via llvm-branch-commits
@@ -73,13 +73,26 @@ class YAMLProfileReader : public ProfileReaderBase { bool parseFunctionProfile(BinaryFunction &Function, const yaml::bolt::BinaryFunctionProfile &YamlBF); + /// Returns block cnt equality if IgnoreHash is true, otherwise, hash

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Peter Smith via llvm-branch-commits
@@ -1861,7 +1886,15 @@ template Error ELFBuilder::readSections(bool EnsureSymtab) { const typename ELFFile::Elf_Shdr *Shdr = Sections->begin() + RelSec->Index; - if (RelSec->Type == SHT_REL) { + if (RelSec->Type == SHT_CREL) { +auto Rels = E

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Peter Smith via llvm-branch-commits
https://github.com/smithp35 edited https://github.com/llvm/llvm-project/pull/97521 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Peter Smith via llvm-branch-commits
https://github.com/smithp35 commented: Only a couple of small comments from me. I'll be out of the office till Monday next week, I'm fine for others to progress this wihout me. https://github.com/llvm/llvm-project/pull/97521 ___ llvm-branch-commits ma

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread Peter Smith via llvm-branch-commits
@@ -0,0 +1,60 @@ +//===- MCELFExtras.h - Extra functions for ELF --*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apa

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread via llvm-branch-commits
llvmbot wrote: @llvm/pr-subscribers-bolt Author: Shaw Young (shawbyoung) Changes Moved function matching techniques into separate helper functions. --- Full diff: https://github.com/llvm/llvm-project/pull/97502.diff 2 Files Affected: - (modified) bolt/include/bolt/Profile/YAMLProfileRe

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung ready_for_review https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [BOLT][NFC] Refactor function matching (PR #97502)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung edited https://github.com/llvm/llvm-project/pull/97502 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko edited https://github.com/llvm/llvm-project/pull/97472 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko edited https://github.com/llvm/llvm-project/pull/97472 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko commented: @kbeyls thank you for the comments! https://github.com/llvm/llvm-project/pull/97472 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-b

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
@@ -36,38 +32,43 @@ using namespace llvm; #define AARCH64_SLS_HARDENING_NAME "AArch64 sls hardening pass" +static const char SLSBLRNamePrefix[] = "__llvm_slsblr_thunk_"; + namespace { -class AArch64SLSHardening : public MachineFunctionPass { -public: - const TargetInstrIn

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
@@ -46,13 +40,5 @@ body: | ... -name:__llvm_slsblr_thunk_x8 -tracksRegLiveness: true -body: | - bb.0.entry: -liveins: $x8 -BR $x8 atrosinenko wrote: The above lines are **input** to `llc`, so I removed them

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
@@ -36,38 +32,43 @@ using namespace llvm; #define AARCH64_SLS_HARDENING_NAME "AArch64 sls hardening pass" +static const char SLSBLRNamePrefix[] = "__llvm_slsblr_thunk_"; + namespace { -class AArch64SLSHardening : public MachineFunctionPass { -public: - const TargetInstrIn

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) { ; GFX940-LABEL: local_atomic_fadd_v2bf16_noret: ; GFX940: ; %bb.0:

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
@@ -479,6 +481,11 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { NormalizeByInsnCount = usesEvent("cycles") || usesEvent("instructions"); NormalizeByCalls = usesEvent("branches"); + // Map profiled function ids to names. + DenseMap IdToFunctionName; ---

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Christudasan Devadasan via llvm-branch-commits
https://github.com/cdevadas edited https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Christudasan Devadasan via llvm-branch-commits
https://github.com/cdevadas edited https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Christudasan Devadasan via llvm-branch-commits
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) { ; GFX940-LABEL: local_atomic_fadd_v2bf16_noret: ; GFX940: ; %bb.0:

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Peter Smith via llvm-branch-commits
@@ -207,6 +209,43 @@ bool isSectionInSegment(const typename ELFT::Phdr &Phdr, checkSectionVMA(Phdr, Sec); } +template +Error decodeCrel(ArrayRef Content, + function_ref HdrHandler, smithp35 wrote: could be worth ``` uint64_t /* relo

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Peter Smith via llvm-branch-commits
@@ -207,6 +209,43 @@ bool isSectionInSegment(const typename ELFT::Phdr &Phdr, checkSectionVMA(Phdr, Sec); } +template smithp35 wrote: Thanks for lifting this out. Possibly worth a comment describing HdrHandler and EntryHandler. For example: ``` //

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Peter Smith via llvm-branch-commits
https://github.com/smithp35 commented: Thanks for the updates. Only a couple of small suggestions. Will be out of office till Monday next week. I'm fine with others approving. https://github.com/llvm/llvm-project/pull/97382 ___ llvm-branch-commits ma

[llvm-branch-commits] [llvm-objdump] -r: support CREL (PR #97382)

2024-07-03 Thread Peter Smith via llvm-branch-commits
https://github.com/smithp35 edited https://github.com/llvm/llvm-project/pull/97382 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AArch64] Only create called thunks when hardening against SLS (PR #97472)

2024-07-03 Thread Anatoly Trosinenko via llvm-branch-commits
https://github.com/atrosinenko updated https://github.com/llvm/llvm-project/pull/97472 >From a246cfe705b326c520d6b36882a17bd90b622e5d Mon Sep 17 00:00:00 2001 From: Anatoly Trosinenko Date: Fri, 28 Jun 2024 21:50:24 +0300 Subject: [PATCH 1/2] [AArch64] Only create called thunks when hardening

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung deleted https://github.com/llvm/llvm-project/pull/96596 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [BOLT] Match blocks with calls as anchors (PR #96596)

2024-07-03 Thread Shaw Young via llvm-branch-commits
@@ -479,6 +481,11 @@ Error YAMLProfileReader::readProfile(BinaryContext &BC) { NormalizeByInsnCount = usesEvent("cycles") || usesEvent("instructions"); NormalizeByCalls = usesEvent("branches"); + // Map profiled function ids to names. + DenseMap IdToFunctionName; ---

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm] [BOLT] Match functions with name similarity (PR #95884)

2024-07-03 Thread Shaw Young via llvm-branch-commits
https://github.com/shawbyoung updated https://github.com/llvm/llvm-project/pull/95884 >From 34652b2eebc62218c50a23509ce99937385c30e6 Mon Sep 17 00:00:00 2001 From: shawbyoung Date: Thu, 20 Jun 2024 23:42:00 -0700 Subject: [PATCH 1/7] spr amend Created using spr 1.3.4 --- bolt/lib/Profile/YAML

[llvm-branch-commits] [llvm-objcopy] Support CREL (PR #97521)

2024-07-03 Thread David Blaikie via llvm-branch-commits
https://github.com/dwblaikie commented: Not that the patch is especially long/complicated, but could be split into the refactor/move of the MC function, then the new usage, if you like (usual reasons - smaller patches are easier to root cause, functionality can be reverted without thrashing th

[llvm-branch-commits] [llvm] 5960fee - Revert "Reduce llvm-gsymutil memory usage (#91023)"

2024-07-03 Thread via llvm-branch-commits
Author: Kamau Bridgeman Date: 2024-07-03T11:27:04-04:00 New Revision: 5960fee335d2339af2edb694534a832669b8ed2a URL: https://github.com/llvm/llvm-project/commit/5960fee335d2339af2edb694534a832669b8ed2a DIFF: https://github.com/llvm/llvm-project/commit/5960fee335d2339af2edb694534a832669b8ed2a.dif

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) { ; GFX940-LABEL: local_atomic_fadd_v2bf16_noret: ; GFX940: ; %bb.0:

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Christudasan Devadasan via llvm-branch-commits
https://github.com/cdevadas edited https://github.com/llvm/llvm-project/pull/96162 ___ llvm-branch-commits mailing list llvm-branch-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-branch-commits

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Christudasan Devadasan via llvm-branch-commits
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) { ; GFX940-LABEL: local_atomic_fadd_v2bf16_noret: ; GFX940: ; %bb.0:

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Matt Arsenault via llvm-branch-commits
@@ -183,10 +183,10 @@ define <2 x half> @local_atomic_fadd_v2f16_rtn(ptr addrspace(3) %ptr, <2 x half> define amdgpu_kernel void @local_atomic_fadd_v2bf16_noret(ptr addrspace(3) %ptr, <2 x i16> %data) { ; GFX940-LABEL: local_atomic_fadd_v2bf16_noret: ; GFX940: ; %bb.0:

[llvm-branch-commits] [llvm] [AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (PR #96162)

2024-07-03 Thread Jay Foad via llvm-branch-commits
@@ -1700,19 +1722,29 @@ unsigned SILoadStoreOptimizer::getNewOpcode(const CombineInfo &CI, case 8: return AMDGPU::S_BUFFER_LOAD_DWORDX8_SGPR_IMM; } - case S_LOAD_IMM: + case S_LOAD_IMM: { +// If XNACK is enabled, use the constrained opcodes when the first l

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