@@ -1710,15 +1710,17 @@ VendorSignatures getVendorSignature(unsigned *MaxLeaf) {
#if defined(__i386__) || defined(_M_IX86) || \
defined(__x86_64__) || defined(_M_X64)
-bool sys::getHostCPUFeatures(StringMap &Features) {
+std::optional> sys::getHostCPUFeatures() {
unsign
@@ -15,21 +15,22 @@
#include "llvm/Support/raw_ostream.h"
#include "llvm/TargetParser/Host.h"
+#include
+
phoebewang wrote:
Not needed.
https://github.com/llvm/llvm-project/pull/97824
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@@ -13,6 +13,7 @@
#ifndef LLVM_TARGETPARSER_HOST_H
#define LLVM_TARGETPARSER_HOST_H
+#include
phoebewang wrote:
ditto
https://github.com/llvm/llvm-project/pull/97824
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https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/97824
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https://github.com/phoebewang updated
https://github.com/llvm/llvm-project/pull/76901
>From ff9b72bdb5442a037d4325619de66e25ad211586 Mon Sep 17 00:00:00 2001
From: Phoebe Wang
Date: Mon, 1 Jan 2024 15:13:38 +0800
Subject: [PATCH] [X86][BF16][WIP] Try to use `f16` for lowering
---
llvm/lib/Tar
https://github.com/phoebewang ready_for_review
https://github.com/llvm/llvm-project/pull/76901
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https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/76901
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https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/76901
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@@ -22,10 +22,7 @@ define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; X86-NEXT:vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT:vmovss %xmm0, (%esp)
; X86-NEXT:calll __truncsfbf2
-; X86-NEXT:fstps {{[0-9]+}}(%esp)
-; X86-NEXT:vmovd {{.*#+}} xmm0 = mem[0],zero,zer
@@ -22,10 +22,7 @@ define void @add(ptr %pa, ptr %pb, ptr %pc) nounwind {
; X86-NEXT:vaddss %xmm0, %xmm1, %xmm0
; X86-NEXT:vmovss %xmm0, (%esp)
; X86-NEXT:calll __truncsfbf2
-; X86-NEXT:fstps {{[0-9]+}}(%esp)
-; X86-NEXT:vmovd {{.*#+}} xmm0 = mem[0],zero,zer
https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/76901
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phoebewang wrote:
Thanks @FreddyLeaf !
https://github.com/llvm/llvm-project/pull/76901
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https://github.com/phoebewang closed
https://github.com/llvm/llvm-project/pull/76901
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@@ -3347,10 +3348,37 @@ void MachineVerifier::verifyLiveRangeSegment(const
LiveRange &LR,
OwnerLI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes);
}
+ bool IsEHa = MF->getMMI().getModule()->getModuleFlag("eh-asynch");
while (true) {
assert(LiveInts->isL
@@ -3347,10 +3348,37 @@ void MachineVerifier::verifyLiveRangeSegment(const
LiveRange &LR,
OwnerLI.computeSubRangeUndefs(Undefs, LaneMask, *MRI, *Indexes);
}
+ bool IsEHa = MF->getMMI().getModule()->getModuleFlag("eh-asynch");
while (true) {
assert(LiveInts->isL
@@ -1363,6 +1363,14 @@ bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB)
{
MachineBasicBlock *Pred = *(MBB->pred_end()-1);
Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
}
+ // Add rest successors of MBB to successors of FallThrough. Those
phoebewang wrote:
> > > This keeps CFG as only have one entry which is required by LiveDebugValues
> >
> >
> > If we just want to make LiveDebugValues happy, should it better to remove
> > these died BB instead?
>
> This died BB was already removed by BranchFolder. See rebased test diff. We
https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/77608
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https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/77608
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@@ -1363,6 +1363,14 @@ bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB)
{
MachineBasicBlock *Pred = *(MBB->pred_end()-1);
Pred->ReplaceUsesOfBlockWith(MBB, &*FallThrough);
}
+ // Add rest successors of MBB to successors of FallThrough. Those
@@ -1624,6 +1632,15 @@ bool BranchFolder::OptimizeBlock(MachineBasicBlock *MBB)
{
} else {
DidChange = true;
PMBB->ReplaceUsesOfBlockWith(MBB, CurTBB);
+ // Add rest successors of MBB to successors of CurTBB. Those
+
https://github.com/phoebewang approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/77608
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@@ -5336,6 +5336,7 @@ X86:
operand in a SSE register. If AVX is also enabled, can also be a 256-bit
vector operand in an AVX register. If AVX-512 is also enabled, can also be a
512-bit vector operand in an AVX512 register. Otherwise, an error.
+- ``Ws``: A symbolic refere
https://github.com/phoebewang approved this pull request.
LGTM with some nits.
https://github.com/llvm/llvm-project/pull/77886
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https://github.com/phoebewang edited
https://github.com/llvm/llvm-project/pull/77886
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@@ -130,3 +130,7 @@ void pr40890(void) {
__asm__ __volatile__("\n#define BEEF abcd%0\n" : :
"n"((int*)0xdeadbeef));
#endif
}
+
+void test_W(int i) {
+ asm("" : : "Wd"(test_W)); // expected-error{{invalid input constraint 'Wd'
in asm}}
phoebewang wrote:
@@ -130,3 +130,7 @@ void pr40890(void) {
__asm__ __volatile__("\n#define BEEF abcd%0\n" : :
"n"((int*)0xdeadbeef));
#endif
}
+
+void test_W(int i) {
+ asm("" : : "Wd"(test_W)); // expected-error{{invalid input constraint 'Wd'
in asm}}
phoebewang wrote:
@@ -1418,6 +1418,14 @@ bool X86TargetInfo::validateAsmConstraint(
case 'O':
Info.setRequiresImmediate(0, 127);
return true;
+ case 'W':
+switch (*++Name) {
+default:
+ return false;
+case 's':
+ Info.setAllowsRegister();
phoebew
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