Re: [Lldb-commits] [PATCH] D62337: [lldb] followup fix for https://reviews.llvm.org/D62305

On Fri, 24 May 2019 at 06:15, Jonas Devlieghere via Phabricator wrote: > > JDevlieghere added a comment. > > In D62337#1515041 , @omjavaid wrote: > > > Hi > > > > This change breaks arm/aarch64 linux builds. > > > > http://147.75.106.138:32769/builders/lldb

Re: [Lldb-commits] [PATCH] D63441: [zorg] Add lldb-arm-ubuntu builder

On Mon, 17 Jun 2019 at 22:30, Jan Kratochvil via Phabricator wrote: > > jankratochvil added a comment. > > > It ll run on staging master until tests become stable. > > BTW the silent master is now dead since 2019-06-13. I thought its down temporarily. Any idea if it is permanently dead? > > > CH

Re: [Lldb-commits] [lldb] cbfae97 - [LLDB] Mark TestCreateDuringInstructionStep as flaky on Linux

On Tue, 2 Jun 2020 at 14:36, Pavel Labath wrote: > On 02/06/2020 11:10, Muhammad Omair Javaid via lldb-commits wrote: > > > > Author: Muhammad Omair Javaid > > Date: 2020-06-02T14:08:28+05:00 > > New Revision: cbfae97ca82b11ab2b54562055c49817baa1e26b > > > &

Re: [Lldb-commits] [PATCH] D63540: Fix lookup of symbols at the same address with no size vs. size

I am running Arm and AArch64 tests on docker containers running Ubuntu Xenial. Underlying hardware is Thunder X1 or D05 machines. On Tue, 19 Nov 2019, 3:31 pm Jan Kratochvil via Phabricator, < revi...@reviews.llvm.org> wrote: > jankratochvil added a comment. > > @omjavaid I guess it depends on s

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid updated https://github.com/llvm/llvm-project/pull/108072 >From ac61e5a75ce59f7834034494a03b43e81bf02d41 Mon Sep 17 00:00:00 2001 From: Muhammad Omair Javaid Date: Tue, 10 Sep 2024 18:03:29 +0500 Subject: [PATCH 1/4] WoA hardware breakpoint/watchpoint support --- ..

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid updated https://github.com/llvm/llvm-project/pull/108072 >From ac61e5a75ce59f7834034494a03b43e81bf02d41 Mon Sep 17 00:00:00 2001 From: Muhammad Omair Javaid Date: Tue, 10 Sep 2024 18:03:29 +0500 Subject: [PATCH 1/3] WoA hardware breakpoint/watchpoint support --- ..

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid edited https://github.com/llvm/llvm-project/pull/108072 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid edited https://github.com/llvm/llvm-project/pull/108072 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Break and Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid updated https://github.com/llvm/llvm-project/pull/108072 >From ac61e5a75ce59f7834034494a03b43e81bf02d41 Mon Sep 17 00:00:00 2001 From: Muhammad Omair Javaid Date: Tue, 10 Sep 2024 18:03:29 +0500 Subject: [PATCH 1/2] WoA hardware breakpoint/watchpoint support --- ..

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

omjavaid wrote: @DavidSpickett @labath I have updated this PR and dropped hardware breakpoint support for the unresolved "set hw break on main" issue As x86_64 windows also does not support hardware breakpoints (probably for the same reason). This PR now only implements HW watchpoint support.

[Lldb-commits] [lldb] [lldb][AArch64] Read fpmr register from core files (PR #110104)

https://github.com/omjavaid approved this pull request. Looks Good. Sorry about delayed review! https://github.com/llvm/llvm-project/pull/110104 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/l

[Lldb-commits] [lldb] [lldb] Remove SymbolFilePDB and make the native one the default (PR #113647)

omjavaid wrote: We set DIA SDK as the default symbol provider on windows. So I don think this change is appropriate at this stage without testing the complete fallout. Although I believe we should move in that direction sooner or later. https://github.com/llvm/llvm-project/pull/113647

[Lldb-commits] [lldb] [lldb] Remove SymbolFilePDB and make the native one the default (PR #113647)

https://github.com/omjavaid requested changes to this pull request. I will test this and may be we can move ahead in case failures are trivial https://github.com/llvm/llvm-project/pull/113647 ___ lldb-commits mailing list lldb-commits@lists.llvm.org h

[Lldb-commits] [lldb] [lldb] Set LLDB_USE_NATIVE_PDB_READER at the directory level (PR #114455)

https://github.com/omjavaid approved this pull request. Looks good to me https://github.com/llvm/llvm-project/pull/114455 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][AArch64] Add register fields for the fpmr register (PR #109934)

https://github.com/omjavaid approved this pull request. Looks good to me but I have not tested this. https://github.com/llvm/llvm-project/pull/109934 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listi

[Lldb-commits] [lldb] [lldb][AArch64][Linux] Add Floating Point Mode Register (PR #106695)

https://github.com/omjavaid approved this pull request. This looks good to me. I haven't tested it myself though. Just one thing that's bothering me is that we are now gradually implementing a number of similar functions to read/write feature registers like ZT ZA or FPMR etc. There will be m

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid closed https://github.com/llvm/llvm-project/pull/108072 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

omjavaid wrote: > https://lab.llvm.org/buildbot/#/builders/197/builds/1447/steps/8/logs/stdio > > https://lab.llvm.org/buildbot/#/builders/197/builds/1447 > > Could you take care of it? @dzhidzhoev I am taking a look. Thanks for spotting this. https://github.com/llvm/llvm-project/pull/108072

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

omjavaid wrote: > This is a problem with watchpoints too, right? Yes this happens with watchpoints too on both AArch64 and x64 WIndows. > I can see an argument that says code breakpoints are much more likely to be > placed before the initial stop, so watchpoints are still useful even with > t

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -575,6 +575,10 @@ Changes to LLDB 24 int main() { Likely cause: f->b->d accessed 0x4 ``` +* LLDB now supports hardware watchpoints for AArch64 Windows targets. Windows + does not provide API to query the number of supported hardware watchpoints. + Therefore curr

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

https://github.com/omjavaid approved this pull request. Looks good. Thanks for making the changes. https://github.com/llvm/llvm-project/pull/117860 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinf

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,54 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

omjavaid wrote: Can we test this with QEMU? https://github.com/llvm/llvm-project/pull/117861 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,54 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,54 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,54 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,54 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,64 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,64 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

@@ -229,3 +229,64 @@ bytes. `zt0`'s value and whether it is active or not will be saved prior to expression evaluation and restored afterwards. + +## Guarded Control Stack Extension (GCS) + +GCS support includes the following new registers: + +* `gcs_features_enabled` +* `gcs_

[Lldb-commits] [lldb] [lldb][Docs] Add Guarded Control Stack to AArch64 Linux page (PR #117860)

omjavaid wrote: I read the documentation again and find some minor points. Feel free to ignore them if you want. https://github.com/llvm/llvm-project/pull/117860 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

omjavaid wrote: @DavidSpickett have you posted rest of the patches for GCS other than this one? https://github.com/llvm/llvm-project/pull/117861 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/l

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

@@ -1629,10 +1630,10 @@ Status GDBRemoteCommunicationClient::GetMemoryRegionInfo( std::tie(flag, flags) = flags.split(' '); omjavaid wrote: instead of tokenizing and checking cant we just use `if (value.contains("mt")) region_info.SetMemoryTagged

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

@@ -164,12 +164,17 @@ void lldb_private::ParseLinuxSMapRegions(llvm::StringRef linux_smap, if (!name.contains(' ')) { if (region) { if (name == "VmFlags") { - if (value.contains("mt")) -region->SetMemoryTagged(MemoryRegionInfo::eYes); -

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

@@ -101,12 +105,13 @@ class MemoryRegionInfo { bool operator==(const MemoryRegionInfo &rhs) const { return m_range == rhs.m_range && m_read == rhs.m_read && m_write == rhs.m_write && m_execute == rhs.m_execute && - m_shared == rhs.m_shared && -

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

@@ -2796,11 +2796,17 @@ GDBRemoteCommunicationServerLLGS::Handle_qMemoryRegionInfo( // Flags MemoryRegionInfo::OptionalBool memory_tagged = region_info.GetMemoryTagged(); -if (memory_tagged != MemoryRegionInfo::eDontKnow) { +MemoryRegionInfo::OptionalBo

[Lldb-commits] [lldb] [lldb][AArch64] Fix expression evaluation with Guarded Control Stacks (PR #123918)

@@ -103,6 +156,9 @@ bool ABISysV_arm64::PrepareTrivialCall(Thread &thread, addr_t sp, return_addr)) return false; + if (GetProcessSP()->GetTarget().GetArchitecture().GetTriple().isOSLinux()) +PushToLinuxGuardedControlStack(return_addr, reg_ctx, thread); ---

[Lldb-commits] [lldb] [lldb][AArch64] Add Guarded Control Stack registers (PR #123720)

@@ -83,3 +83,137 @@ def test_gcs_fault(self): "stop reason = signal SIGSEGV: control protection fault", ], ) + +@skipUnlessArch("aarch64") +@skipUnlessPlatform(["linux"]) +def test_gcs_registers(self): +if not self.isAArch

[Lldb-commits] [lldb] [lldb][AArch64] Add Guarded Control Stack registers (PR #123720)

https://github.com/omjavaid approved this pull request. This look good. Just a minor nit to add more details about how GCS locking testing is being done. https://github.com/llvm/llvm-project/pull/123720 ___ lldb-commits mailing list lldb-commits@lists

[Lldb-commits] [lldb] [lldb][AArch64] Add Guarded Control Stack registers (PR #123720)

https://github.com/omjavaid edited https://github.com/llvm/llvm-project/pull/123720 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][AArch64] Add Guarded Control Stack registers (PR #123720)

@@ -2,8 +2,8 @@ #include #include -#ifndef HWCAP2_GCS -#define HWCAP2_GCS (1UL << 63) +#ifndef HWCAP_GCS +#define HWCAP_GCS (1UL << 32) omjavaid wrote: Apprently following entry is misleading "Support for GCS is reported to userspace via HWCAP_GCS in the

[Lldb-commits] [lldb] [lldb][Linux] Add Control Protection Fault signal (PR #122917)

https://github.com/omjavaid approved this pull request. https://github.com/llvm/llvm-project/pull/122917 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][AArch64] Fix expression evaluation with Guarded Control Stacks (PR #123918)

https://github.com/omjavaid approved this pull request. I agree this is as good as we can get for now with failure handling during expression. https://github.com/llvm/llvm-project/pull/123918 ___ lldb-commits mailing list lldb-commits@lists.llvm.org h

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid updated https://github.com/llvm/llvm-project/pull/108072 >From 8d064dae8f4addce2b9db0ba70a32c51e758d2cb Mon Sep 17 00:00:00 2001 From: Muhammad Omair Javaid Date: Tue, 10 Sep 2024 18:03:29 +0500 Subject: [PATCH 1/6] WoA hardware breakpoint/watchpoint support --- ..

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -492,23 +492,36 @@ NativeProcessWindows::OnDebugException(bool first_chance, } case DWORD(STATUS_BREAKPOINT): case STATUS_WX86_BREAKPOINT: -if (FindSoftwareBreakpoint(record.GetExceptionAddress())) { - LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -492,23 +492,36 @@ NativeProcessWindows::OnDebugException(bool first_chance, } case DWORD(STATUS_BREAKPOINT): case STATUS_WX86_BREAKPOINT: -if (FindSoftwareBreakpoint(record.GetExceptionAddress())) { - LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -492,23 +492,36 @@ NativeProcessWindows::OnDebugException(bool first_chance, } case DWORD(STATUS_BREAKPOINT): case STATUS_WX86_BREAKPOINT: -if (FindSoftwareBreakpoint(record.GetExceptionAddress())) { - LLDB_LOG(log, "Hit non-loader breakpoint at address {0:x}.

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -143,8 +142,14 @@ NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows( NativeRegisterContextWindows_arm64::NativeRegisterContextWindows_arm64( const ArchSpec &target_arch, NativeThreadProtocol &native_thread) -: NativeRegisterContextWindows(native_

[Lldb-commits] [lldb] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -143,8 +142,14 @@ NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows( NativeRegisterContextWindows_arm64::NativeRegisterContextWindows_arm64( const ArchSpec &target_arch, NativeThreadProtocol &native_thread) -: NativeRegisterContextWindows(native_

[Lldb-commits] [lldb] [lldb][AArch64] Add Guarded Control Stack support for Linux core files (PR #124293)

https://github.com/omjavaid approved this pull request. Looks good. Thanks! https://github.com/llvm/llvm-project/pull/124293 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb][AArch64] Add register fields for Guarded Control Stack registers (PR #124295)

https://github.com/omjavaid approved this pull request. Looks Good Thanks https://github.com/llvm/llvm-project/pull/124295 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb-dap] Implement `runInTerminal` for Windows (PR #121269)

@@ -71,12 +74,14 @@ class FifoFileIO { /// \return /// An \a llvm::Error object indicating whether the data was consumed by /// a reader or not. - llvm::Error SendJSON( - const llvm::json::Value &json, - std::chrono::milliseconds timeout = std::chrono::

[Lldb-commits] [lldb] [lldb-dap] Implement `runInTerminal` for Windows (PR #121269)

@@ -71,12 +74,14 @@ class FifoFileIO { /// \return /// An \a llvm::Error object indicating whether the data was consumed by /// a reader or not. - llvm::Error SendJSON( - const llvm::json::Value &json, - std::chrono::milliseconds timeout = std::chrono::

[Lldb-commits] [lldb] [lldb-dap] Implement `runInTerminal` for Windows (PR #121269)

https://github.com/omjavaid edited https://github.com/llvm/llvm-project/pull/121269 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb-dap] Implement `runInTerminal` for Windows (PR #121269)

https://github.com/omjavaid requested changes to this pull request. This should be able make lldb\test\API\tools\lldb-dap\runInTerminal\TestDAP_runInTerminal.py pass all tests. Please tests and remove the skipping decorators. https://github.com/llvm/llvm-project/pull/121269 ___

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

omjavaid wrote: > ### Known Issues (Just for documentation): > 1. I have updates the PR description the "Known Issues (Just for documentation):" part will be skipped in the final patch description. https://github.com/llvm/llvm-project/pull/108072 ___

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid edited https://github.com/llvm/llvm-project/pull/108072 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -110,8 +110,8 @@ NativeRegisterContextWindows::CreateHostNativeRegisterContextWindows( NativeRegisterContextWindows_x86_64::NativeRegisterContextWindows_x86_64( const ArchSpec &target_arch, NativeThreadProtocol &native_thread) -: NativeRegisterContextWindows(native

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

https://github.com/omjavaid updated https://github.com/llvm/llvm-project/pull/108072 >From 82ee1429a0fcf67aa36bf6ca7debb5518211d16c Mon Sep 17 00:00:00 2001 From: Muhammad Omair Javaid Date: Tue, 10 Sep 2024 18:03:29 +0500 Subject: [PATCH 1/7] WoA hardware breakpoint/watchpoint support --- ..

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -575,6 +575,10 @@ Changes to LLDB 24 int main() { Likely cause: f->b->d accessed 0x4 ``` +* LLDB now supports hardware watchpoints for AArch64 Windows targets. Windows + does not provide API to query the number of supported hardware watchpoints. + Therefore curr

[Lldb-commits] [lldb] [llvm] [lldb][Windows] WoA HW Watchpoint support in LLDB (PR #108072)

@@ -492,23 +492,40 @@ NativeProcessWindows::OnDebugException(bool first_chance, } case DWORD(STATUS_BREAKPOINT): case STATUS_WX86_BREAKPOINT: omjavaid wrote: yes. Heres the detail from ntstatus.h // // MessageId: STATUS_WX86_BREAKPOINT // // MessageText:

[Lldb-commits] [lldb] [lldb][Linux] Mark memory regions used for shadow stacks (PR #117861)

https://github.com/omjavaid approved this pull request. https://github.com/llvm/llvm-project/pull/117861 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [lldb] [lldb] Add symbol/table count into statistics (PR #136226)

omjavaid wrote: the reported number of symbols is zero on Windows "symbolsLoaded": 0, ... }, ... ], ... "totalSymbolTablesLoaded": 0, "totalSymbolsLoaded": 0 } https://github.com/llvm/llvm-project/pull/136226 ___ lldb-commits

[Lldb-commits] [lldb] [lldb] Add symbol/table count into statistics (PR #136226)

omjavaid wrote: I have tested the using clang and used lld-link as the default linker the symbols are still zero. For now I have added a bypass commit for this to make buildbot happy. https://github.com/llvm/llvm-project/pull/136226 ___ lldb-commits

[Lldb-commits] [lldb] [lldb] Add symbol/table count into statistics (PR #136226)

omjavaid wrote: this PR caused lldb windows buildbot to fail https://lab.llvm.org/buildbot/#/builders/141/builds/8084 https://github.com/llvm/llvm-project/pull/136226 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi

[Lldb-commits] [lldb] [lldb] Add more ARM checks in TestLldbGdbServer.py (PR #130277)

https://github.com/omjavaid approved this pull request. Looks good https://github.com/llvm/llvm-project/pull/130277 ___ lldb-commits mailing list lldb-commits@lists.llvm.org https://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [PATCH] D25057: Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate watchpoints

omjavaid updated this revision to Diff 75103. omjavaid added a comment. Sorry I was on Holiday so couldnt get back to this earlier. I ll get back to your comments about GDB packet sequence in a separate thread after collecting further information. I have made the suggested corrections in above

[Lldb-commits] [PATCH] D25057: Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate watchpoints

This revision was automatically updated to reflect the committed changes. Closed by commit rL284706: Fix ARM/AArch64 Step-Over watchpoint issue remove provision for duplicate… (authored by omjavaid). Changed prior to commit: https://reviews.llvm.org/D25057?vs=75103&id=75272#toc Repository: r

[Lldb-commits] [PATCH] D27124: [LLDB][MIPS] Fix TestWatchpointIter failure

omjavaid added a comment. Although this patch fixes the test case in question but in theory EphemeralMode watchpoint enable/disable cycles should be independent of step-over watchpoint enable disable cycle. On gdb-remote type targets we only update hardware_watch_id when a watchpoint is hit so

[Lldb-commits] [PATCH] D24610: LLDB Arm Watchpoints: Use single hardware watchpoint slot to watch multiple bytes where possible

omjavaid abandoned this revision. omjavaid added a comment. There is not exact solution that satisfies all corner cases. Abandoning for now until I come up with a solution that covers us from all corners. https://reviews.llvm.org/D24610 ___ lldb-co

Re: [Lldb-commits] [PATCH] D12522: AArch64 Watchpoints: Make sure we are only setting supported no of debug registers.

omjavaid updated this revision to Diff 37748. omjavaid added a comment. This patch fixes unexpected behaviour of watchpoint code on Nexus 9 (AArch64). http://reviews.llvm.org/D12522 Files: source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp Index: source/Plugins/Process/Linux/N

Re: [Lldb-commits] [PATCH] D12522: AArch64 Watchpoints: Make sure we are only setting supported no of debug registers.

This revision was automatically updated to reflect the committed changes. Closed by commit rL250700: Fix for random watchpoint testsuite failures on AArch64 targets. (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D12522?vs=37748&id=37758#toc Repository: rL LLVM htt

[Lldb-commits] [PATCH] D14051: Fix for Arm watchpoint cache corruption in case of ptrace failure

omjavaid created this revision. omjavaid added reviewers: tberghammer, clayborg. omjavaid added a subscriber: lldb-commits. Herald added subscribers: rengolin, aemerson. Arm watchpoint handlers incorrectly updates watchpoint cache incase we have a ptrace failures. This patch fixes this issue by

Re: [Lldb-commits] [PATCH] D14051: Fix for Arm watchpoint cache corruption in case of ptrace failure

This revision was automatically updated to reflect the committed changes. Closed by commit rL251386: Fix for Arm watchpoint cache corruption in case of ptrace failure (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D14051?vs=38364&id=38502#toc Repository: rL LLVM ht

[Lldb-commits] [PATCH] D14823: Disable forcing -marm (A32 instruction set) while running testsuite on arm targets.

omjavaid created this revision. omjavaid added reviewers: tberghammer, clayborg. omjavaid added a subscriber: lldb-commits. Herald added subscribers: rengolin, aemerson. This patch disables forcing -marm (A32 instruction set) while running lldb testsuite on arm targets. gcc uses -marm and -mthum

Re: [Lldb-commits] [PATCH] D14816: Use thumb instruction set for ldb-server on android arm

omjavaid added a subscriber: omjavaid. omjavaid added a comment. -mthumb will force T32 instruction set while -marm will force A32. Best is not to use any of these flags to let the compiler decide best possible instruction set combination. http://reviews.llvm.org/D14816 _

Re: [Lldb-commits] [PATCH] D14823: Disable forcing -marm (A32 instruction set) while running testsuite on arm targets.

omjavaid added a comment. -mthumb and -marm are compiler flags so we can put these into our CXX or CFLAGS if we need to run those configurations. http://reviews.llvm.org/D14823 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.

Re: [Lldb-commits] [PATCH] D14823: Disable forcing -marm (A32 instruction set) while running testsuite on arm targets.

omjavaid added a comment. I agree with you on having multiple configuration options to help identify failures in different configurations. What I mean is that we should keep clarity on architecture that is to use arm or aarch32 for 32bit and aarch64 for 64bit. With that we should run tests in

Re: [Lldb-commits] [PATCH] D14823: Disable forcing -marm (A32 instruction set) while running testsuite on arm targets.

This revision was automatically updated to reflect the committed changes. Closed by commit rL253973: Disable forcing -marm (A32 instruction set) while running testsuite on arm… (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D14823?vs=40652&id=41017#toc Repository: r

Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux

omjavaid added a comment. Some minor typos inline comments. I havnt applied nd tested this patch. Are you able to read these registers, i guess you need to generate neon or vfp code to test all registers properly. There no arm register test to my knowledge currently in testsuite we can put thi

Re: [Lldb-commits] [PATCH] D14985: Add 64/128 bit arm neon register definitions on linux

omjavaid accepted this revision. omjavaid added a comment. LGTM http://reviews.llvm.org/D14985 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [PATCH] D15061: Correction in TestFrames.py test for arm targets in thumb mode

omjavaid created this revision. omjavaid added a reviewer: tberghammer. omjavaid added a subscriber: lldb-commits. Herald added subscribers: rengolin, aemerson. This patch adds required correction in TestFrames.py for arm targets in thumb mode. On arm hardware thumb mode is identified by setting

[Lldb-commits] [PATCH] D15355: Add failure paths to a few JSONNumber members

omjavaid created this revision. omjavaid added a reviewer: tberghammer. omjavaid added a subscriber: lldb-commits. This patch updates GetAsUnsigned(), GetAsSigned(), and GetAsDouble() JSONNumber functions to add failure check. The previous code was generating compiler warnings for not being able

[Lldb-commits] [PATCH] D15357: Update code to silent some ARM/ARM64 specific compiler warnings

omjavaid created this revision. omjavaid added a reviewer: tberghammer. omjavaid added a subscriber: lldb-commits. Herald added subscribers: rengolin, aemerson. Following changes remove conditions where an unsigned integer is being tested to be greater or equal to zero. These conditions will alw

Re: [Lldb-commits] [PATCH] D19604: Allow ObjectFilePECOFF to initialize with ARM binaries.

omjavaid requested changes to this revision. omjavaid added a comment. This revision now requires changes to proceed. Please see inline comments. Comment at: source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp:149 @@ +148,3 @@ +{ +spec.SetTr

Re: [Lldb-commits] [PATCH] D19604: Allow ObjectFilePECOFF to initialize with ARM binaries.

omjavaid added a comment. @sas Ideally it should be thumb-* if an environment is thumb only but lldb right now has some areas where we need to handle this case. Either you put arm-* and leave it for someone else to correct the problems or put thumb-* and fix the issues that come up after that.

Re: [Lldb-commits] [PATCH] D19604: Allow ObjectFilePECOFF to initialize with ARM binaries.

omjavaid added a comment. In case of ELF .arm attributes contains tags providing information on underlying CPU specification used. Thats only for the inferior being debugged but actually knowing which target we are running on, like for example if we want to figure out if we are running on a arm

[Lldb-commits] [PATCH] D20386: Correct makefile.rules to use arm/aarch64 target specific AR and OBJCOPY

omjavaid created this revision. omjavaid added reviewers: labath, tberghammer. omjavaid added a subscriber: lldb-commits. Herald added subscribers: danalbert, tberghammer, rengolin, aemerson. This patch makes sure that we are using correct target specific ar and objcopy executables. I have added

Re: [Lldb-commits] [PATCH] D20368: Remove Platform usages from NativeProcessLinux

omjavaid accepted this revision. omjavaid added a comment. Seems to be causing no regressions on arm-linux. http://reviews.llvm.org/D20368 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-

[Lldb-commits] [PATCH] D21164: Improve watchpoint error reporting specially for arm/aarch64 targets

omjavaid created this revision. omjavaid added reviewers: tberghammer, labath. omjavaid added a subscriber: lldb-commits. Herald added subscribers: rengolin, aemerson. This patch takes a few corrective measures to make sure we display meaningful reason against a watchpoint creation failure. This

[Lldb-commits] [PATCH] D21280: Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

omjavaid created this revision. omjavaid added reviewers: labath, clayborg. omjavaid added a subscriber: lldb-commits. Herald added subscribers: danalbert, tberghammer, rengolin, aemerson. This patch adds logic to make sure we can install watchpoints at 1,2 and 4 byte alligned addresses. ptrace

Re: [Lldb-commits] [PATCH] D21280: Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

omjavaid added a comment. In http://reviews.llvm.org/D21280#457196, @labath wrote: > The overall change looks good, but please also add a test which specifically > tests for watchpoints at unaligned addresses. Last time I checked, we all > watchpoint tests were passing (at least on android) eve

Re: [Lldb-commits] [PATCH] D21280: Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

omjavaid updated this revision to Diff 60942. omjavaid added a comment. Herald added a subscriber: srhines. I have added a test cases that tests all possibilities supported by current configuration. Tests pass on Nexus 9 and aarch64-linux-gnu (hikey board). LGTM? http://reviews.llvm.org/D2128

Re: [Lldb-commits] [PATCH] D21280: Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

omjavaid marked 3 inline comments as done. Comment at: packages/Python/lldbsuite/test/functionalities/watchpoint/watchpoint_size/TestWatchpointSizes.py:104 @@ +103,3 @@ +self.expect("watchpoint list -v", +substrs = ['hit_count = 2']) +

Re: [Lldb-commits] [PATCH] D21280: Allow installing watchpoints at less than 8-byte alligned addresses for AArch64 targets

This revision was automatically updated to reflect the committed changes. Closed by commit rL272916: Allow installing watchpoints at less than 8-byte alligned addresses for… (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D21280?vs=60942&id=60987#toc Repository: rL L

Re: [Lldb-commits] [PATCH] D21164: Improve watchpoint error reporting specially for arm/aarch64 targets

omjavaid added a comment. @clayborg Any comments about this change? Thanks! http://reviews.llvm.org/D21164 ___ lldb-commits mailing list lldb-commits@lists.llvm.org http://lists.llvm.org/cgi-bin/mailman/listinfo/lldb-commits

[Lldb-commits] [PATCH] D21516: Allow unaligned byte/word selection watchpoints for arm- linux/android targets.

omjavaid created this revision. omjavaid added reviewers: labath, clayborg. omjavaid added a subscriber: lldb-commits. Herald added subscribers: danalbert, tberghammer, rengolin, aemerson. We recently committed a patch for AArch64 targets that allows us to watch any byte address individually in a

Re: [Lldb-commits] [PATCH] D21516: Allow unaligned byte/word selection watchpoints for arm- linux/android targets.

This revision was automatically updated to reflect the committed changes. Closed by commit rL273863: Allow unaligned byte/word selection watchpoints for arm- linux/android targets. (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D21516?vs=61234&id=61954#toc Repository:

Re: [Lldb-commits] [PATCH] D21164: Improve watchpoint error reporting specially for arm/aarch64 targets

omjavaid added inline comments. Comment at: source/Target/Target.cpp:714 @@ -713,2 +713,3 @@ { uint32_t num_current_watchpoints = target->GetWatchpointList().GetSize(); +if (num_supported_hardware_watchpoints == 0) clayborg wrote: > This log

Re: [Lldb-commits] [PATCH] D21164: Improve watchpoint error reporting specially for arm/aarch64 targets

This revision was automatically updated to reflect the committed changes. Closed by commit rL273869: Improve watchpoint error reporting specially for arm/aarch64 targets (authored by omjavaid). Changed prior to commit: http://reviews.llvm.org/D21164?vs=60127&id=61959#toc Repository: rL LLVM

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