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arsenm wrote:
I don't care about splitting or not; either way
https://github.com/llvm/llvm-project/pull/126243
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https://github.com/arsenm approved this pull request.
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@@ -4377,7 +4377,7 @@
AMDGPUInstructionSelector::selectGlobalSAddr(MachineOperand &Root) const {
// instructions to perform VALU adds with immediates or inline
literals.
unsigned NumLiterals =
!TII.isInlineConstant(APInt(32, ConstOffset & 0xfff
@@ -1806,7 +1806,7 @@ bool AMDGPUDAGToDAGISel::SelectGlobalSAddr(SDNode *N,
// instructions to perform VALU adds with immediates or inline literals.
unsigned NumLiterals =
!TII->isInlineConstant(APInt(32, COffsetVal & 0x)) +
- !TII->isInli
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/95373
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/67104
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@@ -862,14 +862,18 @@ static void instrumentOneFunc(
auto Name = FuncInfo.FuncNameVar;
auto CFGHash = ConstantInt::get(Type::getInt64Ty(M->getContext()),
FuncInfo.FunctionHash);
+ // Make sure that pointer to global is passed in with zero
@@ -1025,6 +1025,26 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI(const
MachineFunction &MF,
OutStreamer->emitInt32(MFI->getNumSpilledVGPRs());
}
+// Helper function to add common PAL Metadata 3.0+
+static void EmitPALMetadataCommon(AMDGPUPALMetadata *MD,
+
@@ -1127,10 +1131,16 @@ void AMDGPUAsmPrinter::emitPALFunctionMetadata(const
MachineFunction &MF) {
MD->setFunctionScratchSize(FnName, MFI.getStackSize());
const GCNSubtarget &ST = MF.getSubtarget();
- // Set compute registers
- MD->setRsrc1(CallingConv::AMDGPU_CS,
-
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/79795
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Mirko =?utf-8?q?Brkušanin?= ,
Mirko =?utf-8?q?Brkušanin?= ,Mirko Brkusanin
,Mariusz Sikora
Message-ID:
In-Reply-To:
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/78414
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Mirko =?utf-8?q?Brku=C5=A1anin?= ,
Mirko =?utf-8?q?Brku=C5=A1anin?= ,Mirko Brkusanin
,Mariusz Sikora
Message-ID:
In-Reply-To:
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/78414
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Mirko =?utf-8?q?Brkušanin?= ,
Mirko =?utf-8?q?Brkušanin?= ,Mirko Brkusanin
,Mariusz Sikora
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@@ -8770,6 +8781,22 @@ void AMDGPUAsmParser::cvtVOP3DPP(MCInst &Inst, const
OperandVector &Operands,
}
}
+int VdstInIdx = AMDGPU::getNamedOper
https://github.com/arsenm commented:
Why is so there so much special casing in the assembler/disassembler?
https://github.com/llvm/llvm-project/pull/78414
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/74537
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arsenm wrote:
> > lgtm, but can still fix the -O0 thing
>
> But where do I get TM in the getAnalysisUsage?
MF.getTarget()
https://github.com/llvm/llvm-project/pull/74537
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@@ -0,0 +1,23 @@
+;RUN: opt < %s -passes=asan -S | FileCheck %s
+
+target datalayout =
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-
https://github.com/arsenm approved this pull request.
lgtm, but can still fix the -O0 thing
https://github.com/llvm/llvm-project/pull/74537
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@@ -130,6 +130,8 @@
; GCN-O0-NEXT:MachineDominator Tree Construction
; GCN-O0-NEXT:Machine Natural Loop Construction
; GCN-O0-NEXT:MachinePostDominator Tree Construction
+; GCN-O0-NEXT:Basic Alias Analysis (stateless AA impl)
+; GCN-O0-NEXT:
@@ -707,7 +723,40 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
(TII->isDS(Inst) || TII->mayWriteLDSThroughDMA(Inst))) {
// MUBUF and FLAT LDS DMA operations need a wait on vmcnt before LDS
// written can be accessed. A load from LDS to VMEM
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/74537
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@@ -0,0 +1,48 @@
+;RUN: opt < %s -passes=asan -S | FileCheck %s
+
+target datalayout =
"e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-p7:160:256:256:32-p8:128:128-p9:192:256:256:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-
@@ -703,8 +713,37 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
setRegScore(RegNo, T, CurrScore);
}
}
-if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) {
- setRegScore(SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS, T, Curr
@@ -130,6 +130,8 @@
; GCN-O0-NEXT:MachineDominator Tree Construction
; GCN-O0-NEXT:Machine Natural Loop Construction
; GCN-O0-NEXT:MachinePostDominator Tree Construction
+; GCN-O0-NEXT:Basic Alias Analysis (stateless AA impl)
+; GCN-O0-NEXT:
@@ -1183,9 +1228,21 @@ bool
SIInsertWaitcnts::generateWaitcntInstBefore(MachineInstr &MI,
// No need to wait before load from VMEM to LDS.
if (TII->mayWriteLDSThroughDMA(MI))
continue;
-unsigned RegNo = SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS;
+
@@ -959,8 +959,12 @@ void CodeGenPGO::emitCounterIncrement(CGBuilderTy
&Builder, const Stmt *S,
unsigned Counter = (*RegionCounterMap)[S];
- llvm::Value *Args[] = {FuncNameVar,
- Builder.getInt64(FunctionHash),
+ // Make sure that pointer to globa
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/77412
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@@ -1,58 +1,305 @@
-; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu -O0 < %s
| FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O0 <
%s | FileCheck %s
-; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/77412
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@@ -68,8 +68,18 @@ define dso_local zeroext i32 @func(double noundef %0, double
noundef %1) #0 {
; CHECK-LABEL: __adddf3
}
+; To check ppc_fp128 soften without crash
+define zeroext i1 @ppcf128_soften(ppc_fp128 %a) #0 {
+entry:
+ %fpclass = tail call i1 @llvm.is.fpcla
@@ -8262,6 +8262,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
@@ -8310,6 +8310,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
@@ -8310,6 +8310,64 @@ SDValue TargetLowering::expandFMINNUM_FMAXNUM(SDNode
*Node,
return SDValue();
}
+SDValue TargetLowering::expandFMINIMUM_FMAXIMUM(SDNode *N,
+SelectionDAG &DAG) const {
+ SDLoc DL(N);
+ SDValue LHS = N-
https://github.com/arsenm edited https://github.com/llvm/llvm-project/pull/76587
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@@ -959,8 +959,12 @@ void CodeGenPGO::emitCounterIncrement(CGBuilderTy
&Builder, const Stmt *S,
unsigned Counter = (*RegionCounterMap)[S];
- llvm::Value *Args[] = {FuncNameVar,
- Builder.getInt64(FunctionHash),
+ // Make sure that pointer to globa
@@ -448,8 +456,12 @@ GlobalVariable *createPGOFuncNameVar(Module &M,
new GlobalVariable(M, Value->getType(), true, Linkage, Value,
getPGOFuncNameVarName(PGOFuncName, Linkage));
+ // If the target is a GPU, make the symbol protected so it can
+
https://github.com/arsenm closed https://github.com/llvm/llvm-project/pull/76217
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Thorsten =?utf-8?q?Sch=C3=BCtt?= ,
Thorsten =?utf-8?q?Sch=C3=BCtt?= ,
Thorsten =?utf-8?q?Sch=C3=BCtt?=
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/76763
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@@ -6548,6 +6534,54 @@ bool CombinerHelper::tryFoldBoolSelectToLogic(GSelect
*Select,
return false;
}
+bool CombinerHelper::tryFoldSelectOfBinOps(GSelect *Sel
@@ -703,8 +713,37 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
setRegScore(RegNo, T, CurrScore);
}
}
-if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) {
- setRegScore(SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS, T, Curr
@@ -703,8 +713,37 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
setRegScore(RegNo, T, CurrScore);
}
}
-if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) {
- setRegScore(SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS, T, Curr
@@ -703,8 +713,37 @@ void WaitcntBrackets::updateByEvent(const SIInstrInfo *TII,
setRegScore(RegNo, T, CurrScore);
}
}
-if (Inst.mayStore() && (TII->isDS(Inst) || mayWriteLDSThroughDMA(Inst))) {
- setRegScore(SQ_MAX_PGM_VGPRS + EXTRA_VGPR_LDS, T, Curr
https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/76149
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https://github.com/arsenm approved this pull request.
https://github.com/llvm/llvm-project/pull/75625
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@@ -959,6 +967,32 @@ def : GCNPat <
}
} // let OtherPredicates = [HasShaderCyclesRegister]
+def SIMM24bitPtr : ImmLeaf (Imm);}]
+>;
+
+multiclass SMPrefetchPat {
+ def : GCNPat <
+(smrd_prefetch (SMRDImm i64:$sbase, i32:$offset), timm, timm, (i32
cache_type)),
+(!cas
@@ -25,13 +25,13 @@ define void @test_not_crash(i32 %in_a) #0 {
entry:
%cmp0 = icmp eq i32 %in_a, -1
%cmp1 = icmp ne i32 %in_a, 0
- %cond0 = and i1 %cmp0, %cmp1
+ %cond0 = or i1 %cmp0, %cmp1
arsenm wrote:
Original tests still changing? Needs new copies
@@ -50,13 +49,10 @@ define i64 @test_quadmask_constant_i64() {
; GFX11-LABEL: test_quadmask_constant_i64:
; GFX11: ; %bb.0: ; %entry
; GFX11-NEXT:s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
-; GFX11-NEXT:s_mov_b32 s0, 0x85fe3a92
-; GFX11-NEXT:s_mov_b32 s1, 0x67de4
@@ -450,9 +450,9 @@ bool FlattenCFGOpt::MergeIfRegion(BasicBlock *BB,
IRBuilder<> &Builder) {
if (!CompareIfRegionBlock(IfTrue1, IfTrue2, SecondEntryBlock))
return false;
} else if (IfTrue1 == FirstEntryBlock) {
-// The then-path is empty, so we must use "and"
@@ -25,13 +25,13 @@ define void @test_not_crash(i32 %in_a) #0 {
entry:
%cmp0 = icmp eq i32 %in_a, -1
%cmp1 = icmp ne i32 %in_a, 0
- %cond0 = and i1 %cmp0, %cmp1
+ %cond0 = or i1 %cmp0, %cmp1
br i1 %cond0, label %b0, label %b1
b0:; pre
@@ -450,9 +450,9 @@ bool FlattenCFGOpt::MergeIfRegion(BasicBlock *BB,
IRBuilder<> &Builder) {
if (!CompareIfRegionBlock(IfTrue1, IfTrue2, SecondEntryBlock))
return false;
} else if (IfTrue1 == FirstEntryBlock) {
-// The then-path is empty, so we must use "and"
Valentin Clement =?utf-8?b?KOODkOODrOODsw==?=,
Valentin Clement =?utf-8?b?KOODkOODrOODsw==?=,Jonas Devlieghere
,Douglas Yung ,daisy202309
<144047963+daisy202...@users.noreply.github.com>,Jonas Devlieghere
,Mehdi Amini ,Siva Chandra
,Jonas Devlieghere ,
Valentin Clement =?utf-8?b?KOODkOODrOODsw=
Author: arsenm
Date: Mon Apr 10 18:27:53 2017
New Revision: 299898
URL: http://llvm.org/viewvc/llvm-project?rev=299898&view=rev
Log:
Update for alloca construction changes
Modified:
lldb/trunk/source/Plugins/LanguageRuntime/RenderScript/RenderScriptRuntime/RenderScriptx86ABIFixups.cpp
Modif
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