DavidSpickett wrote:
This is a lot of change so it isn't a great review experience. A decent
strategy would be to look at each of the strange details we had before, and
check there is an equivalent in the new code. I leaned a lot on existing tests
to validate this.
https://github.com/llvm/llv
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/152284
>From b1a421f6c94057bf7f4ca375907a6ab7081d5a33 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Mon, 16 Dec 2024 16:02:33 +
Subject: [PATCH 1/3] [lldb][ARM] Port Arm Linux to use
NativeRegisterCont
DavidSpickett wrote:
@b10902118 please try this out in the scenarios you fixed previously.
In theory I could have run the test suite with everything AArch32 but my worry
is that too much in lldb will make assumptions about the host being AArch64.
Plus, I want you to test this anyway.
https://
DavidSpickett wrote:
https://github.com/llvm/llvm-project/pull/152284
https://github.com/llvm/llvm-project/pull/147198
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https://github.com/llvm/llvm-project/pull/152284
Which is also used by AArch64 and LoongArch.
To do this I had to make some adjustments to NativeRegisterContextDBReg:
* New method AdjustBreakpoint. This is like AdjustWatchpoint, but
only Arm needs to
DavidSpickett wrote:
Actually was an alignment issue trying to load from a struct -
https://github.com/llvm/llvm-project/commit/49d5dd37f8bdd961d11cdf4df95d26982b253e97.
https://github.com/llvm/llvm-project/pull/151460
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ll
Author: David Spickett
Date: 2025-08-06T09:25:48Z
New Revision: 49d5dd37f8bdd961d11cdf4df95d26982b253e97
URL:
https://github.com/llvm/llvm-project/commit/49d5dd37f8bdd961d11cdf4df95d26982b253e97
DIFF:
https://github.com/llvm/llvm-project/commit/49d5dd37f8bdd961d11cdf4df95d26982b253e97.diff
LOG
DavidSpickett wrote:
Feels like someone stored a uint64_t into a void* that's 32-bit on Arm 32-bit.
Thanks for reverting, I'm looking into it now.
https://github.com/llvm/llvm-project/pull/151460
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DavidSpickett wrote:
Understood, not needing the forwarder will be nice.
https://github.com/llvm/llvm-project/pull/152059
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DavidSpickett wrote:
> Once that's in, I will rebase my changes on top. I needed to read them
> through carefully anyway, so I can do both at the same time. I want to be
> sure I don't drop any Arm/Thumb handling details along the way.
I have rebased those changes to include this and found
ht
https://github.com/DavidSpickett approved this pull request.
I'm assuming this will be:
* Can't enable it now because we use non-limited API things, but will be used
locally for fixing that.
* Once that's done, enable it where we have SWIG 4.2
* Eventually require SWIG >= 4.2, default to ON
* Fo
DavidSpickett wrote:
> lldb-mcp
And this is what exactly? A binary that automatically starts the mcp server and
does not show the interactive command line, because you'll be using the mcp
server via. some client program like you use lldb-dap via. an IDE.
I don't object to that, just not seen
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https://github.com/llvm/llvm-project/pull/151973
I discovered this building the lldb test suite with `-mthumb` set, so that all
test programs are purely Arm Thumb code.
When C++ expressions did a function lookup, they took a different path from C
progr
https://github.com/DavidSpickett approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/151903
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@@ -0,0 +1,15 @@
+RUN: mkdir -p %t/server
+RUN: mkdir -p %t/lib
+RUN: %lldb-rpc-gen --output-dir=%t %S/../../Inputs/CheckSBPointer.h
+
+RUN: cat %t/lib/CheckSBPointer.cpp | FileCheck %s
+
+# Pointers to SB objects must be checked to
+# see if they're null. If so, then a new object
@@ -0,0 +1,124 @@
+#include "RPCLibraryHeaderEmitter.h"
+#include "RPCCommon.h"
+
+#include "clang/AST/AST.h"
+#include "clang/AST/Mangle.h"
+#include "clang/Frontend/CompilerInstance.h"
+
+#include "llvm/ADT/StringRef.h"
+#include "llvm/Support/ToolOutputFile.h"
+#include "llvm/S
https://github.com/DavidSpickett commented:
Please go over the outstanding comments and make sure they have been done. I
see several that have not.
https://github.com/llvm/llvm-project/pull/147655
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@@ -0,0 +1,124 @@
+#include "RPCLibraryHeaderEmitter.h"
+#include "RPCCommon.h"
+
+#include "clang/AST/AST.h"
+#include "clang/AST/Mangle.h"
+#include "clang/Frontend/CompilerInstance.h"
+
+#include "llvm/ADT/StringRef.h"
+#include "llvm/Support/ToolOutputFile.h"
+#include "llvm/S
https://github.com/DavidSpickett edited
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https://github.com/DavidSpickett approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/151629
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https://github.com/DavidSpickett approved this pull request.
LGTM
I saw the same problem with another test case on Windows on Arm. In that case I
was able to lower the amount of memory read, but here it needs to be some
amount greater than the l2 cache line size which is 512:
```
def MemCach
@@ -60,3 +169,18 @@ TEST_F(TestAArch64Emulator, TestOverflow) {
ASSERT_EQ(pstate.V, 1ULL);
ASSERT_EQ(pstate.C, 0ULL);
}
+
+TEST_F(TestAArch64Emulator, TestAutoAdvancePC) {
+ Arch64EmulatorTester emu;
+ emu.memory_offset = 0x1234567800;
+ emu.gpr.pc = 0x1234567800;
--
@@ -13,15 +13,124 @@
#include "lldb/Core/Disassembler.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/RegisterValue.h"
#include "Plugins/Instruction/ARM64/EmulateInstructionARM64.h"
+#include "Plugins/Process/Utility/Re
@@ -13,15 +13,124 @@
#include "lldb/Core/Disassembler.h"
#include "lldb/Target/ExecutionContext.h"
#include "lldb/Utility/ArchSpec.h"
+#include "lldb/Utility/RegisterValue.h"
#include "Plugins/Instruction/ARM64/EmulateInstructionARM64.h"
+#include "Plugins/Process/Utility/Re
https://github.com/DavidSpickett approved this pull request.
supprot -> support, in the PR description.
LGTM.
https://github.com/llvm/llvm-project/pull/151056
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@@ -0,0 +1,194 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -224,67 +311,68 @@ def
test_load_module_with_stripped_symbols_from_remote(self):
@skipIfAsan
@skipIfXmlSupportMissing
-def test_load_module_from_file(self):
-"""Test connecting to a WebAssembly engine via GDB-remote and loading
a Wasm module from a fil
@@ -71,28 +124,62 @@ def qXferRead(self, obj, annex, offset, length):
if obj == "libraries":
xml = (
''
-% (self._module_name, load_address)
+% (self._module_name, LOAD_ADDRESS)
)
retu
@@ -2479,3 +2463,64 @@ omitting them will work fine; these numbers are always
base 16.
The length of the payload is not provided. A reliable, 8-bit clean,
transport layer is assumed.
+
+## Wasm Packets
+
+The packet below are supported by the
+[WAMR](https://github.com/bytec
@@ -2479,3 +2463,64 @@ omitting them will work fine; these numbers are always
base 16.
The length of the payload is not provided. A reliable, 8-bit clean,
transport layer is assumed.
+
+## Wasm Packets
+
+The packet below are supported by the
+[WAMR](https://github.com/bytec
@@ -23,19 +27,68 @@ def format_register_value(val):
return result
+class WasmStackFrame:
+def __init__(self, address):
+self._address = address
+
+def format(self):
+return format_register_value(LOAD_ADDRESS | self._address)
+
+
+class WasmCallStac
@@ -2479,3 +2463,64 @@ omitting them will work fine; these numbers are always
base 16.
The length of the payload is not provided. A reliable, 8-bit clean,
transport layer is assumed.
+
+## Wasm Packets
+
+The packet below are supported by the
+[WAMR](https://github.com/bytec
DavidSpickett wrote:
> I do wonder if we can reliably instruction step over every instruction on
> every target (atomics instructions/sequences seem to be a sore point).
https://github.com/llvm/llvm-project/issues/34572 /
https://github.com/llvm/llvm-project/issues/24318 /
https://github.com/
DavidSpickett wrote:
Will need some time to give this proper attention, but -
> The original goal of my work was to enable watchpoint functionality at any
> cost on targets without hardware watchpoint support, in particular riscv.
Can you be specific here, what is the state of watchpoints for
https://github.com/DavidSpickett closed
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DavidSpickett wrote:
> Because we report zero registers, we don't show any registers when you do reg
> read -a. I guess we could support one reigster set with one register, but I'm
> not convinced it's worth it. You can still show the PC with p $pc though.
That's fine then.
The pedant line he
@@ -667,138 +736,331 @@ static auto
testExpressionVendorExtensions(lldb::ModuleSP module_sp,
TEST(DWARFExpression, Extensions) {
const char *yamldata = R"(
!ELF
+--- !WASM
FileHeader:
- Class: ELFCLASS64
- Data:ELFDATA2LSB
- Type:ET_EXEC
- Machine: EM_38
@@ -18,27 +21,114 @@
#include "lldb/Core/dwarf.h"
#include "lldb/Host/HostInfo.h"
#include "lldb/Symbol/ObjectFile.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/StreamString.h"
#include "llvm/ADT/StringExtras.h"
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
@@ -0,0 +1,17 @@
+# REQUIRES: clang
+
+# RUN: %clang_host -g -O0 %S/Inputs/ubsan_add_overflow.cpp -o %t.out \
DavidSpickett wrote:
Also I have a feeling this doesn't need to be host, because the shell tests can
be run remotely. I looked at the other tests and th
DavidSpickett wrote:
Also surprised that we didn't have tests for this already, but I presume that's
why you are contributing this now.
https://github.com/llvm/llvm-project/pull/151231
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@@ -0,0 +1,8 @@
+#include
DavidSpickett wrote:
Not that important but I'd make this a C file not cpp since we don't use any
C++ features.
https://github.com/llvm/llvm-project/pull/151231
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@@ -0,0 +1,8 @@
+#include
+
+int main() {
+ volatile int a = INT_MAX;
+ volatile int b = 1;
+ volatile int c = a + b;
+ return c;
DavidSpickett wrote:
I think this could be done in one line. `return INT_MAX + 1;` assuming INT_MAX
defaults to `unsigned int`
@@ -0,0 +1,17 @@
+# REQUIRES: clang
DavidSpickett wrote:
No other test has this requirement. I think we're assuming that
LLDB_TEST_COMPILER is always clang or something that can act like it. Which
might be a bad thing in itself but I think means you don't need
https://github.com/DavidSpickett commented:
Some comments since I'm here but I leave it to your chosen reviewers to do the
rest.
https://github.com/llvm/llvm-project/pull/151231
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DavidSpickett wrote:
FYI I put the tagged people in reviewers for you (GitHub probably isn't letting
you do that yourself, at some point you'll get permissions to do so). This way
we don't land this with @ s in there and create an endless series of pings as
llvm forks pull in this change.
Mys
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These entries serve the same purpose as the Linux HWCAPs but have been assigned
different numbers as FreeBSD had already used the Linux ones.
The numbers were assigned in:
https://github.com/freebsd/freeb
DavidSpickett wrote:
Ignore that failure, it "fixed" itself.
https://github.com/llvm/llvm-project/pull/147198
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DavidSpickett wrote:
> This PR implements a register context for Wasm, which uses virtual registers
> to resolve Wasm local, globals and stack values.
As I understand it, we internally are adding virtual registers, because that's
the metaphor lldb is used to. For users, `register read --all`
https://github.com/DavidSpickett approved this pull request.
LGTM.
https://github.com/llvm/llvm-project/pull/150143
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DavidSpickett wrote:
Thanks! Ok good enough for me, and at some point I'll put some time into
working with Wasm so I can better review in future.
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@@ -23,19 +27,68 @@ def format_register_value(val):
return result
+class WasmStackFrame:
+def __init__(self, address):
+self._address = address
+
+def format(self):
+return format_register_value(LOAD_ADDRESS | self._address)
+
+
+class WasmCallStac
@@ -23,19 +27,68 @@ def format_register_value(val):
return result
+class WasmStackFrame:
+def __init__(self, address):
+self._address = address
+
+def format(self):
+return format_register_value(LOAD_ADDRESS | self._address)
+
+
+class WasmCallStac
@@ -32,3 +33,22 @@ llvm::Expected>
ThreadWasm::GetWasmCallStack() {
}
return llvm::createStringError("no process");
}
+
+lldb::RegisterContextSP
+ThreadWasm::CreateRegisterContextForFrame(StackFrame *frame) {
+ lldb::RegisterContextSP reg_ctx_sp;
DavidSpi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -131,3 +131,64 @@ ProcessWasm::GetWasmCallStack(lldb::tid_t tid) {
return call_stack_pcs;
}
+
+llvm::Expected ProcessWasm::GetWasmLocal(int frame_index,
DavidSpickett wrote:
This feels like the same code with 3 different qWhatever. Can it be made into a
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
DavidSpickett wrote:
Add a subtitle
@@ -0,0 +1,128 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -0,0 +1,228 @@
+--- !WASM
DavidSpickett wrote:
In one of the test 3 files here, you need to explain how this was generated. I
see a C file, do you compile that to Wasm with DWARF debug enabled?
https://github.com/llvm/llvm-project/pull/151056
___
@@ -2014,6 +2014,45 @@ read packet:
$9c010040e5010040fe010040#
supported by the [WAMR](https://github.com/bytecodealliance/wasm-micro-runtime)
and [V8](https://v8.dev) Wasm runtimes.
+## qWasmGlobal
+
+Get the value of a Wasm global variable for the gi
@@ -0,0 +1,128 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apa
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@@ -131,3 +131,64 @@ ProcessWasm::GetWasmCallStack(lldb::tid_t tid) {
return call_stack_pcs;
}
+
+llvm::Expected ProcessWasm::GetWasmLocal(int frame_index,
DavidSpickett wrote:
DoGetWasmValue maybe. It's private so the name is not that important.
https://g
https://github.com/DavidSpickett commented:
Looks to be a stacked PR, so I just looked at the last commit.
https://github.com/llvm/llvm-project/pull/151056
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@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
@@ -0,0 +1,78 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -18,27 +21,114 @@
#include "lldb/Core/dwarf.h"
#include "lldb/Host/HostInfo.h"
#include "lldb/Symbol/ObjectFile.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/StreamString.h"
#include "llvm/ADT/StringExtras.h"
@@ -0,0 +1,78 @@
+//===--===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apac
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
@@ -667,138 +736,331 @@ static auto
testExpressionVendorExtensions(lldb::ModuleSP module_sp,
TEST(DWARFExpression, Extensions) {
const char *yamldata = R"(
!ELF
+--- !WASM
FileHeader:
- Class: ELFCLASS64
- Data:ELFDATA2LSB
- Type:ET_EXEC
- Machine: EM_38
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
@@ -18,27 +21,114 @@
#include "lldb/Core/dwarf.h"
#include "lldb/Host/HostInfo.h"
#include "lldb/Symbol/ObjectFile.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/StreamString.h"
#include "llvm/ADT/StringExtras.h"
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
DavidSpickett wrote:
Init this to 0.
In theory it doesn't make a diff
@@ -18,27 +21,114 @@
#include "lldb/Core/dwarf.h"
#include "lldb/Host/HostInfo.h"
#include "lldb/Symbol/ObjectFile.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/RegisterValue.h"
#include "lldb/Utility/StreamString.h"
#include "llvm/ADT/StringExtras.h"
@@ -2300,9 +2301,40 @@ llvm::Expected DWARFExpression::Evaluate(
break;
}
+case DW_OP_WASM_location: {
+ uint8_t wasm_op = opcodes.GetU8(&offset);
+ uint32_t index;
+
+ /* LLDB doesn't have an address space to represents WebAssembly locals,
+
https://github.com/DavidSpickett edited
https://github.com/llvm/llvm-project/pull/151010
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https://github.com/DavidSpickett commented:
Mostly nits and kinda thought about the DWARF side with refernce to
https://yurydelendik.github.io/webassembly-dwarf/, but I've not done a lot with
the parsing code so I don't know about the details.
Nominate @Michael137 to also review, or pass it on
DavidSpickett wrote:
Please include in the PR description a citation / standards reference /
whatever as best you can for the specification of this operation. It doesn't
look vendor specific but it doesn't appear in the DWARF 5 standard.
https://yurydelendik.github.io/webassembly-dwarf/ is fro
DavidSpickett wrote:
/cherry-pick d26ca8b87266024546501051ccaf75cb3756aee3
0209e76fe6440bc45a9ed61b9671d9593db10957
https://github.com/llvm/llvm-project/pull/145033
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https://github.com/DavidSpickett milestoned
https://github.com/llvm/llvm-project/pull/145033
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https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/147198
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DavidSpickett wrote:
If it helps, people (including me) have made much bigger messes :)
We're all good, going to merge this now.
https://github.com/llvm/llvm-project/pull/147198
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https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/145033
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@@ -2076,6 +2076,13 @@ size_t Platform::GetSoftwareBreakpointTrapOpcode(Target
&target,
trap_opcode_size = sizeof(g_loongarch_opcode);
} break;
+ case llvm::Triple::wasm32: {
+// Unreachable (0x00) triggers an unconditional trap.
DavidSpickett wrot
https://github.com/DavidSpickett updated
https://github.com/llvm/llvm-project/pull/145033
>From 6abc5409e823f1de5cd2c60d228aafed2fb32465 Mon Sep 17 00:00:00 2001
From: David Spickett
Date: Thu, 19 Jun 2025 13:12:49 +
Subject: [PATCH 1/2] [lldb][AArch64][Linux] Show MTE store only setting in
https://github.com/DavidSpickett edited
https://github.com/llvm/llvm-project/pull/145033
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https://github.com/DavidSpickett closed
https://github.com/llvm/llvm-project/pull/145029
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