Signed-off-by: Zhao Qiang
---
drivers/soc/fsl/qe/qe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 2ef6fc6..d48fa4a 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b/drivers/soc/fsl/qe/qe.c
@@ -229,7 +229,9 @@ int qe_setbrg(enum qe_clock
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
Changes for v4
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and comm
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v6:
- new added
Changes for v7:
- fix warning
drivers/irqchip/irq-qeic.c | 34 --
include
Shift should be TX_SYNC_SHIFT_BASE if mode != COMM_DIR_RX
Signed-off-by: Zhao Qiang
---
drivers/soc/fsl/qe/ucc.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/soc/fsl/qe/ucc.c b/drivers/soc/fsl/qe/ucc.c
index c646d87..681f7d4 100644
--- a/drivers/soc/fsl/qe
modify get_qe_base function with of_address_to_resource
instead of of_get_property and of_translate_address.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- na
Changes for v4:
- na
Changes for v5:
- na
Changes for v6:
- na
drivers
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
Changes for v4
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and comm
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v6:
- new added
drivers/irqchip/irq-qeic.c | 28 +---
include/soc/fsl/qe/qe_ic.h | 12 ++--
2 files
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
cpm_qe is supported on both powerpc and arm.
and the QE code has been moved from arch/powerpc into
drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl
to soc/fsl
Signed-off-by: Zhao Qiang
Acked-by: Rob Herring
---
Changes for v3
- NA
Changes for v4
- NA
Changes for v5
add qe node to t104xrdb.dtsi
Signed-off-by: Zhao Qiang
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38
Add uqe_serial document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
Signed-off-by: Zhao Qiang
---
Changes for v2
- modify tx/rx-clock-name specification
Changes for v3
- NA
Changes for v4
- drop device_type
- modify to SoC specific
Add IC, SI and SIRAM document of QE to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt
Signed-off-by: Zhao Qiang
Acked-by: Rob Herring
---
changes for v2
- Add interrupt-controller in Required properties
- delete address-cells and size-cells for qe-si and qe-siram
Add ucc hdlc document to
Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt
Signed-off-by: Zhao Qiang
Acked-by: Rob Herring
---
hanges for v2
- use ucc-hdlc instead of ucc_hdlc
- add more information to properties.
Changes for v3
- use fsl,tx-timeslot-mask
add qe node to t104xqds.dtsi
Signed-off-by: Zhao Qiang
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38
add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi.
Signed-off-by: Zhao Qiang
---
Changes for v2
- rebase
Changes for v3
- rebase
Changes for v4
- rebase
Changes for v5
- rebase
Changes for v6
- NA
arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- use strcmp instead of strcasecmp
drivers/soc/fsl/qe/qe.c | 6 ++
include/soc/fsl/qe/qe.h | 2 ++
include/soc/fsl/qe/ucc_fast.h | 2 ++
3 files
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- break codes getting clock_bits and source to smaller functions.
- add __iomem to qe_mux_reg
- add bits operation functions for qe and use it
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- delete dead code
- use strcmp instead of strcasecmp
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject
include/soc/fsl/qe/ucc_fast.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b2633b7..e898895 100644
--- a/include/soc/fsl/qe
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- remove useless code.
- remove Unnecessary casts
- return IRQ_NONE when there are no interrupt
- remove Useless comments
Rx_sync and tx_sync are used by QE-TDM mode,
add them to struct ucc_fast_info.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- use strcmp instead of strcasecmp
Changes for v3:
- na
drivers/soc/fsl/qe/qe.c | 6 ++
include/soc/fsl/qe/qe.h | 2 ++
include/soc/fsl
Add tdm clock configuration in both qe clock system and ucc
fast controller.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- break codes getting clock_bits and source to smaller functions.
- add __iomem to qe_mux_reg
- add bits operation functions for qe and use it
QE has module to support TDM, some other protocols
supported by QE are based on TDM.
add a qe-tdm lib, this lib provides functions to the protocols
using TDM to configurate QE-TDM.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- delete dead code
- use strcmp instead of strcasecmp
The driver add hdlc support for Freescale QUICC Engine.
It support NMSI and TSA mode.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- remove useless code.
- remove Unnecessary casts
- return IRQ_NONE when there are no interrupt
- remove Useless comments
Changes
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject
Changes for v3:
- na
include/soc/fsl/qe/ucc_fast.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/soc/fsl/qe/ucc_fast.h b/include/soc/fsl/qe/ucc_fast.h
index b2633b7..e898895 100644
--- a
The codes of qe_ic_init in platforms are redundant,
move them to qe_ic under irqchip
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/misc.c| 15 ---
arch/powerpc/platforms/85xx/corenet_generic.c | 9 -
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 14
there are init_qe_ic_sysfs and qeic_of_init, refactor
them.
Signed-off-by: Zhao Qiang
---
drivers/irqchip/qe_ic.c| 83 +-
include/soc/fsl/qe/qe_ic.h | 7
2 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/irqchip
cade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit ms
cade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/misc.c| 15
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
The driver stays the same.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
drivers/irqchip/Makefile| 1 +
drivers/{soc/fsl/qe => irqchip}/qe_ic.c | 0
drivers/{soc/fsl/qe => irqchip}/qe_ic.h | 0
drivers/soc/fsl/qe/Ma
modify get_qe_base function with of_address_to_resource
instead of of_get_property and of_translate_address.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- na
Changes for v4:
- na
Changes for v5:
- na
drivers/soc/fsl/qe/qe.c | 10
QE was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms. so remove PPCisms.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- na
Changes for v3:
- add NO_IRQ
Changes for v4:
- modify spin_event_timeout to opencoded timeout loop
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and comm
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
drivers/irqchip/Makefile
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
Changes for v4
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and comm
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify the subject and commit msg
Changes for v3:
- merge .h file to .c, rename it with irq-qeic.c
Changes for v4
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and comm
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
Changes for v2:
- modify subject and commit msg
- return 0 and add
Signed-off-by: Zhao Qiang
---
Changes for v2:
- include all Errata QE_General4 in #ifdef
drivers/soc/fsl/qe/qe.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/soc/fsl/qe/qe.c b/drivers/soc/fsl/qe/qe.c
index 2ef6fc6..4ac9ce8 100644
--- a/drivers/soc/fsl/qe/qe.c
+++ b
when apply the second patch, in fact, there was
no compile issue
when apply all the patches of this patchset
Zhao Qiang (4):
irqchip/qeic: move qeic driver from drivers/soc/fsl/qe
Changes for v2:
- modify the subject and commit msg
Changes for v3
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
drivers/{soc/fsl/qe/qe_ic.c => irqc
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/misc.c| 15
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
drivers/irqchip/irq-qeic.c | 90
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
arch/powerpc/platforms/83xx/mpc832x_mds.c
when apply the second patch, in fact, there was
no compile issue
when apply all the patches of this patchset
Changes for v10:
- simplify codes, remove duplicated codes
Zhao Qiang (4):
irqchip/qeic: move qeic driver from drivers/soc/fsl/qe
Changes for v2
move the driver from drivers/soc/fsl/qe to drivers/irqchip,
merge qe_ic.h and qe_ic.c into irq-qeic.c.
Signed-off-by: Zhao Qiang
---
MAINTAINERS| 6 ++
drivers/irqchip/Makefile | 1 +
drivers/{soc/fsl/qe/qe_ic.c => irqc
e_ic_init(np, 0, qe_ic_cascade_muxed_mpic, NULL);".
qe_ic_cascade_muxed_mpic was used for boards has the same interrupt
number for low interrupt and high interrupt, qe_ic_init has checked
if "low interrupt == high interrupt"
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/misc.c| 15
qeic_of_init just get device_node of qeic from dtb and call qe_ic_init,
pass the device_node to qe_ic_init.
So merge qeic_of_init into qe_ic_init to get the qeic node in
qe_ic_init.
Signed-off-by: Zhao Qiang
---
drivers/irqchip/irq-qeic.c | 90
QEIC was supported on PowerPC, and dependent on PPC,
Now it is supported on other platforms, so remove PPCisms.
Signed-off-by: Zhao Qiang
---
arch/powerpc/platforms/83xx/km83xx.c | 1 -
arch/powerpc/platforms/83xx/misc.c| 1 -
arch/powerpc/platforms/83xx/mpc832x_mds.c
Do you have any solutions?
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Friday, September 13, 2013 12:42 AM
To: Liu Shengzhou-B36685
Cc: Zhao Qiang-B45475; linuxppc-dev@lists.ozlabs.org
Subject: Re: [PATCH] powerpc/p1010rdb:remove interrupts of ethernet
On Sep 13, 2013, at 12:42 AM, Kumar Gala wrote:
> -Original Message-
> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
> Sent: Friday, September 13, 2013 12:42 AM
> To: Liu Shengzhou-B36685
> Cc: Zhao Qiang-B45475; linuxppc-dev@lists.ozlabs.org
> Subject: R
On Sat, 2013-09-28 at 5:35 AM, Scott wrote:
> -Original Message-
> From: Wood Scott-B07421
> Sent: Saturday, September 28, 2013 5:35 AM
> To: Zhao Qiang-B45475
> Cc: linuxppc-dev@lists.ozlabs.org; Liu Shengzhou-B36685
> Subject: Re: [PATCH] powerpc/p1010rdb:update dts to
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