From: Tom Musta
This patch modifies the endian chicken switch in the single step
emulation code (emulate_step()). The old (big endian) code bailed
early if a load or store instruction was to be emulated in little
endian mode.
The new code modifies the check and only bails in a cross-endian
From: Tom Musta
This patch series addresses bugs in the PowerPC single-step emulation
code (arch/powerpc/lib/sstep.c) pertaining to Little Endian.
The existing code has a chicken switch for little endian. The first
patch softens the restriction so that only cross-endian modes are not
supported
From: Tom Musta
This patch modifies the unaligned access routines of the sstep.c
module so that it properly reverses the bytes of storage operands
in the little endian kernel kernel.
Signed-off-by: Tom Musta
---
arch/powerpc/lib/sstep.c | 45 +
1
From: Tom Musta
This patch addresses unaligned single precision floating point loads
and stores in the single-step code. The old implementation
improperly treated an 8 byte structure as an array of two 4 byte
words, which is a classic little endian bug.
Signed-off-by: Tom Musta
---
arch
To: linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] powerpc: Unaligned stores and stmw are broken in PowerISA
emulation code
From: Tom Musta
The stmw instruction was incorrectly decoded as an update form instruction
and thus the RA
register was being clobbered.
Also, the utility routine to
To: linuxppc-dev@lists.ozlabs.org
Subject: [PATCH] powerpc: OE=1 Form Instructions Not Decoded Correctly
From: Tom Musta
PowerISA uses instruction bit 21 to indicate that the overflow (OV) bit
of the XER is to be set, as well as its corresponding sticky bit (SO).
This patch addresses two defects
mangled.
I will find a better setup and resubmit.
> Isn't that code occasionally used with uprobes too nowadays ?
Yes. I believe so.
Tom Musta (tmu...@us.ibm.com)
Senior Software Engineer
Blue Gene Kernel Development
IBM Rochester
(507) 253-4
> > Isn't that code occasionally used with uprobes too nowadays ?
>
> Yes. I believe so.
I'm going to back-pedal a little. I reread code and can connect
single step code to kprobes but not necessarily to uprobes. So
I am not sure that this code is used with uprobes.
On 9/13/2013 7:49 PM, Sukadev Bhattiprolu wrote:
Implement is_instr_load_store() to detect whether a given instruction
is one of the fixed-point or floating-point load/store instructions.
This function will be used in a follow-on patch to save memory hierarchy
information of the load/store.
+/*
On 10/3/2013 2:03 PM, Sukadev Bhattiprolu wrote:
Michael Ellerman [mich...@ellerman.id.au] wrote:
|
| if (lower == 6)
| if (upper <= 1)
| return true;
| return false;
v
Note that this case covers the lvsl/lvsr instructions, which, despite their
This patch series fixes two bugs in the PowerPC Little Endian alignment
handler.
Tom Musta (2):
powerpc: Fix Handler of Unaligned Load/Store Strings
powerpc: Enable Little Endian Alignment Handler for Float Pair
Instructions
arch/powerpc/kernel/align.c | 25
byte swapping flag for the string instructions
in little endian builds. This effectively disables the byte swapping
logic.
Signed-off-by: Tom Musta
---
arch/powerpc/kernel/align.c | 21 -
1 files changed, 16 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel
This patch enables alignment handling for the load/store floating point
pair instructions (lfdp, lfdpx, stfdp, stfdpx). The handler routine
is properly coded and only needs to be enabled.
Signed-off-by: Tom Musta
---
arch/powerpc/kernel/align.c |6 --
1 files changed, 0 insertions
general problem with unaligned little endian loads and stores.
This is addressed by the second patch.
Finally, there is a problem with unaligned single precision floating point
loads and stores which is addressed by the third patch.
Tom Musta (3):
powerpc: Enable emulate_step In Little Endian Mode
a kernel compiled for BE and vice verse).
Signed-off-by: Tom Musta
---
arch/powerpc/lib/sstep.c | 12 +---
1 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index b1faa15..5e0d0e9 100644
--- a/arch/powerpc/lib/sstep.c
reversal operation.
Signed-off-by: Tom Musta
---
arch/powerpc/lib/sstep.c | 45 +
1 files changed, 45 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index 5e0d0e9..570f2af 100644
--- a/arch/powerpc/lib
This patch addresses unaligned single precision floating point loads
and stores in the single-step code. The old implementation
improperly treated an 8 byte structure as an array of two 4 byte
words, which is a classic little endian bug.
Signed-off-by: Tom Musta
---
arch/powerpc/lib/sstep.c
On 10/30/2013 12:43 PM, Andreas Schwab wrote:
Tom Musta writes:
+#ifdef __LITTLE_ENDIAN__
+ if (!regs->msr & MSR_LE)
That won't work.
Andreas.
Please elaborate.
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On 10/30/2013 2:43 PM, Geert Uytterhoeven wrote:
On Wed, Oct 30, 2013 at 8:35 PM, Tom Musta wrote:
On 10/30/2013 12:43 PM, Andreas Schwab wrote:
Tom Musta writes:
+#ifdef __LITTLE_ENDIAN__
+ if (!regs->msr & MSR_LE)
That won't work.
Andreas.
Please elaborate.
On 11/3/2013 8:34 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2013-10-31 at 13:38 -0500, Tom wrote:
>> From: Tom Musta
>>
>> This patch addresses unaligned single precision floating point loads
>> and stores in the single-step code. The old implementation
>
On 4/30/2014 1:45 AM, Michael Ellerman wrote:
>> > Are 40x considered booke?
> You tell me.
>
The original 401, 403 and 405 cores predate the actual existence of what we now
call Book E.
But they most certainly contained features that would eventually become Book E
(different timers,
software
(c) (('0' <= (c) && (c) <= '9') \
>|| ('a' <= (c) && (c) <= 'f') \
>
Philippe: Wouldn't it be better to just do a 32-bit load and let the
endianness be worked out
by the hardware? i.e.
#define GETWORD(v) (*(u32 *)v)
Tom
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On 12/10/2013 10:57 PM, Paul Mackerras wrote:
> On Wed, Dec 11, 2013 at 02:54:40PM +1100, Paul Mackerras wrote:
>> This breaks 32-bit big-endian (as well as making the code longer and
>> more complex).
>
> And in fact none of this code will get executed in little-endian mode
> anyway, since we st
On 12/12/2013 9:08 AM, Tom Musta wrote:
> On 12/10/2013 10:57 PM, Paul Mackerras wrote:
>> On Wed, Dec 11, 2013 at 02:54:40PM +1100, Paul Mackerras wrote:
>
>>> This breaks 32-bit big-endian (as well as making the code longer and
>>> more complex).
>>
>&
On 2/6/2014 12:08 PM, Peter Zijlstra wrote:
>>> Can you pair lwarx with sthcx ? I couldn't immediately find the answer
>>> > > in the PowerISA doc. If so I think you can do better by being able to
>>> > > atomically load both tickets but only storing the head without affecting
>>> > > the tail.
>>
. Same as commit 9a45a9407c69 ("powerpc/perf:
power_pmu_start restores incorrect values, breaking frequency events")
for book3s.
Signed-off-by: Tom Huynh
---
arch/powerpc/perf/core-fsl-emb.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/perf/core-f
Update the fields in perf_event_attr as currently seen in
include/uapi/linux/perf_event.h
Remove outdated comments on the config field
The doc has not account for commit a21ca2cac582 ("perf_counter:
Separate out attr->type from attr->config").
Signed-off-by: Tom H
events available for perf")
Signed-off-by: Tom Huynh
---
arch/powerpc/include/asm/perf_event_fsl_emb.h | 20 +-
arch/powerpc/perf/core-fsl-emb.c | 12 ++
arch/powerpc/perf/e6500-events-list.h | 289 ++
arch/powerpc/perf/e6500-pmu.c
This patch set adds generic events, specific events, and format attribute
for the e6500 pmu to sysfs. This makes perf more convenient to use on the
e6500 by allowing the users to see all supported events and specify
events using meaningful names instead of raw event codes.
This patchset includes s
7ece6e ("perf/POWER7: Create a sysfs format
entry for Power7 events").
Signed-off-by: Kim Phillips
Signed-off-by: Tom Huynh
---
arch/powerpc/perf/e6500-pmu.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/arch/powerpc/perf/e6500-pmu.c b/arch/powerpc/perf/e6500-pmu.c
7;s just more
convenient not having to go to a website to look for
the event file that matches the machine to download.
The distro package or the perf make mechanism can put these
files into the appropriate directory. The users who are not
perf developers won't need to know about these files.
- Tom
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Do we also need to add a "spu" ppc syscall
table? Some clarification on the syscalls marked "spu" and "nospu"
would be greatly appreciated.
Thanks.
Tom
On 2/11/19 11:54 AM, Tom Hromatka wrote:
PowerPC experts,
Paul Moore and I are working on the v2.4 release of libseccomp,
and as part of this work I need to update the syscall table for
each architecture.
I have incorporated the new ppc syscall.tbl into libseccomp, but
I am not familiar with
executed in supervisor mode. We
tried that before resorting to manual cache line management with
usermode-safe assembly calls.
Regards,
Tom Burns
International Datacasting Corporation
Mikhail Zolotaryov wrote:
Hi,
Why manage cache lines manually, if appropriate code is a part of
__dma_sync
l panic - not syncing: Aiee, killing interrupt handler!
Rebooting in 180 seconds..
Cheers,
Tom
Mikhail Zolotaryov wrote:
Hi Tom,
possible solution could be to use tasklet to perform DMA-related job
(as in most cases DMA transfer is interrupt driven - makes sense).
Tom Burns wrote:
Hi,
Wi
g for this area. I guess
the kernel swaps TLB entries on the fly so it isn't limited to only 64
entries? I will try to sleep in the same context as the
dma_alloc_coherent call to try to catch the TLB entry while loaded to
see if it has the I bit set.
If that fails, any ideas?
Th
Hi Ben,
Benjamin Herrenschmidt wrote:
On Wed, 2009-09-09 at 09:43 -0400, Tom Burns wrote:
Hi,
With the default config for the Sequoia board on 2.6.24, calling
pci_dma_sync_sg_for_cpu() results in executing
invalidate_dcache_range() in arch/ppc/kernel/misc.S from __dma_sync().
This
- it seemingly can't
allocate and
use any additional resources.
How do I 'customize' and/or add resources at this point for this device (using
semi-standard mechanisms)?
Thanks in advance for any/all ideas...
I
Tom Morrison
Principal Software Engineer
EMPIRIX
20 Crosby Drive -
associated with it...
Any other thoughts - whenever you can make them - would
be more than welcome!
Tom
>> -Original Message-
>> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
>> Sent: Wednesday, September 23, 2009 5:42 AM
>> To: Morrison, Tom
>&g
a newbie at this
level of PCI configuration).
Thank you in advance to any/all who can help me figure this out!
Tom
>> -Original Message-
[Morrison, Tom]
>>
>> There's a few things you can do, though I don't have time just right now
>> to give you a
separate audio and video nodes and was not being properly
assigned interrupts. (Either 'cannot grab irq 0' or type of assigned
interrupt wrt 'edge/level' was incorrect).
Signed off by: Tom Arbuckle
__
Regards,
Tom Arbuckle
Homepage: http://www.ece.ul.ie/homepage/Tom_A
entry without seeing
the unprintable characters ?
Tom
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explicitly
make sure there are NO SPE instructions in the application, nothing bad
happens!
I am polling the MSR - and it seems the SPE is turned OFF?
What have I done wrong and/or has there been fixes in later kernels that
I should be aware of that might help this issue?
Tom Morrison
was REALLY asking - has anybody else run into this type of
problem,
and/or the Linux community has recognized this problem and has fixed
this?
--
I hope I am a little clearer in the history / and outline of the
problem I am trying to solve this time?
Thanks in advance!
Tom Morrison
>>
Ok...taken out...
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Tuesday, May 05, 2009 5:18 PM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Michael Neuling
>> Subject: Re: MSR_SPE - being turned off...
&
of each GPR into these doubles...
We could then re-test and see if this helps?
Tom
>> -Original Message-
>> From: Michael Neuling [mailto:mi...@neuling.org]
>> Sent: Tuesday, May 05, 2009 8:02 PM
>> To: Morrison, Tom
>> Cc: Kumar Gala; linuxppc-dev@ozlabs.o
will keep
trying
thank you for your patience and suggestions on this...and I will keep working it
Tom
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Wed 5/6/2009 12:23 AM
To: Morrison, Tom
Cc: Michael Neuling; linuxppc-dev@ozlabs.org
Subject: Re
agement), so thank you for any insight you
may have on this front...
Tom
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, May 06, 2009 8:32 AM
>> To: Morrison, Tom
>> Cc: Michael Neuling; linuxppc-dev@ozlabs.org
iginal Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, May 06, 2009 8:44 AM
>> To: Morrison, Tom
>> Cc: Michael Neuling; linuxppc-dev@ozlabs.org
>> Subject: Re: MSR_SPE - being turned off...
>>
>> Can you describe the # of p
ere
after the context switches back (if some other task does something
else with the entire 64bits).
Tom
>>
>> >> -Original Message-
>> >> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> >> Sent: Wednesday, May 06, 2009
ses this exception (so we can run in user application land
and see if the symptoms are similar))?
Thank you in advance for any / all help you can provide
because I am completely stumped on even how to proceed!
Sincerely,
Tom Morrison
Principal Software Engineer
EMPIRIX
20 Crosby Drive - Bed
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Thursday, May 21, 2009 9:13 AM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Young, Andrew; Brown, Jeff
>> Subject: Re: How to debug a hung multi-cor
org]
>> Sent: Thursday, May 21, 2009 10:45 AM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Young, Andrew; Brown, Jeff; Geary Sean-
>> R60898
>> Subject: Re: How to debug a hung multi-core system
>>
>> > [Morrison, Tom]
>> > >B
first problem(s) is how can/when did this TLB get
corrupted!
Tom
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s found this problem before - are we the
first to be this unlucky? I am not sure that is a good thing!
Comments? Suggestions? What else should I be doing with this
information?
Tom Morrison
Principal Software Engineer
EMPIRIX
20 Crosby Drive - Bedford, MA 01730
p: 781.266.3567 f: 781.266.3670
email
ound empty body in an 'if' statement [-Werror=empty-body]
333 | ;
| ^
These if-checks do not do anything so remove them.
Signed-off-by: Tom Rix
---
arch/powerpc/platforms/cell/spu_base.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/ar
you choose to split the tv_sec and tv_nsec
set_ functions. Do any callers not set them both? Wouldn't a
single call enable a more atomic behavior someday?
inode_ctime_set_sec_nsec(struct inode *, time64_t, time64_t)
(or simply initialize a timespec64 and use inode_ctime_spec() )
Tom.
+
On 6/21/2023 2:01 PM, Jeff Layton wrote:
On Wed, 2023-06-21 at 13:29 -0400, Tom Talpey wrote:
On 6/21/2023 10:45 AM, Jeff Layton wrote:
struct timespec64 has unused bits in the tv_nsec field that can be used
for other purposes. In future patches, we're going to change how the
inode->i_
version, sizeof(drvinfo->fw_version), "%d.%d.%d",
XGMAC_GET_BITS(hw_feat->version, MAC_VR, USERVER),
For drivers/net/ethernet/amd/xgbe/xgbe-ethtool.c
Acked-by: Tom Lendacky
whose pfn is 600
*#
Result on x86 with patch (page size 4K)
*# ./hugepage-vmemmap
Returned address is 0x7fc7c2c0 whose pfn is 1dac00
*#
Signed-off-by: Donet Tom
Reported-by : Geetika Moolchandani (geet...@linux.ibm.com)
Tested-by : Geetika Moolchandani (geet...@linux.ibm.com)
---
tools/testing
ght thing to do. The build system does
not need to manipulate the link order of head.o.
Signed-off-by: Jisheng Zhang
Link: https://lore.kernel.org/r/20221018141200.1040-1-jszh...@kernel.org
Signed-off-by: Palmer Dabbelt
Signed-off-by: Tom Saeger
---
scripts/head-object-list.txt | 1 -
1 file
bf4421 ("riscv: remove special treatment for the link order of
head.o")
Reported-by: Dennis Gilmore
Suggested-by: Ard Biesheuvel
Signed-off-by: Masahiro Yamada
Acked-by: Palmer Dabbelt
Signed-off-by: Tom Saeger
---
include/asm-generic/vmlinux.lds.h | 5 +
1 file changed, 5
43628.git.tom.sae...@oracle.com/
[3] https://lore.kernel.org/all/cover.1670358255.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
Jisheng Zhang (1):
riscv: remove special treatment for the link order of head.o
Masahiro Yamada (3):
arm64: remove special treatment for the l
d-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-1-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kernel/vmlinux.lds.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/vmlinux.lds.S
b/arch/powerpc/kernel/vmlinux.lds.S
index 8
y discarding .rela* only when CONFIG_RELOCATABLE
is disabled.
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Signed-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-2-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kerne
th binutils 2.36+, but it is better
to not rely on it."
Link:
https://lkml.kernel.org/r/9166a8abdc0f979e50377e61780a4bba1dfa2f52.1674518464.git.tom.sae...@oracle.com
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Link: https://lore.kernel.org/all/Y7Jal56f6UBh1abE@dev-arch.thelio-3990X/
Link: https://lore.ke
bf4421 ("riscv: remove special treatment for the link order of
head.o")
Reported-by: Dennis Gilmore
Suggested-by: Ard Biesheuvel
Signed-off-by: Masahiro Yamada
Acked-by: Palmer Dabbelt
Signed-off-by: Tom Saeger
---
include/asm-generic/vmlinux.lds.h | 5 +
1 file changed, 5
://lore.kernel.org/all/cover.1670358255.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
Masahiro Yamada (2):
arch: fix broken BuildID for arm64 and riscv
s390: define RUNTIME_DISCARD_EXIT to fix link error with GNU ld < 2.36
Michael Ellerman (2):
powerpc/vmlinux.l
d-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-1-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kernel/vmlinux.lds.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/vmlinux.lds.S
b/arch/powerpc/kernel/vmlinux.lds.S
index 1
y discarding .rela* only when CONFIG_RELOCATABLE
is disabled.
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Signed-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-2-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kerne
990X/
Reported-by: Nathan Chancellor
Signed-off-by: Masahiro Yamada
Link: https://lore.kernel.org/r/20230105031306.1455409-1-masahi...@kernel.org
Signed-off-by: Heiko Carstens
Signed-off-by: Tom Saeger
---
arch/s390/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/a
th binutils 2.36+, but it is better
to not rely on it."
Link:
https://lkml.kernel.org/r/9166a8abdc0f979e50377e61780a4bba1dfa2f52.1674518464.git.tom.sae...@oracle.com
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Link: https://lore.kernel.org/all/Y7Jal56f6UBh1abE@dev-arch.thelio-3990X/
Link: https://lore.ke
bf4421 ("riscv: remove special treatment for the link order of
head.o")
Reported-by: Dennis Gilmore
Suggested-by: Ard Biesheuvel
Signed-off-by: Masahiro Yamada
Acked-by: Palmer Dabbelt
Signed-off-by: Tom Saeger
---
include/asm-generic/vmlinux.lds.h | 5 +
1 file changed, 5
d-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-1-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kernel/vmlinux.lds.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/vmlinux.lds.S
b/arch/powerpc/kernel/vmlinux.lds.S
index 4
nel.org/all/cover.1670358255.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
Masahiro Yamada (2):
arch: fix broken BuildID for arm64 and riscv
s390: define RUNTIME_DISCARD_EXIT to fix link error with GNU ld < 2.36
Michael Ellerman (2):
powerpc/vmlinux.lds: Define RUN
y discarding .rela* only when CONFIG_RELOCATABLE
is disabled.
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Signed-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-2-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kerne
th binutils 2.36+, but it is better
to not rely on it."
Link:
https://lkml.kernel.org/r/9166a8abdc0f979e50377e61780a4bba1dfa2f52.1674518464.git.tom.sae...@oracle.com
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Link: https://lore.kernel.org/all/Y7Jal56f6UBh1abE@dev-arch.thelio-3990X/
Link: https://lore.ke
990X/
Reported-by: Nathan Chancellor
Signed-off-by: Masahiro Yamada
Link: https://lore.kernel.org/r/20230105031306.1455409-1-masahi...@kernel.org
Signed-off-by: Heiko Carstens
Signed-off-by: Tom Saeger
---
arch/s390/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/a
d extend commit message. ]
Signed-off-by: H.J. Lu
Signed-off-by: Borislav Petkov
Reviewed-by: Kees Cook
Link: https://lkml.kernel.org/r/20200326193021.255002-1-hjl.to...@gmail.com
Signed-off-by: Tom Saeger
---
arch/x86/kernel/vmlinux.lds.S | 1 +
include/asm-generic/vmlinux.lds.h | 11 +
://lore.kernel.org/all/cover.1670358255.git.tom.sae...@oracle.com/
Signed-off-by: Tom Saeger
---
H.J. Lu (1):
x86, vmlinux.lds: Add RUNTIME_DISCARD_EXIT to generic DISCARDS
Masahiro Yamada (2):
arch: fix broken BuildID for arm64 and riscv
s390: define RUNTIME_DISCARD_EXIT to fix l
bf4421 ("riscv: remove special treatment for the link order of
head.o")
Reported-by: Dennis Gilmore
Suggested-by: Ard Biesheuvel
Signed-off-by: Masahiro Yamada
Acked-by: Palmer Dabbelt
Signed-off-by: Tom Saeger
---
include/asm-generic/vmlinux.lds.h | 5 +
1 file changed, 5
d-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-1-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kernel/vmlinux.lds.S | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/kernel/vmlinux.lds.S
b/arch/powerpc/kernel/vmlinux.lds.S
index 3
y discarding .rela* only when CONFIG_RELOCATABLE
is disabled.
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Signed-off-by: Michael Ellerman
Link: https://lore.kernel.org/r/20230105132349.384666-2-...@ellerman.id.au
Signed-off-by: Tom Saeger
---
arch/powerpc/kerne
th binutils 2.36+, but it is better
to not rely on it."
Link:
https://lkml.kernel.org/r/9166a8abdc0f979e50377e61780a4bba1dfa2f52.1674518464.git.tom.sae...@oracle.com
Fixes: 99cb0d917ffa ("arch: fix broken BuildID for arm64 and riscv")
Link: https://lore.kernel.org/all/Y7Jal56f6UBh1abE@dev-arch.thelio-3990X/
Link: https://lore.ke
990X/
Reported-by: Nathan Chancellor
Signed-off-by: Masahiro Yamada
Link: https://lore.kernel.org/r/20230105031306.1455409-1-masahi...@kernel.org
Signed-off-by: Heiko Carstens
Signed-off-by: Tom Saeger
---
arch/s390/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/a
-off-by: Masahiro Yamada
Reviewed-by: Nicolas Schier
Link: https://lore.kernel.org/r/20221012233500.156764-1-masahi...@kernel.org
Signed-off-by: Will Deacon
Signed-off-by: Tom Saeger
---
scripts/head-object-list.txt | 1 -
1 file changed, 1 deletion(-)
diff --git a/scripts/head-object-list.txt
990X/
Reported-by: Nathan Chancellor
Signed-off-by: Masahiro Yamada
Link: https://lore.kernel.org/r/20230105031306.1455409-1-masahi...@kernel.org
Signed-off-by: Heiko Carstens
Signed-off-by: Tom Saeger
---
arch/s390/kernel/vmlinux.lds.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/a
On Thu, Feb 23, 2023 at 10:51:45AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 01:18:40PM -0700, Tom Saeger wrote:
> > From: Masahiro Yamada
> >
> > commit 99cb0d917ffa1ab628bb67364ca9b162c07699b1 upstream.
> >
> > Dennis Gilmore reports that th
On Thu, Feb 23, 2023 at 10:55:39AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 01:18:39PM -0700, Tom Saeger wrote:
> > Build ID is missing for arm64 with CONFIG_MODVERSIONS=y using ld >= 2.36
> > on 5.4, 5.10, and 5.15
> >
> > Backport BuildID fixes
On Thu, Feb 23, 2023 at 10:50:22AM +0100, Greg Kroah-Hartman wrote:
> On Fri, Feb 10, 2023 at 01:20:22PM -0700, Tom Saeger wrote:
> > From: "H.J. Lu"
> >
> > commit 84d5f77fc2ee4e010c2c037750e32f06e55224b0 upstream.
> >
> > In the x86 kernel, .exit.te
On Thu, Feb 23, 2023 at 11:53:42AM -0600, Tom Saeger wrote:
> On Thu, Feb 23, 2023 at 10:51:45AM +0100, Greg Kroah-Hartman wrote:
> > On Fri, Feb 10, 2023 at 01:18:40PM -0700, Tom Saeger wrote:
> > > From: Masahiro Yamada
> > >
> > > commit 99cb0d917ffa1
clang with W=1 reports
drivers/soc/fsl/qe/qe_ic.c:235:29: error: unused function
'qe_ic_from_irq' [-Werror,-Wunused-function]
static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
^
This function is not used, so remove it.
Signed-off-by: Tom Rix
--
ot;soc: fsl: qe: remove unused qe_ic_set_* functions")
This function is not used, so remove it.
Signed-off-by: Tom Rix
---
v2: Add to commit log when the use was removed.
---
drivers/soc/fsl/qe/qe_ic.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe_ic.c
initial
assembly code.
The question is: Has anyone actually tried this to do this yet?
Thanks in advance for your responses!
Tom Morrison
Principal S/W Engineer
Empirix, Inc (www.empirix.com)
[EMAIL PROTECTED]
(781) 266 - 3567
___
Linuxppc-dev ma
L PROTECTED]/[EMAIL PROTECTED],intspec=[0x0037
>> 0x0001...],ointsize=2
>> of_irq_map_raw: ipar=/[EMAIL PROTECTED]/[EMAIL PROTECTED], size=2
>> mpic: xlate (2 cells: 0x0037 0x0001) to line 0x37 sense 0x8
Now, that looks OK! Those are what I would expect. And
an I had imagined...
I continue to have problems, but I will itemize those in a
separate email.
Tom Morrison
-Original Message-
From: Andy Fleming [mailto:[EMAIL PROTECTED]
Sent: Monday, August 06, 2007 2:10 PM
To: Morrison, Tom
Cc: linuxppc-dev@ozlabs.org
Subject: Re: Trying to use De
ful tool!).
FWIW, you really can't debug the earliest init code
because most of that is in assembly. Get a JTAG emulator
(BDI or Lauterbach) and start stepping through.
Tom Morrison
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It looks like I am getting up to the point where the
rootfs has been NFS mounted correctly. Whew, but the
first thing the INIT program does it try to open the
/dev/console device - and it goes oops:
>> kernel BUG at drivers/char/tty_io.c:781!
>> Oops: Exception in kernel mode, sig: 5 [#1]
>> Empi
suggest!
Tom Morrison
Principal S/W Engineer
Empirix, Inc (www.empirix.com)
[EMAIL PROTECTED]
(781) 266 - 3567
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I am wondering if there is a development branch that contains
support for the Freescale 8572CDS...Looking in the latest uboot
version (1.3.3) there is support for sbc8641 & sbc8548 - but
no specific support for a sbc8572?
Tom Morrison
Principal Software Engineer
EMPIRIX
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