one unified machine description for all P2020 boards. In
follow-up patches would be copied functions refactored and simplified to be
specific just for P2020 boards.
Signed-off-by: Pali Rohár
---
arch/powerpc/platforms/85xx/Makefile | 2 +
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 23
Make just one .setup_arch and one .init_IRQ callback implementation for all
P2020 board code. This deduplicate repeated and same code.
Signed-off-by: Pali Rohár
---
arch/powerpc/platforms/85xx/p2020.c | 58 +
1 file changed, 9 insertions(+), 49 deletions(-)
diff
-off-by: Pali Rohár
---
arch/powerpc/platforms/85xx/p2020.c | 83 +++--
1 file changed, 19 insertions(+), 64 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/p2020.c
b/arch/powerpc/platforms/85xx/p2020.c
index adf3750abef9..b3fb600e1d83 100644
--- a/arch/powerpc
ic unified support for boards with P2020
processors, there is no need to have this "hack" in turris1x.dts file.
So remove incorrect "fsl,P2020RDB-PC" compatible string from turris1x.dts.
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/turris1x.dts | 2 +-
1 file chang
: Pali Rohár
---
arch/powerpc/platforms/85xx/Kconfig | 22 ++
arch/powerpc/platforms/85xx/Makefile | 3 +--
2 files changed, 19 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/Kconfig
b/arch/powerpc/platforms/85xx/Kconfig
index b92cb2b4d54d
bd1c6 ("powerpc: dts: turris1x.dts: Add CPLD reboot node")
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/turris1x.dts | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/powerpc/boot/dts/turris1x.dts
b/arch/powerpc/boot/dts/turris1x.dts
ind
Hello!
I started playing with PowerPC e500 architecture, it is something really
new for me and I suspect that I found a bug in U-Boot code which
configures L2 cache as initial SRAM (L2 with locked lines).
U-Boot code for the first half of L2 cache sets Caching-inhibited
(MAS2_I) in TLB and for se
On Friday 29 April 2022 22:57:03 Michael Ellerman wrote:
> Pali Rohár writes:
> > Hello!
> >
> > I started playing with PowerPC e500 architecture, it is something really
> > new for me and I suspect that I found a bug in U-Boot code which
> > configures L2 cach
fixed PHB number based on device-tree
properties")
Signed-off-by: Pali Rohár
---
arch/powerpc/Kconfig | 10 ++
arch/powerpc/kernel/pci-common.c | 4 ++--
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 174
allows to share P2020
DTS files between Linux kernel and U-Boot.
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
index
Hello!
On Thursday 05 May 2022 07:16:40 Christophe Leroy wrote:
> Le 04/05/2022 à 19:57, Pali Rohár a écrit :
> > Since commit 63a72284b159 ("powerpc/pci: Assign fixed PHB number based on
> > device-tree properties"), powerpc kernel always fallback to PCI domain
> &
On Thursday 05 May 2022 10:40:09 Rob Herring wrote:
> On Wed, May 4, 2022 at 1:09 PM Pali Rohár wrote:
> >
> > DT law_trgt_if property defines Local Access Window Target Interface.
>
> Documentation?
I was not able to find it :-( So the only documentation for me was the
sou
On Thursday 05 May 2022 15:10:01 Tyrel Datwyler wrote:
> On 5/5/22 02:31, Pali Rohár wrote:
> > Hello!
> >
> > On Thursday 05 May 2022 07:16:40 Christophe Leroy wrote:
> >> Le 04/05/2022 à 19:57, Pali Rohár a écrit :
> >>> Since commit 63a72284b159 (&quo
P2020 also contains Power Management Controller and their registers at
offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
file fsl/p2020si-post.dtsi
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 5 +
1 file changed, 5 insertions(+)
diff
-1x/turris-1x/
https://project.turris.cz/en/hardware.html
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/turris1x.dts | 470 +
1 file changed, 470 insertions(+)
create mode 100644 arch/powerpc/boot/dts/turris1x.dts
diff --git a/arch/powerpc/boot/dts/turris1x.dts
On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> non-contiguous memory just works.
Hello! Does it mean that non-contiguous memory works for any 32-bit
powerpc platform, and not only for wiiu? If yes, should not be
non-c
On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> On 14/5/22 08:43, Pali Rohár wrote:
> > On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >> pgtable_32.c:mapin_ram loops over each valid memory range, which means
> >> non-contiguous memory just works.
> >
y 20 May 2022 20:44:04 Ash Logan wrote:
> On 20/5/22 18:04, Pali Rohár wrote:
> > On Friday 20 May 2022 13:41:04 Ash Logan wrote:
> >> On 14/5/22 08:43, Pali Rohár wrote:
> >>> On Wednesday 02 March 2022 15:44:05 Ash Logan wrote:
> >>>> pgtable_32.c
>
> Suggested-by: Rob Herring
> Reviewed-by: Rob Herring
> Signed-off-by: Naveen Naidu
Reviewed-by: Pali Rohár
> ---
> drivers/pci/access.c | 10 --
> 1 file changed, 8 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/access.c b/drivers/pci/access.c
>
R_RESPONSE definition for that and use it where
> appropriate to make these checks consistent and easier to find.
>
> Also add helper definitions SET_PCI_ERROR_RESPONSE and
> RESPONSE_IS_PCI_ERROR to make the code more readable.
>
> Suggested-by: Bjorn Helgaas
> Si
; implemented buses return an ignored error code and so don't anticipate
> wrong expectations for driver authors.
>
> Signed-off-by: Uwe Kleine-König
Acked-by: Pali Rohár
> ---
> Hello,
>
> this patch depends on "PCI: endpoint: Make struct pci_epf_driver::remo
On Friday 06 May 2022 00:33:02 Pali Rohár wrote:
> On Thursday 05 May 2022 15:10:01 Tyrel Datwyler wrote:
> > On 5/5/22 02:31, Pali Rohár wrote:
> > > Hello!
> > >
> > > On Thursday 05 May 2022 07:16:40 Christophe Leroy wrote:
> > >> Le 04/05/
On Friday 06 May 2022 22:36:21 Pali Rohár wrote:
> P2020 also contains Power Management Controller and their registers at
> offset 0xe0070 compatible with mpc8548. So add PMC node into DTS include
> file fsl/p2020si-post.dtsi
PING?
> Signed-off-by: Pali Rohár
> ---
> arch/po
On Wednesday 11 May 2022 16:37:12 Pali Rohár wrote:
> CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
> PowerPC Freescale P2020 CPU and are based on Freescale P2020RDB-PC-A board.
> Hardware design is fully open source, all firmware and hardware design
> files a
. Correct option
-mcpu=8540 for CONFIG_E500 is set few lines below in that Makefile.
Signed-off-by: Pali Rohár
Cc: sta...@vger.kernel.org
---
arch/powerpc/Makefile | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index eb541e730d3c..87f9f29ac9d2
On Tuesday 24 May 2022 12:59:55 Segher Boessenkool wrote:
> Hi!
>
> On Tue, May 24, 2022 at 11:39:39AM +0200, Pali Rohár wrote:
> > gcc e500 compiler does not support -mcpu=powerpc option. When it is
> > specified then gcc throws compile error:
> >
> > gcc
On Tuesday 24 May 2022 13:52:47 Segher Boessenkool wrote:
> On Tue, May 24, 2022 at 08:12:55PM +0200, Pali Rohár wrote:
> > On Tuesday 24 May 2022 12:59:55 Segher Boessenkool wrote:
> > > On Tue, May 24, 2022 at 11:39:39AM +0200, Pali Rohár wrote:
> > > > gcc e500 c
On Tuesday 24 May 2022 11:23:32 Pali Rohár wrote:
> On Wednesday 11 May 2022 16:37:12 Pali Rohár wrote:
> > CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
> > PowerPC Freescale P2020 CPU and are based on Freescale P2020RDB-PC-A board.
> > Hardware
On Tuesday 24 May 2022 11:17:56 Pali Rohár wrote:
> On Friday 06 May 2022 00:33:02 Pali Rohár wrote:
> > On Thursday 05 May 2022 15:10:01 Tyrel Datwyler wrote:
> > > On 5/5/22 02:31, Pali Rohár wrote:
> > > > Hello!
> > > >
> > > > O
On Thursday 09 June 2022 11:22:55 Bjorn Helgaas wrote:
> [+cc Guilherme, Michael, Ben (author of 63a72284b159 and PPC folks), thread:
> https://lore.kernel.org/r/20220504175718.29011-1-p...@kernel.org]
>
> On Fri, May 06, 2022 at 12:33:02AM +0200, Pali Rohár wrote:
> > On Thurs
On Thursday 09 June 2022 12:10:22 Bjorn Helgaas wrote:
> On Thu, Jun 09, 2022 at 06:27:25PM +0200, Pali Rohár wrote:
> > On Thursday 09 June 2022 11:22:55 Bjorn Helgaas wrote:
> > > [+cc Guilherme, Michael, Ben (author of 63a72284b159 and PPC folks),
> > > thread:
>
On Thursday 09 June 2022 14:34:51 Bjorn Helgaas wrote:
> On Thu, Jun 09, 2022 at 08:05:26PM +0200, Pali Rohár wrote:
> > On Thursday 09 June 2022 12:10:22 Bjorn Helgaas wrote:
> > > On Thu, Jun 09, 2022 at 06:27:25PM +0200, Pali Rohár wrote:
> > > > On Thursday 09 Ju
On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> + linux-mm
>
> Do you know what are requirements for kernel to support non-contiguous
> memory support and what is needed to enable it for 32-bit powerpc?
Any hints?
> Currently powerpc arch code does not support "mem
On Friday 10 June 2022 17:33:32 Michael Ellerman wrote:
> If you have scripts that are looking for certain devices they can use
> the vendor/device fields in sysfs to find the actual devices they want,
> not just whatever happens to be at :01:00.0.
This does not work if you have more cards wit
On Thursday 09 June 2022 12:19:00 Pali Rohár wrote:
> On Tuesday 24 May 2022 11:23:32 Pali Rohár wrote:
> > On Wednesday 11 May 2022 16:37:12 Pali Rohár wrote:
> > > CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
> > > PowerPC Freescale P2020 CPU
On Friday 24 June 2022 13:08:59 Michael Ellerman wrote:
> Pali Rohár writes:
> > CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
> > PowerPC Freescale P2020 CPU and are based on Freescale P2020RDB-PC-A board.
> > Hardware design is fully open sou
-1x/turris-1x/
https://project.turris.cz/en/hardware.html
Signed-off-by: Pali Rohár
---
Changes in v2:
* Sort all nodes by addresses
* Fix i2c address for MCU and SPD/EEPROM PSWP
---
arch/powerpc/boot/dts/turris1x.dts | 475 +
1 file changed, 475 insertions(+)
create
On Friday 24 June 2022 10:27:00 Pali Rohár wrote:
> On Friday 24 June 2022 13:08:59 Michael Ellerman wrote:
> > Pali Rohár writes:
> > > CZ.NIC Turris 1.0 and 1.1 are open source routers, they have dual-core
> > > PowerPC Freescale P2020 CPU and are based on Freescale
On Tuesday 24 May 2022 14:52:16 Segher Boessenkool wrote:
> On Tue, May 24, 2022 at 09:16:10PM +0200, Pali Rohár wrote:
> > On Tuesday 24 May 2022 13:52:47 Segher Boessenkool wrote:
> > > Aha. Right, because this config forces -mspe it requires one of these
> > > CPUs.
On Tuesday 24 May 2022 11:39:39 Pali Rohár wrote:
> gcc e500 compiler does not support -mcpu=powerpc option. When it is
> specified then gcc throws compile error:
>
> gcc: error: unrecognized argument in option ‘-mcpu=powerpc’
> gcc: note: valid arguments to ‘-mcpu=’ are: 8
On Monday 04 July 2022 20:23:29 Michael Ellerman wrote:
> On 2 July 2022 7:44:05 pm AEST, "Pali Rohár" wrote:
> >On Tuesday 24 May 2022 11:39:39 Pali Rohár wrote:
> >> gcc e500 compiler does not support -mcpu=powerpc option. When it is
> >> sp
On Monday 04 July 2022 14:07:10 Arnd Bergmann wrote:
> On Mon, Jul 4, 2022 at 12:39 PM Pali Rohár wrote:
> > On Monday 04 July 2022 20:23:29 Michael Ellerman wrote:
> > > On 2 July 2022 7:44:05 pm AEST, "Pali Rohár" wrote:
> > > >On Tuesday 24 May 2022
On Monday 04 July 2022 15:22:03 Arnd Bergmann wrote:
> On Mon, Jul 4, 2022 at 3:13 PM Pali Rohár wrote:
> > On Monday 04 July 2022 14:07:10 Arnd Bergmann wrote:
>
> > > CFLAGS_CPU-$(CONFIG_PPC_BOOK3S_32) := -mcpu=powerpc
> > > CFLAGS_CPU-$(CONFIG_PPC_85xx)
and
still require this fix.
So implement this class code fix also in kernel fsl_pci.c driver.
Cc: sta...@vger.kernel.org
Signed-off-by: Pali Rohár
---
arch/powerpc/sysdev/fsl_pci.c | 8
arch/powerpc/sysdev/fsl_pci.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/arch/powerpc/sysdev
t commit.
Fixes: 63a72284b159 ("powerpc/pci: Assign fixed PHB number based on device-tree
properties")
Signed-off-by: Pali Rohár
---
Changes in v2:
* Enable CONFIG_PPC_PCI_DOMAIN_FROM_OF_REG by default on powernv and pseries
---
arch/powerpc/Kconfig | 11 +++
arch/
tree
properties")
Signed-off-by: Pali Rohár
---
Changes in v2:
* New patch
---
arch/powerpc/kernel/pci-common.c | 26 +++---
1 file changed, 19 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 7f959df34
On Friday 10 June 2022 17:33:32 Michael Ellerman wrote:
> Pali Rohár writes:
> > Since commit 63a72284b159 ("powerpc/pci: Assign fixed PHB number based on
> > device-tree properties"), powerpc kernel always fallback to PCI domain
> > assignment from OF / Device
s on every PCIe controller (as each is in
own PCI domain) and therefore connect more PCIe cards as without these
patches.
Pali Rohár (5):
powerpc/pci: Hide pci_device_from_OF_node() for non-powermac code
powerpc/pci: Make pcibios_make_OF_bus_map() static
powerpc/pci: Hide pci_create_OF_bus_map
Function pci_device_from_OF_node() is used only in powermac code.
So hide it from all other platforms as it is unsed.
Signed-off-by: Pali Rohár
---
arch/powerpc/include/asm/pci-bridge.h | 2 ++
arch/powerpc/kernel/pci_32.c | 2 ++
arch/powerpc/kernel/pci_64.c | 2 ++
3 files
platforms.
[1] -
https://lore.kernel.org/linuxppc-dev/1148016268.13249.14.camel@localhost.localdomain/
Signed-off-by: Pali Rohár
---
arch/powerpc/kernel/pci_32.c | 13 ++---
1 file changed, 10 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel
Function pcibios_make_OF_bus_map() is used only in pci_32.c file.
So make it static and do not export out of pci_32.o unit.
Signed-off-by: Pali Rohár
---
arch/powerpc/kernel/pci_32.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/pci_32.c b/arch
CONFIG_PPC_PCI_BUS_NUM_DOMAIN_DEPENDENT which
enables this change. By default it is disabled. It cause that initial value
of hose->first_busno is zero.
Signed-off-by: Pali Rohár
---
arch/powerpc/Kconfig | 11 +++
arch/powerpc/kernel/pci_32.c | 6 ++
2 files changed, 17 insertions(+)
diff --git a/arch/powe
Function pci_create_OF_bus_map() is used only in chrp code.
So hide it from all other platforms as it is unsed.
Signed-off-by: Pali Rohár
---
arch/powerpc/include/asm/pci-bridge.h | 2 ++
arch/powerpc/kernel/pci_32.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/arch/powerpc
On Thursday 07 July 2022 09:56:04 Christophe Leroy wrote:
> Le 04/07/2022 à 15:43, Arnd Bergmann a écrit :
> > On Mon, Jul 4, 2022 at 3:29 PM Pali Rohár wrote:
> >>
> >> And still what to do with 4bf4f42a2feb ("powerpc/kbuild: Set default
> >> gener
On Monday 04 July 2022 14:07:10 Arnd Bergmann wrote:
> Another problem I see is that a kernel that is built for both E500 and E500MC
> uses -mcpu=e500mc and may not actually work on the older ones either
> (even with your patch).
Such configuration is not supported, see arch/powerpc/platforms/Kcon
On Monday 04 July 2022 15:13:58 Pali Rohár wrote:
> On Monday 04 July 2022 14:07:10 Arnd Bergmann wrote:
> > On Mon, Jul 4, 2022 at 12:39 PM Pali Rohár wrote:
> > > On Monday 04 July 2022 20:23:29 Michael Ellerman wrote:
> > > > On 2 July 2022 7:44:05 pm AEST, &q
On Saturday 09 July 2022 09:16:13 Christophe Leroy wrote:
> Le 08/07/2022 à 19:14, Pali Rohár a écrit :
> > On Monday 04 July 2022 15:13:58 Pali Rohár wrote:
> >> On Monday 04 July 2022 14:07:10 Arnd Bergmann wrote:
> >>> On Mon, Jul 4, 2022 at 12:39 PM Pali Rohár w
More MPC85xx and P1/P2 boards options have incorrect description. Fix them
to include list of all boards for which they enable/disable support.
Signed-off-by: Pali Rohár
---
arch/powerpc/platforms/85xx/Kconfig | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
diff --git
On Sunday 10 July 2022 17:38:33 Christophe Leroy wrote:
> Le 09/07/2022 à 12:23, Pali Rohár a écrit :
> >>>
> >>> -ifdef CONFIG_PPC_BOOK3S_64
> >>>ifdef CONFIG_CPU_LITTLE_ENDIAN
> >>> -CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power8
>
ce for e500 SPE-only versions.
>
> So, stop relying on this approximative logic and allow the user to
> decide whether he/she wants to use the toolchain's default CPU or if
> he/she wants to set one, and allow only possible CPUs based on the
> selected target.
>
> R
CPLD firmware can reset board by writing value 0x01 at CPLD memory offset
0x0d. Define syscon-reboot node for this reset support.
Fixes: 54c15ec3b738 ("powerpc: dts: Add DTS file for CZ.NIC Turris 1.x routers")
Signed-off-by: Pali Rohár
---
arch/powerpc/boot/dts/turris1x.dts | 10 +++
On Friday 15 July 2022 11:55:04 Guilherme G. Piccoli wrote:
> On 06/07/2022 07:21, Pali Rohár wrote:
> > [...]
> > Fix this issue and introduce a new option CONFIG_PPC_PCI_DOMAIN_FROM_OF_REG.
> > When this option is disabled then powerpc kernel would assign PCI domains
> &
On Friday 15 July 2022 15:32:56 Guilherme G. Piccoli wrote:
> On 15/07/2022 14:11, Pali Rohár wrote:
> > [...]
> >>
> >> I found this sentence a bit weird, "in the similar way like it is doing
> >> kernel for other architectures", but other than that:
Hello!
Trying to boot mainline Linux kernel v5.15+, including current version
from master branch, on Freescale P2020 does not work. Kernel does not
print anything to serial console, seems that it does not work and after
timeout watchdog reset the board.
I run git bisect and it found following com
Hello,
On Saturday 23 July 2022 14:42:22 Christophe Leroy wrote:
> Hello,
>
> Le 22/07/2022 à 11:09, Pali Rohár a écrit :
> > Hello!
> >
> > Trying to boot mainline Linux kernel v5.15+, including current version
> > from master branch, on Freescale P2020 does no
On Monday 25 July 2022 18:20:01 Michael Ellerman wrote:
> Pali Rohár writes:
> > On Saturday 23 July 2022 14:42:22 Christophe Leroy wrote:
> >> Le 22/07/2022 à 11:09, Pali Rohár a écrit :
> >> > Trying to boot mainline Linux kernel v5.15+, including current version
On Monday 25 July 2022 16:20:49 Christophe Leroy wrote:
> Le 25/07/2022 à 14:52, Pali Rohár a écrit :
> > On Monday 25 July 2022 18:20:01 Michael Ellerman wrote:
> >> Pali Rohár writes:
> >>> On Saturday 23 July 2022 14:42:22 Christophe Leroy wrote:
> >>
On Monday 25 July 2022 16:54:16 Segher Boessenkool wrote:
> On Mon, Jul 25, 2022 at 10:10:09PM +0200, Pali Rohár wrote:
> > On Monday 25 July 2022 16:20:49 Christophe Leroy wrote:
> > Now I did again clean test with same Debian 10 cross compiler.
> >
> > $ git clone
On Tuesday 26 July 2022 21:02:22 Michael Ellerman wrote:
> Pali Rohár writes:
> > On Wednesday 06 July 2022 12:43:08 Pali Rohár wrote:
> >> By default on PPC32 are PCI bus numbers unique across all PCI domains.
> >> So system could have only 256 PCI buses independ
On Tuesday 26 July 2022 08:44:05 Segher Boessenkool wrote:
> On Tue, Jul 26, 2022 at 11:02:59AM +0200, Arnd Bergmann wrote:
> > On Tue, Jul 26, 2022 at 10:34 AM Pali Rohár wrote:
> > > On Monday 25 July 2022 16:54:16 Segher Boessenkool wrote:
> > > > The EH field
On Sunday 31 July 2022 12:06:10 Stephen Hemminger wrote:
> diff --git a/Documentation/admin-guide/sysctl/net.rst
> b/Documentation/admin-guide/sysctl/net.rst
> index 805f2281e000..299d9c3407d3 100644
> --- a/Documentation/admin-guide/sysctl/net.rst
> +++ b/Documentation/admin-guide/sysctl/net.rst
On Monday 01 August 2022 13:38:32 Michael Ellerman wrote:
> Rob Herring writes:
> > On Fri, Jul 29, 2022 at 7:17 AM Michael Ellerman
> > wrote:
> >>
> >> On Wed, 4 May 2022 20:08:22 +0200, Pali Rohár wrote:
> >> > DT law_trgt_if property
incorrectly.
> Fix the logic by only doing the ret >= 0 check in the of_alias_get_id()
> case.
>
> Fixes: 0fe1e96fef0a ("powerpc/pci: Prefer PCI domain assignment via DT
> 'linux,pci-domain' and alias")
> Signed-off-by: Michael Ellerman
Your change shoul
ck.h
>
> So, do as in arch_atomic_try_cmpxchg_lock(), set it to 1 if PPC64
> but set it to 0 if PPC32. For that use IS_ENABLED(CONFIG_PPC64) which
> returns 1 when CONFIG_PPC64 is set and 0 otherwise.
>
> Reported-by: Pali Rohár
> Fixes: 9401f4e46cf6 ("powerpc: Use lwarx/lda
On Friday 10 June 2022 00:24:20 Pali Rohár wrote:
> On Friday 20 May 2022 14:30:02 Pali Rohár wrote:
> > + linux-mm
> >
> > Do you know what are requirements for kernel to support non-contiguous
> > memory support and what is needed to enable it for 32-bit pow
hange the attributes. This, in turn, prevents userspace
> > from re-creating quota project on these existing files.
> >
> > Christian, if this get in some mergeable state, please don't merge it
> > yet. Amir suggested these syscalls better to use updated struct fsxattr
> &g
On Thursday 27 March 2025 21:57:34 Amir Goldstein wrote:
> On Thu, Mar 27, 2025 at 8:26 PM Pali Rohár wrote:
> >
> > On Thursday 27 March 2025 12:47:02 Amir Goldstein wrote:
> > > On Sun, Mar 23, 2025 at 11:32 AM Pali Rohár wrote:
> > > >
> > > >
On Thursday 27 March 2025 12:47:02 Amir Goldstein wrote:
> On Sun, Mar 23, 2025 at 11:32 AM Pali Rohár wrote:
> >
> > On Sunday 23 March 2025 09:45:06 Amir Goldstein wrote:
> > > On Fri, Mar 21, 2025 at 8:50 PM Andrey Albershteyn
> > > wrote:
> > >
On Friday 28 February 2025 09:30:38 Andrey Albershteyn wrote:
> On 2025-02-21 20:15:24, Amir Goldstein wrote:
> > On Fri, Feb 21, 2025 at 7:13 PM Darrick J. Wong wrote:
> > >
> > > On Tue, Feb 11, 2025 at 06:22:47PM +0100, Andrey Albershteyn wrote:
> > > > From: Andrey Albershteyn
> > > >
> > > >
On Tuesday 25 February 2025 07:59:26 Darrick J. Wong wrote:
> On Tue, Feb 25, 2025 at 12:24:08PM +0100, Christian Brauner wrote:
> > On Tue, Feb 25, 2025 at 11:40:51AM +0100, Arnd Bergmann wrote:
> > > On Tue, Feb 25, 2025, at 11:22, Christian Brauner wrote:
> > > > On Tue, Feb 25, 2025 at 09:02:04
On Wednesday 21 May 2025 10:48:26 Andrey Albershteyn wrote:
> On 2025-05-19 21:37:04, Dave Chinner wrote:
> > On Thu, May 15, 2025 at 12:33:31PM +0200, Amir Goldstein wrote:
> > > On Thu, May 15, 2025 at 11:02 AM Christian Brauner
> > > wrote:
> > > >
> > > > On Tue, May 13, 2025 at 11:53:23AM +0
201 - 281 of 281 matches
Mail list logo
