On Fri, 2016-03-18 at 15:04 +1100, Michael Neuling wrote:
> On Wed, 2016-02-03 at 01:11 +0530, Shilpasri G Bhat wrote:
>
> > cpu_to_chip_id() does a DT walk through to find out the chip id by
> > taking a contended device tree lock. This adds an unnecessary
> > overhe
> IMO, we should ditch the module parameter altogether and never treat
> timebase sync failure as fatal, and leave that up to any applications
> actually need it to check.
I agree with this this.
Mikey
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.o
On Mon, 2016-03-07 at 19:09 +0530, Aneesh Kumar K.V wrote:
> PowerISA 3.0 introduce three pte bits with the below meaning
> 000 -> Normal Memory
> 001 -> Strong Access Order
> 010 -> Non idempotent I/O ( Also cache inhibited and guarded)
> 100 -> Tolerant I/O (Cache inhibited)
Which PTE are you
On Mon, 2016-03-07 at 19:09 +0530, Aneesh Kumar K.V wrote:
> _PAGE_PRIVILEGED means the page can be accessed only by kernel. This is done
> to keep pte bits similar to PowerISA 3.0 radix PTE format. User
> pages are now makred by clearing _PAGE_PRIVILEGED bit.
>
> Previously we allowed kernel to h
On Wed, 2016-03-23 at 16:47 +1100, Cyril Bur wrote:
> Currently start_thread() doesn't sanitise TAR.
>
> The TAR SPR register is a register that can be set and branched to, not
> sanitising it presents an information leak to the new executable.
>
> Other SPR registers such as the Performance regi
On Sun, 2016-03-27 at 13:54 +0530, Aneesh Kumar K.V wrote:
> This patch move the existing p9 hash to a different PVR and add
> radix feature with p9 PVR. That implies we will not be able to
> runtime select P9 hash. With P9 Radix we need to do
>
> * set UPRT = 0 in cpu setup
> * set different TLB
On Mon, 2016-04-04 at 17:00 +1000, Alexey Kardashevskiy wrote:
> On 04/04/2016 04:44 PM, Anton Blanchard wrote:
> > Hi,
> >
> > I can't get an Ubuntu Wily guest to boot on an Ubuntu Wily host in PR KVM
> > mode. The kernel in both cases is 4.2. To reproduce:
> >
> > wget -N
> > https://cloud-ima
> Re: [RFC] P9 ldmx support
These are good to go and don't need to be marked as RFC.
FWIW, we've been testing these internally and they've been solid.
> These are patches based on next to support the forthcoming ldmx
> instruction through the existing P8 EBB infrastructure. Obviously it
> doesn
On Wed, 2016-04-13 at 12:52 -0500, Jack Miller wrote:
> Hi Anton.
>
> On Wed, Apr 13, 2016 at 5:51 AM, Anton Blanchard wrote:
> > Hi Jack,
> >
> > > Previously we just saved the FSCR, but only restored it in some
> > > settings, and never copied it thread to thread. This patch always
> > > re
On Thu, 2016-04-14 at 13:39 -0500, Jack Miller wrote:
> > I'm not sure that works on processes before power8.
> >
> > There DSCR SPR number 0x11 will always trap and emulate from userspace
> > (see arch/powerpc/kernel/traps.c:emulate_instruction()). That is not
> > controlled by FSCR and should
On Wed, 2016-04-20 at 12:59 +1000, Michael Ellerman wrote:
> On Sat, 2016-09-04 at 06:14:04 UTC, "Aneesh Kumar K.V" wrote:
> > We can depend on ibm,pa-features to enable/disable radix. This gives us
> > a nice way to test p9 hash config, by changing device tree property.
>
> I think we might wan
e is being investigated also.
Signed-off-by: Michael Neuling
cc: sta...@vger.kernel.org # 3.8
---
drivers/misc/cxl/irq.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/misc/cxl/irq.c b/drivers/misc/cxl/irq.c
index be646dc..8def455 100644
--- a/drivers/misc/cxl/irq.c
+++ b/drivers/misc/cxl/irq.c
clear of IRQs for the
detached context, before removing the context from the idr.
Signed-off-by: Michael Neuling
---
drivers/misc/cxl/context.c | 7 +++
drivers/misc/cxl/cxl.h | 2 ++
drivers/misc/cxl/native.c | 31 +++
3 files changed, 40 insertions
Aneesh,
I'm not sure why we need this patch.
It seems to be moving the initialisation of some global variables into
init functions from the definitions. And renames some things.
> diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
> index 41503d7d53a1..3759df52bd67 100644
On Tue, 2016-04-26 at 17:45 +1000, Balbir Singh wrote:
> >
> > /*
> > * System calls.
> > @@ -508,6 +509,14 @@ BEGIN_FTR_SECTION
> > ldarxr6,0,r1
> > END_FTR_SECTION_IFSET(CPU_FTR_STCX_CHECKS_ADDRESS)
> >
> > +BEGIN_FTR_SECTION
> > +/*
> > + * A cp_abort (copy paste abort) here ensures t
On Wed, 2015-09-02 at 15:37 +0530, Anshuman Khandual wrote:
> Hello,
>
> Worked on a modified version of the following selftest
> test case in the kernel source.
>
> tools/testing/selftests/vm/hugepage-mmap.c
Please send the test case and how to run it here.
Mikey
> This modified test will try
day(&tv_end, NULL);
}
printf("time = %.6f\n", tv_end.tv_sec - tv_start.tv_sec +
(tv_end.tv_usec - tv_start.tv_usec) * 1e-6);
return 0;
}
Signed-off-by: Michael Neuling
Reported-by: Aaron Sawdey
diff --git a/arch/powerpc/kernel/vdso32/datapage.S
b/arch/powerpc/kernel/
t; Inactive hide details for Denis Kirjanov ---09/23/2015 01:22:39
> PM---On 9/23/15, Michael Neuling wrote: > TDenis
> Kirjanov ---09/23/2015 01:22:39 PM---On 9/23/15, Michael Neuling
> wrote: > The 32 and 64 bit variants of
> __get_datapag
>
> From: Denis Kirjanov
&g
> I've got the following results on POWER7 64bit
> without the patch:
> # ./tb
> time = 0.263337
> # ./tb
> time = 0.251273
> # ./tb
> time = 0.258453
> # ./tb
> time = 0.260189
>
> with the patch:
> # ./tb
> time = 0.241517
> # ./tb
> time = 0.241973
> # ./tb
> time = 0.239365
> # ./tb
> time =
This patch fixes a link stack corruption issue in the VDOS
get_datapage() code and adds a benchmark to test it in future.
v2:
- Split benchmark out of commit message and put in selftests.
- Upgrade commit message to essay.
___
Linuxppc-dev mailing l
This adds a benchmark directory to the powerpc selftests and adds a
gettimeofday() benchmark to it.
Suggested-by: Michael Ellerman
Signed-off-by: Michael Neuling
---
tools/testing/selftests/powerpc/Makefile | 2 +-
.../testing/selftests/powerpc/benchmarks/Makefile | 12
(which uses
__get_datapage()) microbenchmark we get a decent bump in performance
on POWER7/8.
For the benchmark in tools/testing/selftests/powerpc/benchmarks/gettimeofday.c
POWER8:
64bit gets ~4% improvement
32bit gets ~9% improvement
POWER7:
64bit gets ~7% improvement
Signed-off-by: Mi
On Fri, 2015-09-25 at 11:37 +0200, Gabriel Paubert wrote:
> On Fri, Sep 25, 2015 at 12:28:30PM +0300, Denis Kirjanov wrote:
> > On 9/25/15, Arnd Bergmann wrote:
> > > On Friday 25 September 2015 14:01:39 Michael Neuling wrote:
> > >> This adds a benchmark director
This adds a function to copy the mm->context to the paca. This is
only a basic conversion for now but will be used more extensively in
the next patch.
This also adds #ifdef CONFIG_PPC_BOOK3S around this code since it's
not used elsewhere.
Signed-off-by: Michael Neuling
---
arch
s.org/pipermail/linuxppc-dev/2015-October/135700.html
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/paca.h | 17 +++--
arch/powerpc/kernel/asm-offsets.c | 8
arch/powerpc/mm/hash_utils_64.c | 4 ++--
3 files changed, 21 insertions(+), 8 deletions(-)
diff --git a
On Fri, 2015-11-06 at 10:05 +1100, Daniel Axtens wrote:
> Andrew Donnellan writes:
>
> > When writing a value to config space, cxl_pcie_write_config() calls
> > cxl_pcie_config_info() to obtain a mask and shift value, shifts the
> > new
> > value accordingly, then uses the mask to combine the shi
no TM[] output.
Include rework of printbits() to handle this case.
Signed-off-by: Michael Neuling
---
arch/powerpc/kernel/process.c | 43 +++
1 file changed, 35 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc
Test the kernel's signal return code to ensure that it doesn't crash
when both the transactional and suspend MSR bits are set in the signal
context.
Signed-off-by: Michael Neuling
---
tools/testing/selftests/powerpc/tm/Makefile| 2 +-
.../selftests/powerpc/tm/tm-signal-
clear them and trigger the bad stack frame
handling.
Found using a syscall fuzzer.
Signed-off-by: Michael Neuling
Cc: sta...@vger.kernel.org
---
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/signal_32.c | 16 ++--
arch/powerpc/kernel/signal_64.c | 6 ++
3 files
the
additional advantage of checking for a potential TM Bad Thing
exception.
Found using syscall fuzzer.
Signed-off-by: Michael Neuling
Cc: sta...@vger.kernel.org
---
arch/powerpc/kernel/process.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/powerpc/kernel/p
or an attempt to do it twice it can
result in a TM Bad Thing exception. Hence we should make it clearer
that this function is making this change.
This patch renames this function to make it clearer what's happening
when calling this function. No functional change.
Signed-off-by: Michael Ne
On Mon, 2015-11-16 at 12:51 +0530, Anshuman Khandual wrote:
> On 11/13/2015 10:27 AM, Michael Neuling wrote:
> > Currently we can hit a scenario where we'll tm_reclaim() twice.
> > This
> > results in a TM bad thing exception because the second reclaim
> > occ
On Mon, 2015-11-16 at 20:33 +1100, Michael Ellerman wrote:
> On Mon, 2015-11-16 at 20:23 +1100, Michael Neuling wrote:
> > On Mon, 2015-11-16 at 12:51 +0530, Anshuman Khandual wrote:
> > > On 11/13/2015 10:27 AM, Michael Neuling wrote:
> > > > Currently we can hit a s
On Mon, 2015-11-16 at 20:27 +1100, Michael Ellerman wrote:
> On Fri, 2015-11-13 at 15:57 +1100, Michael Neuling wrote:
>
> > Print the MSR TM bits in oops messages. This appends them to the
> > end
> > like this:
> > MSR: 800502823031
> >
> > Yo
hOn Mon, 2015-11-16 at 21:24 +1100, Michael Ellerman wrote:
> On Fri, 2015-11-13 at 15:57 +1100, Michael Neuling wrote:
>
> > Test the kernel's signal return code to ensure that it doesn't
> > crash
> > when both the transactional and suspend MSR bits are
On Mon, 2015-11-16 at 21:05 +1100, Michael Ellerman wrote:
> On Fri, 2015-11-13 at 15:57 +1100, Michael Neuling wrote:
>
> > Currently we allow both the MSR T and S bits to be set by userspace
> > on
> > a signal return. Unfortunately this is a reserved configuration
>
signal_32 changes to make code easier to read
- remove signal 64 setting local variable just before return.
Michael Neuling (2):
powerpc/tm: Block signal return setting invalid MSR state
powerpc/tm: Check for already reclaimed tasks
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel
, we mark the context as invalid.
Found using a syscall fuzzer.
Signed-off-by: Michael Neuling
Cc: sta...@vger.kernel.org # v3.9+
---
arch/powerpc/include/asm/reg.h | 1 +
arch/powerpc/kernel/signal_32.c | 14 +-
arch/powerpc/kernel/signal_64.c | 4
3 files changed, 14
the
additional advantage of checking for a potential TM Bad Thing
exception.
Found using syscall fuzzer.
Signed-off-by: Michael Neuling
Cc: sta...@vger.kernel.org # v3.9+
---
arch/powerpc/kernel/process.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/powerpc/ker
nting based on mpe's feedback
- Dropped get_tm_stackpointer() renaming patch in leui of more
extensive rewrite later
Michael Neuling (3):
powerpc: Print MSR TM bits in oops message
selftests/powerpc: Add TM signal return test
selftests/powerpc: Add TM signal with invalid stack t
no TM[] output.
Include rework of printbits() to handle this case.
Signed-off-by: Michael Neuling
---
arch/powerpc/kernel/process.c | 51 ---
1 file changed, 43 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc
Test the kernel's signal return code to ensure that it doesn't crash
when both the transactional and suspend MSR bits are set in the signal
context.
Signed-off-by: Michael Neuling
---
tools/testing/selftests/powerpc/tm/.gitignore | 1 +
tools/testing/selftests/powerpc/t
Test the kernels signal generation code to ensure it can handle an
invalid stack pointer when transactional.
Signed-off-by: Michael Neuling
---
tools/testing/selftests/powerpc/tm/.gitignore | 1 +
tools/testing/selftests/powerpc/tm/Makefile| 2 +-
.../testing/selftests/powerpc/tm
On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> Test that the non volatile floating point and Altivec registers get
> correctly preserved across the fork() syscall.
Can we add a test for VSX too? I realise it's the same registers, but
the enable bits in the MSR are different so it's easy to
On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> Loop in assembly checking the registers with many threads.
>
> Signed-off-by: Cyril Bur
> ---
> tools/testing/selftests/powerpc/math/Makefile | 7 +-
> tools/testing/selftests/powerpc/math/fpu_asm.S | 34
> tools/testing/s
On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> Load up the non volatile FPU and VMX regs and ensure that they are
> the
> expected value in a signal handler
>
> Signed-off-by: Cyril Bur
> ---
> tools/testing/selftests/powerpc/math/Makefile | 4 +-
> tools/testing/selftests/powerpc/
On Mon, 2015-11-23 at 11:58 +1100, Cyril Bur wrote:
> On Mon, 23 Nov 2015 11:23:13 +1100
> Michael Neuling wrote:
>
> > On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> > > Test that the non volatile floating point and Altivec registers
> > > get
> >
On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> With threads leaving the math bits enabled in their saved MSR to
> indicate
> that the hardware is hot and a restore is not needed, children need
> to turn
> it off as when they do get scheduled, there's no way their registers
> could
> have bee
On Wed, 2015-11-18 at 14:26 +1100, Cyril Bur wrote:
> Currently the FPU, VEC and VSX facilities are lazily loaded. This is
> not a
> problem unless a process is using these facilities.
I would prefer to say facilities are "enabled" and registers are
"loaded". You're mixing the two here.
> Modern
all tm-signal-msr-resv tm
> > -signal-stack tm-fork tm-dscr
> > +TEST_PROGS := tm-resched-dscr tm-syscall tm-signal-msr-resv tm
> > -signal-stack tm-fork tm-dscr tm-tar
> >
> > all: $(TEST_PROGS)
> >
> > diff --git a/tools/testing/selftests/powerpc
On Wed, 2015-12-02 at 14:12 +0530, Anshuman Khandual wrote:
> On 10/29/2015 06:13 AM, Anton Blanchard wrote:
> > Here are various improvements to our context switch path. Some of
> > the
> > highlights:
> >
> > - Group all mfsprs and mtsprs in __switch_to(), which gives us a
> > 10% improvement
tm
> -signal-stack tm-fork
>
> all: $(TEST_PROGS)
>
> diff --git a/tools/testing/selftests/powerpc/tm/tm-fork.c
> b/tools/testing/selftests/powerpc/tm/tm-fork.c
> new file mode 100644
> index ..f571a48a59a0
> --- /dev/null
> +++ b/tools/testing/selft
xts, so this patch fixes it.
> It could lead to erratic behavior from an AFU when the context is
> attached through the kernel API.
>
> Signed-off-by: Frederic Barrat
> Suggested-by: Michael Neuling
> Cc: # 4.3+
> ---
> cxl kernel API is supported starting with 4.3 (for cxlfl
On Tue, 2015-12-08 at 17:30 +1100, Andrew Donnellan wrote:
> Finally looking at this patch again for the first time in a couple of
> months...
>
> On 04/11/15 17:17, Andrew Donnellan wrote:
> > On 03/11/15 20:09, Michael Ellerman wrote:
> > > Part of your problem is you're storing afu->crs_len whi
s.org/pipermail/linuxppc-dev/2015-October/135700.
html
Signed-off-by: Michael Neuling
---
v2:
Added missing include which broke allmodconfig (noticed by anton)
include/asm/paca.h | 18 --
kernel/asm-offsets.c |8
mm/hash_utils_64.c |4 ++--
3 files change
s.org/pipermail/linuxppc-dev/2015-October/135700.html
Signed-off-by: Michael Neuling
--
v3:
Fix line wrapping (WTF sorry!?!)
v2:
Added missing include which broke allmodconfig (noticed by anton)
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 1cc6e08..06cdaee 1
Only delay opal_rtc_read() when busy and are going to retry.
This has the advantage of possibly saving a massive 10ms off booting!
Kudos to Stewart for noticing.
Signed-off-by: Michael Neuling
diff --git a/arch/powerpc/platforms/powernv/opal-rtc.c
b/arch/powerpc/platforms/powernv/opal-rtc.c
On Fri, 2016-01-15 at 16:04 +1100, Cyril Bur wrote:
> With threads leaving the math bits enabled in their saved MSR to indicate
> that the hardware is hot and a restore is not needed, children need to turn
> it off as when they do get scheduled, there's no way their registers could
> have been hot.
> Currently the FPU, VEC and VSX facilities are lazily loaded. This is not a
> problem unless a process is using these facilities.
> Modern versions of GCC are very good at automatically vectorising code, new
> and modernised workloads make use of floating point and vector facilities,
> even the k
On Fri, 2016-01-15 at 16:54 +1100, Cyril Bur wrote:
> On Fri, 15 Jan 2016 16:42:22 +1100
> Michael Neuling wrote:
>
> > On Fri, 2016-01-15 at 16:04 +1100, Cyril Bur wrote:
> > > With threads leaving the math bits enabled in their saved MSR to
> > > indicate
>
On Fri, 2016-01-15 at 16:04 +1100, Cyril Bur wrote:
> This patch adds the ability to be able to save the FPU registers to
> the
> thread struct without giving up (disabling the facility) next time
> the
> process returns to userspace.
>
> This patch optimises the thread copy path (as a result of a
On Fri, 2016-01-15 at 16:04 +1100, Cyril Bur wrote:
> This patch adds the ability to be able to save the VSX registers to
> the
> thread struct without giving up (disabling the facility) next time
> the
> process returns to userspace.
>
> This patch builds on a previous optimisation for the FPU an
> > Also, put the #ifdef junk as part of the function so that the caller
> > doesn't have to deal with it.
> >
>
> Can do absolutely, however this means that in save_all I can't check if the
> function needs to be called or not. For example, without CONFIG_VSX, MSR_VSX
> won't exist which means
On Tue, 2016-01-19 at 18:14 +0100, Frederic Barrat wrote:
> Introduce a new API to read the VPD of the adapter. In bare-metal, a
> kernel driver can find out the adapter pci_dev behind the AFU device
> and call pci_read_vpd() directly, but it won't work in a (powerVM)
> guest.
> Current implementat
On Thu, 2016-01-21 at 19:48 +0100, Frederic Barrat wrote:
>
> Le 20/01/2016 03:20, Michael Neuling a écrit :
> > The only thing I'm a bit concerned about is are we going to end up
> > duplicating a lot of the linux PCI API, but I guess we are only going
> > to do t
accelerated)
>
> Fixes: ee13cb249fab ("powerpc/64s: Add support for software count cache
> flush")
> Cc: sta...@vger.kernel.org # v4.19+
> Signed-off-by: Michael Ellerman
LGTM
Reviewed-by: Michael Neuling
> ---
> arch/powerpc/kernel/security.c | 23 --
will fail if the hypervisor doesn't support
writing the DAWR.
To double check the DAWR is working, run this kernel selftest:
tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
Any errors/failures/skips mean something is wrong.
Signed-off-by: Michael Neuling
---
Documentatio
will fail if the hypervisor doesn't support
writing the DAWR.
To double check the DAWR is working, run this kernel selftest:
tools/testing/selftests/powerpc/ptrace/ptrace-hwbreak.c
Any errors/failures/skips mean something is wrong.
Signed-off-by: Michael Neuling
---
v2:
Fix compile
On Mon, 2019-04-01 at 16:41 +1030, Joel Stanley wrote:
> Those not of us not drowning in POWER might not know what this means.
Hehe... thanks!
> Signed-off-by: Joel Stanley
Acked-by: Michael Neuling
> ---
> Documentation/powerpc/DAWR-POWER9.txt | 8
> 1 file change
The ISA has a quirk that's useful for the Linux implementation.
Document it here so others are less likely to trip over it.
Signed-off-by: Michael Neuling
Suggested-by: Michael Ellerman
---
.../powerpc/transactional_memory.rst | 27 +++
1 file changed, 27 inser
On Tue, 2020-03-31 at 12:12 -0300, Tulio Magno Quites Machado Filho wrote:
> Alistair Popple writes:
>
> > diff --git a/arch/powerpc/include/uapi/asm/cputable.h
> > b/arch/powerpc/include/uapi/asm/cputable.h
> > index 540592034740..c6fe10b2 100644
> > --- a/arch/powerpc/include/uapi/asm/cputa
> Signed-off-by: Rashmica Gupta
Tested-by: Michael Neuling
> ---
> To remove 1GB from each node:
> echo 1073741824 > /sys/kernel/debug/powerpc/memtrace/enable
>
> To add this memory back and remove 2GB:
> echo 2147483648 > /sys/kernel/debug/powerpc/memtrace/enable
&
On Mon, 2018-06-18 at 19:59 -0300, Breno Leitao wrote:
> Currently msr_tm_active() is a wrapper around MSR_TM_ACTIVE() if
> CONFIG_PPC_TRANSACTIONAL_MEM is set, or it is just a function that
> returns false if CONFIG_PPC_TRANSACTIONAL_MEM is not set.
>
> This function is not necessary, since MSR_T
ut became unused in commit
> dc3106690b20 ("powerpc: tm: Always use fp_state and vr_state to store live
> registers")
>
> Just remove it and adjust the callers.
>
> Signed-off-by: Cyril Bur
> Signed-off-by: Breno Leitao
Acked-by: Michael Neuling
> ---
> arch/power
On Mon, 2018-06-18 at 19:59 -0300, Breno Leitao wrote:
> If __switch_to() tries to context switch from task A to task B, and task A
> had task->thread->regs->msr[TM] enabled, then __switch_to_tm() will call
> tm_recheckpoint_new_task(), which will call trecheckpoint, for task B, which
> is clearl
so documents better the flow after commit eb5c3f1c8647 ("powerpc:
> Always save/restore checkpointed regs during treclaim/trecheckpoint"),
> where tm_recheckpoint can recheckpoint what is in ck{fp,vr}_state blindly.
>
> Signed-off-by: Breno Leitao
Acked-By: Michael Neuling
> +What:/sys/devices/system/cpu/cpu[0-9]+/small_core_siblings
Shouldn't we put this in the topology/ subdir with with the other items like it?
Mikey
On Wed, 2018-08-29 at 17:04 +1000, Michael Neuling wrote:
> > +What: /sys/devices/system/cpu/cpu[0-9]+/small_core_siblings
>
> Shouldn't we put this in the topology/ subdir with with the other items like
> it?
Also, please follow the same format as *_sibilings f
tch
between the init section being freed and setting SYSTEM_RUNNING (in
kernel_init()) but that seems like an impractical time and small
window for any code patching to occur.
cc: sta...@vger.kernel.org # 4.13+
Signed-off-by: Michael Neuling
---
For stable I've marked this as v4.13+ since that&
> > For stable I've marked this as v4.13+ since that's when we refactored
> > code-patching.c but it could go back even further than that. In
> > reality though, I think we can only hit this since the first
> > spectre/meltdown changes.
>
> Which means it affects all maintained stable trees beca
> > + /* Make sure we aren't patching a freed init section */
> > + if (in_init_section(patch_addr) && init_freed())
> > + return 0;
> > +
>
> Do we even need the init_freed() check?
Maybe not. If userspace isn't up, then maybe it's ok to skip.
> What user input can we process i
] will be off from
dt-ftrs but we need to turn it on for the no suspend case.
This patch fixes this by enabling HFSCR TM in this case.
Cc: sta...@vger.kernel.org # 4.15+
Signed-off-by: Michael Neuling
---
arch/powerpc/kernel/setup_64.c | 18 --
1 file changed, 12 insertions(+), 6
tch
between the init section being freed and setting SYSTEM_RUNNING (in
kernel_init()) but that seems like an impractical time and small
window for any code patching to occur.
cc: sta...@vger.kernel.org # 4.13+
Signed-off-by: Michael Neuling
---
For stable I've marked this as v4.13+ since that&
> > --- a/arch/powerpc/lib/code-patching.c
> > +++ b/arch/powerpc/lib/code-patching.c
> > @@ -23,11 +23,33 @@
> > #include
> > #include
> >
> > +
>
> This blank line is not needed
Ack
>
> > +static inline bool in_init_section(unsigned int *patch_addr)
> > +{
> > + if (patch_addr <
memory
checker while doing partition migration testing on powervm (this
starts the code patching post migration via
/sys/kernel/mobility/migration). In theory, it could also happen when
using /sys/kernel/debug/powerpc/barrier_nospec.
cc: sta...@vger.kernel.org # 4.13+
Signed-off-by: Michael Neul
HV: Work around transactional memory bugs
in POWER9")
Cc: # 4.17+
Test-by: Suraj Jitindar Singh
Reviewed-by: Paul Mackerras
Signed-off-by: Michael Neuling
---
arch/powerpc/kernel/exceptions-64s.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/exce
On Thu, 2018-09-13 at 07:38 +0200, Christophe LEROY wrote:
>
> Le 13/09/2018 à 03:21, Tyrel Datwyler a écrit :
> > On 09/12/2018 05:36 PM, Michael Neuling wrote:
> > >
> > > >
> > > > > + (unsigned long)patch_addr);
> >
Alan,
Thanks for the patch... A few minor comments...
> Re: [PATCH] Correct PowerPC VDSO call frame info
Our convention is to add powerpc: to the start. ie
[PATCH] powerpc: Correct VDSO call frame info
or even:
[PATCH] powerpc/vdso: Correct call frame info
On Fri, 2018-09-14 at 08:57 +
memory
checker while doing partition migration testing on powervm (this
starts the code patching post migration via
/sys/kernel/mobility/migration). In theory, it could also happen when
using /sys/kernel/debug/powerpc/barrier_nospec.
cc: sta...@vger.kernel.org # 4.13+
Signed-off-by: Michael Neul
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> This patchset for the hardware transactional memory (TM) subsystem aims to
> avoid spending a lot of time on TM suspended mode in kernel space. It
> basically
> changes where the reclaim/recheckpoint will be executed.
>
> Once a CPU enters i
This series is not bisectable because this patch fails with:
arch/powerpc/kernel/process.c:993:13: error: ‘tm_fix_failure_cause’ defined but
not used [-Werror=unused-function]
static void tm_fix_failure_cause(struct task_struct *task, uint8_t cause)
^
cc1: all warnings being treated
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> Now the transaction reclaims happens very earlier in the trap handler, and
> it is impossible to know precisely, at that early time, what should be set
> as the failure cause for some specific cases, as, if the task will be
> rescheduled, thu
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> This patch creates a macro that will be invoked on all entrance to the
> kernel, so, in kernel space the transaction will be completely reclaimed
> and not suspended anymore.
There are still some calls to tm_reclaim_current() in process.c. S
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> Now the transaction reclaims happens very earlier in the trap handler, and
> it is impossible to know precisely, at that early time, what should be set
> as the failure cause for some specific cases, as, if the task will be
> rescheduled, thu
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> __switch_to_tm is the function that switches between two tasks which might
> have TM enabled. This function is clearly split in two parts, the task that
> is leaving the CPU, known as 'prev' and the task that is being scheduled,
> known as ne
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> Do not recheckpoint at signal code return. Just make sure TIF_RESTORE_TM is
> set, which will restore on the exit to userspace by restore_tm_state.
Cool, but what about the same for reclaim? Why not avoid treclaim since it's
done on entry?
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> Make sure that we are not suspended on ptrace and that the registers were
> already reclaimed.
>
> Since the data was already reclaimed, there is nothing to be done here
> except to restore the SPRs.
>
> Signed-off-by: Breno Leitao
> ---
>
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> In the previous TM code, trecheckpoint was being executed in the middle of
> an exception, thus, DSCR was being restored to default kernel DSCR value
> after trecheckpoint was done.
>
> With this current patchset, trecheckpoint is executed j
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> Since the transaction will be doomed with treckpt., the TEXASR[FS]
> should be set, to reflect that the transaction is a failure. This patch
> ensures it before recheckpointing, and remove changes from other places
> that were calling recheck
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> The Documentation/powerpc/transactional_memory.txt says:
>
> "Syscalls made from within a suspended transaction are performed as normal
> and the transaction is not explicitly doomed by the kernel. However,
> what the kernel does to pe
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