On Tue, Mar 31, 2015 at 01:13:26PM -0600, Alex Williamson wrote:
>On Thu, 2015-03-26 at 16:42 +1100, Gavin Shan wrote:
>> The patch adds one more EEH sub-command (VFIO_EEH_PE_INJECT_ERR)
>> to inject the specified EEH error, which is represented by
>> (struct vfio_eeh_pe_err)
ould fix commit 65ebf4b63 ("powerpc/powernv: Move controller ops
from ppc_md to controller_ops")
If that's the case, the above line could be replaced with:
Fixes: 65ebf4b63 ("powerpc/powernv: Move controller ops from ppc_md to
controller_ops")
>Reported-by: Gavin Shan
>S
igned-off-by: Gavin Shan
---
drivers/pci/setup-bus.c | 12 +---
include/linux/pci.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 4fd0cac..a7d0c3c 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/
/added PCI devices.
Changelog
=
v3:
* Rebased to 4.1.RC0
* PowerNV PCI infrasturcture is total refactored in order to support PCI
hotplug. The PowerNV hotplug driver is also reworked a lot because of
the changes in skiboot in order to support PCI hotplug.
Gavin Shan (21):
just provide 128 M64 (16 BARs)
segments and fixed mapping between PE# and M64 segment# in order
to keep same logic to support M64 for PHB3 and P7IOC. In turn, we
just need different phb->init_m64() hooks for P7IOC and PHB3.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-iod
any
more. Also, the logic to mapping IO and M32 segments are combined to
simplify the code. Besides, it's always worthy to trace the IO and M32
segments consumed by one PE, which can be released at PCI unplugging
time.
Signed-off-by: Gavin Shan
---
arch/powerpc/plat
PE# for M64 segments according to the M64 resources
of the PCI devices (not bridges) contained in the PE. Besides, it's
always worthy to trace the M64 segments consumed by the PE, which can
be released at PCI unplugging time.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms
delayed a bit as well.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/ppc-pci.h | 1 -
arch/powerpc/kernel/eeh_dev.c | 2 +-
arch/powerpc/kernel/pci_dn.c | 40 +++---
arch/powerpc/platforms/maple/pci.c | 35
() opal_pci_get_power_status()
pnv_pci_set_power_status() opal_pci_set_power_status()
Besides, the patch also exports pnv_pci_hotplug_notifier() to allow
registering PCI hotplug notifier, which will be used to receive PCI
hotplug message from skiboot firmware.
Signed-off-by: Gavin Shan
---
arch/powerpc
, which is initialized to 1 and increased with 1 when a
new PCI device joins the PE. Once the last PCI device leaves the
PE, the PE is going to be release together with its associated
(IO, M32, M64, DMA) resources.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 3 +
ar
Nobody is using the this function. The patch drops it.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 71 ---
1 file changed, 71 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci
ping. The PE# for dynamic allocation
is quite flexible and has no limitation.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 1 +
arch/powerpc/kernel/pci-common.c | 10 +
arch/powerpc/platforms/powernv/pci-ioda.c | 307 --
arch/powerp
;s primary bus if
we have valid bridge. Otherwise, we assume it's root bus or SRIOV
virtual bus and PE won't be assigned during PCI plugging time.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-common.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a
vices, in order to avoid kernel crash.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-hotplug.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/pci-hotplug.c
b/arch/powerpc/kernel/pci-hotplug.c
index 0040343..651a866a 100644
--- a/arch/powerpc/kerne
evice tree.
The skiboot firmware doesn't export the capability to access attention
LEDs yet and it's something for TBD.
Signed-off-by: Gavin Shan
---
drivers/pci/hotplug/Kconfig| 12 +
drivers/pci/hotplug/Makefile | 4 +
drivers/pci/hotplug/powernv_php.c
issue on PHB3.
The patch improves DMA32 segment assignment by removing the
dependency of existing PEs to make the piece of logic friendly
to PCI hotplug. Besides, it's always worthy to trace the DMA32
segments consumed by one PE, which can be released at PCI
unplugging time.
Signed-off-
quire
fundamental reset in order to successfully reload their firmwares
after the reset. The patch translates hot reset to fundamental reset
for that case.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 35 +---
1 file changed, 26 insertions(
probing EEH devices for PowerNV platform
until that point.
Fixes: 1c509148b ("powerpc/eeh: Do probe on pci_dn")
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/eeh.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powerpc/kernel/eeh.c
index
s, which is the behaviour before the firmware supports PCI slot
reset. So the changes don't depend on the PCI slot reset capability
exposed from the firmware.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h | 1 +
arch/powerpc/include/asm/opal.h |
We might not get some PCI slot information (e.g. power status)
immediately by OPAL API. Instead, opal_pci_poll() need to be called
for the required information.
The patch introduces pnv_pci_poll(), which bases on original
pnv_eeh_poll(), to cover the above case
Signed-off-by: Gavin Shan
The patch moves pcibios_find_pci_bus() to PPC kerenl directory so
that it can be reused by hotplug code for pSeries and PowerNV
platform at the same time.
Signed-off-by: Gavin Shan
Acked-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/pci-hotplug.c | 36
The eeh_dev is always created based on pci_dn, but with initcall
supported by core_initcall_sync(). The patch creates eeh_dev
when pci_dn is created, indicating they have same life cycle.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h | 6 --
arch/powerpc/kernel
The device tree nodes will be changed dynamically on PCI hotplug
events on PowerNV platform. The patch selects OF_DYNAMIC on the
platform to support PCI hotplug.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc
()
add_pci_device_node_info() update_dn_pci_info()
remove_pci_device_node_info() newly added
The patch also releases eeh_dev when its corresponding pci_dn
is released, indicating they have same life cycle.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 3 +-
arch/powerpc/include
and clears EEH_PE_ISOLATED properly during reset
in function pcibios_set_pcie_reset_state() to fix the issue.
Fixes: 28158cd ("Enhance pcibios_set_pcie_reset_state()")
Reported-by: Carol L. Soto
Signed-off-by: Gavin Shan
Tested-by: Carol L. Soto
---
arch/powerpc/kernel/eeh.c | 5 +++
So we have to delay probing EEH devices
for PowerNV platform until the PE# is assigned.
Fixes: 1c509148b ("powerpc/eeh: Do probe on pci_dn")
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/eeh.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/powerpc/kernel/eeh.c b/arch/powe
On Fri, May 01, 2015 at 09:50:57AM +1000, Michael Ellerman wrote:
>On Fri, 2015-05-01 at 09:22 +1000, Gavin Shan wrote:
>> Commit 1c509148b ("powerpc/eeh: Do probe on pci_dn") probes EEH
>> devices in early stage, which is reasonable to pSeries platform.
>> However,
On Fri, May 01, 2015 at 01:51:37PM +1000, Michael Ellerman wrote:
>On Fri, 2015-05-01 at 11:28 +1000, Gavin Shan wrote:
>> On Fri, May 01, 2015 at 09:50:57AM +1000, Michael Ellerman wrote:
>> >On Fri, 2015-05-01 at 09:22 +1000, Gavin Shan wrote:
>> >> Commit 1c5091
So we have to delay probing EEH devices for PowerNV
platform until the PE# is assigned.
Fixes: ff57b454ddb9 ("powerpc/eeh: Do probe on pci_dn")
Signed-off-by: Gavin Shan
---
v2: Corrected commit ID
---
arch/powerpc/kernel/eeh.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/ar
plug. The PowerNV hotplug driver is also reworked a lot because of
the changes in skiboot in order to support PCI hotplug.
Gavin Shan (21):
pci: Add pcibios_setup_bridge()
powerpc/powernv: Enable M64 on P7IOC
powerpc/powernv: M64 support improvement
powerpc/powernv: Improve IO and M32
igned-off-by: Gavin Shan
---
drivers/pci/setup-bus.c | 12 +---
include/linux/pci.h | 1 +
2 files changed, 10 insertions(+), 3 deletions(-)
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 4fd0cac..a7d0c3c 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/
any
more. Also, the logic to mapping IO and M32 segments are combined to
simplify the code. Besides, it's always worthy to trace the IO and M32
segments consumed by one PE, which can be released at PCI unplugging
time.
Signed-off-by: Gavin Shan
---
arch/powerpc/plat
just provide 128 M64 (16 BARs)
segments and fixed mapping between PE# and M64 segment# in order
to keep same logic to support M64 for PHB3 and P7IOC. In turn, we
just need different phb->init_m64() hooks for P7IOC and PHB3.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-iod
PE# for M64 segments according to the M64 resources
of the PCI devices (not bridges) contained in the PE. Besides, it's
always worthy to trace the M64 segments consumed by the PE, which can
be released at PCI unplugging time.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms
The eeh_dev is always created based on pci_dn, but with initcall
supported by core_initcall_sync(). The patch creates eeh_dev
when pci_dn is created, indicating they have same life cycle.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h | 6 --
arch/powerpc/kernel
delayed a bit as well.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/ppc-pci.h | 1 -
arch/powerpc/kernel/eeh_dev.c | 2 +-
arch/powerpc/kernel/pci_dn.c | 40 +++---
arch/powerpc/platforms/maple/pci.c | 35
s, which is the behaviour before the firmware supports PCI slot
reset. So the changes don't depend on the PCI slot reset capability
exposed from the firmware.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/eeh.h | 1 +
arch/powerpc/include/asm/opal.h |
issue on PHB3.
The patch improves DMA32 segment assignment by removing the
dependency of existing PEs to make the piece of logic friendly
to PCI hotplug. Besides, it's always worthy to trace the DMA32
segments consumed by one PE, which can be released at PCI
unplugging time.
Signed-off-
Nobody is using the this function. The patch drops it.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 71 ---
1 file changed, 71 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci
The device tree nodes will be changed dynamically on PCI hotplug
events on PowerNV platform. The patch selects OF_DYNAMIC on the
platform to support PCI hotplug.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc
evice tree.
The skiboot firmware doesn't export the capability to access attention
LEDs yet and it's something for TBD.
Signed-off-by: Gavin Shan
---
drivers/pci/hotplug/Kconfig| 12 +
drivers/pci/hotplug/Makefile | 4 +
drivers/pci/hotplug/powernv_php.c
ping. The PE# for dynamic allocation
is quite flexible and has no limitation.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 1 +
arch/powerpc/kernel/pci-common.c | 10 +
arch/powerpc/platforms/powernv/pci-ioda.c | 307 --
arch/powerp
()
add_pci_device_node_info() update_dn_pci_info()
remove_pci_device_node_info() newly added
The patch also releases eeh_dev when its corresponding pci_dn
is released, indicating they have same life cycle.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 3 +-
arch/powerpc/include
, which is initialized to 1 and increased with 1 when a
new PCI device joins the PE. Once the last PCI device leaves the
PE, the PE is going to be release together with its associated
(IO, M32, M64, DMA) resources.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 3 +
ar
quire
fundamental reset in order to successfully reload their firmwares
after the reset. The patch translates hot reset to fundamental reset
for that case.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 35 +---
1 file changed, 26 insertions(
vices, in order to avoid kernel crash.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-hotplug.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/pci-hotplug.c
b/arch/powerpc/kernel/pci-hotplug.c
index 0040343..651a866a 100644
--- a/arch/powerpc/kerne
The patch moves pcibios_find_pci_bus() to PPC kerenl directory so
that it can be reused by hotplug code for pSeries and PowerNV
platform at the same time.
Signed-off-by: Gavin Shan
Acked-by: Benjamin Herrenschmidt
---
arch/powerpc/kernel/pci-hotplug.c | 36
We might not get some PCI slot information (e.g. power status)
immediately by OPAL API. Instead, opal_pci_poll() need to be called
for the required information.
The patch introduces pnv_pci_poll(), which bases on original
pnv_eeh_poll(), to cover the above case
Signed-off-by: Gavin Shan
() opal_pci_get_power_status()
pnv_pci_set_power_status() opal_pci_set_power_status()
Besides, the patch also exports pnv_pci_hotplug_notifier() to allow
registering PCI hotplug notifier, which will be used to receive PCI
hotplug message from skiboot firmware.
Signed-off-by: Gavin Shan
---
arch/powerpc
;s primary bus if
we have valid bridge. Otherwise, we assume it's root bus or SRIOV
virtual bus and PE won't be assigned during PCI plugging time.
Signed-off-by: Gavin Shan
---
arch/powerpc/kernel/pci-common.c | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a
IC
device nodes.
* of_fdt_add_subtree() is the introduced API to do the work.
Cc: Grant Likely
Cc: Rob Herring
Signed-off-by: Gavin Shan
---
drivers/of/dynamic.c | 19 +--
drivers/of/fdt.c | 133 -
include/linux/of.h | 2 +
in
On Fri, May 01, 2015 at 07:54:03AM -0500, Rob Herring wrote:
>+dt list
>
>On Fri, May 1, 2015 at 1:03 AM, Gavin Shan wrote:
>> The requirement is raised when developing the PCI hotplug feature
>> for PowerPC PowerNV platform, which runs on top of skiboot firmware.
>> W
On Sat, May 02, 2015 at 09:29:36AM +1000, Benjamin Herrenschmidt wrote:
>On Sat, 2015-05-02 at 08:57 +1000, Benjamin Herrenschmidt wrote:
>
>> > Overlay = an FDT blob to graft into a live running system. Sounds like
>> > the same thing.
>> >
>> > > As for the details of Gavin implementation, I hav
On Sat, May 02, 2015 at 12:48:26PM +1000, Benjamin Herrenschmidt wrote:
>On Sat, 2015-05-02 at 09:29 +1000, Benjamin Herrenschmidt wrote:
>
>> Looking a bit more at it, I don't quite see how I can attach a subtree
>> using that stuff.
>>
>> Instead, each node in the overlay seems to need extra nod
the subject. I'll fix it up in next revision.
>On Fri, May 01, 2015 at 04:02:48PM +1000, Gavin Shan wrote:
>> Currently, PowerPC PowerNV platform utilizes ppc_md.pcibios_fixup(),
>> which is called for once after PCI probing and resource assignment
>> are completed, to allocat
On Mon, May 04, 2015 at 03:07:30PM +0800, Wei Yang wrote:
>During the EEH procedure, when a device's driver is not EEH aware or no
^
EEH recovery,
>driver is binded with a device, EEH core would do hotplug on this devices.
^^
On Mon, May 04, 2015 at 03:07:31PM +0800, Wei Yang wrote:
>This patch caches the index of a VF in its PF in pci_dn.
>
At least you can mention the purpose of vf_index to make the commit log
complete. The following message looks better?
The patch caches the VF index in pci_dn, which can be used to
On Mon, May 04, 2015 at 03:07:34PM +0800, Wei Yang wrote:
Please reorder PATCH[6] with this one because the EEH device is expected
to be created before EEH PE.
>On powernv platform, VF PE is a special PE which is different from the Bus
>PE. On the EEH side, it needs a corresponding concept to ha
On Mon, May 04, 2015 at 03:07:35PM +0800, Wei Yang wrote:
Please order this patch and PATCH[5] because EEH device is expected to
be created before EEH PE.
>EEH on powerpc platform needs eeh_dev structure to track the pci device
^^^
On Mon, May 04, 2015 at 03:07:36PM +0800, Wei Yang wrote:
>Before VF PE introduced, there isn't a method to reset an individual pci
^^^^
is PCI
>function. And sin
On Mon, May 04, 2015 at 03:07:37PM +0800, Wei Yang wrote:
>Since FW is not aware of VFs, the restore action for VF should be done in
^^
skiboot firmware
>kernel.
>
>This patch introduces pnv_eeh_vf_restore_config() for VF.
>
Would it be better?
The patch introduces function pnv_eeh_
On Sat, May 09, 2015 at 10:18:42AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>The patch enables M64 window on P7IOC, which has been enabled on
>>PHB3. Comparing to PHB3, there are 16 M64 BARs and each of them
>>are divided to 8 segm
On Sat, May 09, 2015 at 08:24:14PM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>We're having the hardware or enforced (on P7IOC) limitation: M64
>
>I would think if it is enforced, then it is enforced by hardware but you say
>"hard
On Sat, May 09, 2015 at 08:53:38PM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>The PHB's IO or M32 window is divided evenly to segments, each of
>>them can be mapped to arbitrary PE# by IODT or M32DT. Current code
>>figures out the co
On Sat, May 09, 2015 at 09:43:16PM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>Currently, the PEs and their associated resources are assigned
>>in ppc_md.pcibios_fixup(). The function is called for once after
>>PCI probing and resources as
On Sat, May 09, 2015 at 10:43:23PM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>The original code doesn't support releasing PEs dynamically, meaning
>>that PE and the associated resources (IO, M32, M64 and DMA) can't
>>be release
On Sat, May 09, 2015 at 11:41:05PM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>For PowerNV platform, running on top of skiboot, all PE level reset
>>should be routed to firmware if the bridge of the PE primary bus has
>>device-node p
On Sun, May 10, 2015 at 12:12:18AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>Function pnv_pci_reset_secondary_bus() is used to reset specified
>>PCI bus, which is leaded by root complex or PCI bridge. That means
>>the function shouldn&#x
On Sun, May 10, 2015 at 12:30:07AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:03 PM, Gavin Shan wrote:
>>We might not get some PCI slot information (e.g. power status)
>>immediately by OPAL API. Instead, opal_pci_poll() need to be called
>>for the required inform
On Sun, May 10, 2015 at 12:55:51AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:03 PM, Gavin Shan wrote:
>>The pci_dn instances are allocated from memblock or bootmem when
>>creating PCI controller (hoses) in setup_arch(). The PCI hotplug,
>>which will be supported
On Sun, May 10, 2015 at 01:08:28AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:03 PM, Gavin Shan wrote:
>>The eeh_dev is always created based on pci_dn, but with initcall
>>supported by core_initcall_sync(). The patch creates eeh_dev
>>when pci_dn is created, indi
On Sun, May 10, 2015 at 01:54:31AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:03 PM, Gavin Shan wrote:
>>The patch intends to add standalone driver to support PCI hotplug
>>for PowerPC PowerNV platform, which runs on top of skiboot firmware.
>>The firmware identifi
On Sat, May 09, 2015 at 09:59:25AM +1000, Alexey Kardashevskiy wrote:
>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>The series of patches intend to support PCI slot for PowerPC PowerNV platform,
>>which is running on top of skiboot firmware. The patchset requires
>>corresp
On Mon, May 11, 2015 at 05:02:08PM +1000, Alexey Kardashevskiy wrote:
>On 05/11/2015 04:25 PM, Gavin Shan wrote:
>>On Sat, May 09, 2015 at 10:43:23PM +1000, Alexey Kardashevskiy wrote:
>>>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>>>The original code doesn'
On Mon, May 11, 2015 at 05:17:42PM +1000, Alexey Kardashevskiy wrote:
>On 05/11/2015 04:47 PM, Gavin Shan wrote:
>>On Sun, May 10, 2015 at 12:12:18AM +1000, Alexey Kardashevskiy wrote:
>>>On 05/01/2015 04:02 PM, Gavin Shan wrote:
>>>>Function pnv_pci_reset_se
On Tue, May 12, 2015 at 10:53:29AM +1000, Alexey Kardashevskiy wrote:
>On 05/12/2015 10:03 AM, Gavin Shan wrote:
>>On Mon, May 11, 2015 at 05:02:08PM +1000, Alexey Kardashevskiy wrote:
>>>On 05/11/2015 04:25 PM, Gavin Shan wrote:
>>>>On Sat, May 09, 2015 at 10:43:23
n the table presence here, remove the workaround
>from pnv_pci_ioda2_set_bypass(); also remove the @add_to_iommu_group
>parameter from pnv_ioda_setup_bus_dma().
>
>Signed-off-by: Alexey Kardashevskiy
Acked-by: Gavin Shan
Thanks,
Gavin
>---
> arch/powerpc/kernel/eeh.c
On Mon, May 11, 2015 at 01:54:12PM +0800, Wei Yang wrote:
>On Mon, May 11, 2015 at 12:21:04PM +1000, Gavin Shan wrote:
>>On Mon, May 04, 2015 at 03:07:31PM +0800, Wei Yang wrote:
>>>This patch caches the index of a VF in its PF in pci_dn.
>>>
>>
>>At least
On Mon, May 11, 2015 at 02:25:49PM +0800, Wei Yang wrote:
>On Mon, May 11, 2015 at 12:37:07PM +1000, Gavin Shan wrote:
>>On Mon, May 04, 2015 at 03:07:34PM +0800, Wei Yang wrote:
>>
>>Please reorder PATCH[6] with this one because the EEH device is expected
>>to be creat
On Tue, May 12, 2015 at 09:31:34AM +0800, Wei Yang wrote:
>On Mon, May 11, 2015 at 02:22:38PM +1000, Gavin Shan wrote:
>>On Mon, May 04, 2015 at 03:07:37PM +0800, Wei Yang wrote:
>>>Since FW is not aware of VFs, the restore action for VF should be done in
>> ^^
&
When detecting EEH error on non-existing PE, including the reserved
one, the PE is simply unfrozen without dumping the PHB diag-data,
which is useful for locating the root cause of the EEH error. The
patch dumps the PHB diag-data when non-existing PE reports error.
Signed-off-by: Gavin Shan
On LE kernel, the non-existing PE number in BE format derived from
skiboot firmware isn't converted to LE format properly as following
kernel log indicates:
EEH: Clear non-existing PHB#4-PE#200
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 2
On Tue, May 12, 2015 at 04:06:43PM +0800, Wei Yang wrote:
>On Mon, May 11, 2015 at 12:48:56PM +1000, Gavin Shan wrote:
>>On Mon, May 04, 2015 at 03:07:35PM +0800, Wei Yang wrote:
>>
>>Please order this patch and PATCH[5] because EEH device is expected to
>>be created
On Tue, May 12, 2015 at 04:16:45PM +0800, Wei Yang wrote:
>On Tue, May 12, 2015 at 04:34:03PM +1000, Gavin Shan wrote:
>>>
>>>>>+ /* Disable Completion Timeout */
>>>>>+ if (pcie_cap) {
>>>>>+ pnv_pci_cfg_read(pdn, pcie_cap + PC
On Mon, May 04, 2015 at 03:07:38PM +0800, Wei Yang wrote:
>Compared with Bus PE, VF PE just has one single pci function. This
^^^
>introduces the difference of error handling on a VF PE.
>
Lets have simple example to make the discussion easy: Suppos
dma_pe();
>- for virtual PE, the sysfs entries are not ready to create all symlinks
>so actual adding is happening in tce_iommu_bus_notifier.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
>---
>Changes:
>v10:
>* new to the series
>
nse when we add TCE table sharing.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> arch/powerpc/platforms/powernv/pci-ioda.c | 28
> 1 file changed, 8 insertions(+), 20 deletions(-)
>
>diff --git a/arch/powerpc/p
ommu_free_table().
>
>This adds a iommu_pseries_free_table() helper which does
>iommu_group_put() and iommu_free_table(). Later it will be
>changed to receive a table_group and we will have to change less
>lines then.
>
>This should cause no behavioural change.
>
>Signed-off-by:
DMA windows, we will need to be able to release
>iommu_table even if it was used for VFIO in which case it_map is NULL
>so does the patch.
>
>Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Gavin Shan
>---
> arch/powerpc/kernel/iommu.c | 3 +--
> 1 file changed, 1 insertion(+),
the rest of the patch is mechanical.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v9:
>* added missing tce_iommu_clear call after iommu_release
related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
>Changes:
>v8: changed subject
>
>v6:
>* the helper is simplified to one line
>
>v4:
>* s/tce_check_page_size/tce_page_is_contained/
>---
> dr
do not include
>IOMMU_PAGE_SHIFT.
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce.c | 26 +--
for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v4:
>* new helpers do nothing if @npages == 0
>* tce_iommu_disable() now can decrement the counter if the group was
>detached (not possibl
hat the container is enabled, otherwise
>-EPERM is returned.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce
r an IOMMU table which will accept/return
>physical addresses (unlike current tce_build()) which will eliminate
>redundant conversions.
>
>Signed-off-by: Alexey Kardashevskiy
>[aw: for the vfio related changes]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Revie
On Wed, May 13, 2015 at 02:51:36PM +0200, Thomas Huth wrote:
>On Wed, 13 May 2015 16:30:16 +1000
>Alexey Kardashevskiy wrote:
>
>> On 05/13/2015 03:33 PM, Gavin Shan wrote:
>> > On Tue, May 12, 2015 at 01:38:54AM +1000, Alexey Kardashevskiy wrote:
>> >> A
nges]
>Acked-by: Alex Williamson
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
Thanks,
Gavin
>---
> drivers/vfio/vfio_iommu_spapr_tce.c | 40 ++---
> 1 file changed, 24 insertions(+), 16 deletions(-)
>
>diff --git a/drivers/vf
Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v9:
>* added comment why we must put only valid permission bits
>---
> arch/powerpc/include/asm/iommu.h | 1 +
> arch/powerpc/kernel/iommu.c | 15
U tables in the system and replace "multi" callbacks with single
>ones.
>
>For powernv, this defines _ops per PHB type which are P5IOC2/IODA1/IODA2.
>This makes the callbacks for them public. Later patches will extend
>callbacks for IODA1/2.
>
>No change in behaviour is
ate() to receives TCE index and
>number of pages which are PCI addresses shifted by IOMMU page shift.
>
>No change in behaviour is expected.
>
>Signed-off-by: Alexey Kardashevskiy
>Reviewed-by: David Gibson
Reviewed-by: Gavin Shan
>---
>Changes:
>v10:
>* moved before
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