an <= in ibmveth_change_mtu(), which only permits an MTU which
is strictly smaller than the buffer size, rather than allowing the buffer
to be completely filled.
This patch fixes the buglet.
Signed-off-by: David Gibson
---
drivers/net/ethernet/ibm/ibmveth.c | 2 +-
1 file changed, 1 insertion(+),
group attached but with the counter incremented.
>
> While we are here, update the comment explaining why RLIMIT_MEMLOCK
> might be required to be bigger than the guest RAM. This also prints
> pid of the current process in pr_warn/pr_debug.
>
> Signed-off-by: Alexey Kardash
y
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
pgpiXVuLdjhE8.pgp
Descri
last part, the rest of the patch is mechanical.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
mory between
> the end of the actual page and the end of the aligned up TCE page.
>
> Since compound_order() and compound_head() work correctly on non-huge
> pages, there is no need for additional check whether the page is huge.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by:
P that the container is enabled, otherwise
> -EPERM is returned.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimal
: Alexey Kardashevskiy
I have no objection to the patch though, so
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _
py/paste I'd call mechanical. Reworking logic in this
way, not so much. Say "This should cause no behavioural change" if
that's what you mean.
> Signed-off-by: Alexey Kardashevskiy
Though it's not instantly obvious, it does look as though it makes no
behavioural
reak;
> }
>
> - hva = (unsigned long) page_address(page) +
> - (tce & IOMMU_PAGE_MASK(tbl) & ~PAGE_MASK);
> + /* Preserve offset within IOMMU page */
> + hva |= tce & IOMMU_PAGE_MASK(tbl) &
; will not be called on TCE tables, for example - VFIO.
That seems a little bit clunky to me, but it's not a big enough
objection to delay the patch over, so
Reviewed-by: David Gibson
>
> This does s/tce_build/set/, s/tce_free/clear/ and removes "tce_"
> redundand prefixes
(phb, dn, tbl);
> tbl->it_ops = &iommu_table_pseries_ops;
> PCI_DN(dn)->iommu_table = iommu_init_table(tbl, phb->node);
> @@ -1120,8 +1117,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev
> *dev)
>
> pci = PCI_DN(pdn);
> if (!pci-&
cmd, arg);
> }
>
> @@ -466,16 +508,15 @@ static int tce_iommu_attach_group(void *iommu_data,
> {
> int ret;
> struct tce_container *container = iommu_data;
> - struct iommu_table *tbl = iommu_group_get_iommudata(iommu_group);
> + struct iommu
mu_spapr_tce.c
> +++ b/drivers/vfio/vfio_iommu_spapr_tce.c
> @@ -535,7 +535,7 @@ static int tce_iommu_attach_group(void *iommu_data,
> goto unlock_exit;
> }
>
> - ret = iommu_take_ownership(&table_group->tables[0]);
> + r
id iommu_table_release_ownership(struct
> iommu_table *tbl)
> if (tbl->it_offset == 0)
> set_bit(0, tbl->it_map);
>
> + for (i = 0; i < tbl->nr_pools; i++)
> + spin_unlock(&tbl->pools[i].lock);
> + spin_unlock_irqrest
->grp = iommu_group;
>
> unlock_exit:
> mutex_unlock(&container->lock);
> @@ -572,7 +585,11 @@ static void tce_iommu_detach_group(void *iommu_data,
> table_group = iommu_group_get_iommudata(iommu_group);
> BUG_ON(!table_group);
>
> - iommu_release_
ize,
> u64 dma_offset, unsigned page_shift)
> @@ -685,7 +663,7 @@ static struct iommu_table *pnv_pci_setup_bml_iommu(struct
> pci_controller *hose)
> return NULL;
> pnv_pci_setup_iommu_table(tbl, __va(be64_to_cpup(bas
> - iommu_init_table(tbl, phb->hose->node);
> -#ifdef CONFIG_IOMMU_API
> - pe->table_group.ops = &pnv_pci_ioda2_ops;
> -#endif
> iommu_register_group(&pe->table_group, phb->hose->global_number,
> pe->pe_number);
>
> if
;
> @@ -418,24 +425,33 @@ static long tce_iommu_ioctl(void *iommu_data,
> if (!tbl)
> return -ENXIO;
>
> - if ((param.size & ~IOMMU_PAGE_MASK(tbl)) ||
> - (param.vaddr & ~IOMMU_PAGE_MASK(tbl)))
> +
y mechanical patch.
???
> Signed-off-by: Alexey Kardashevskiy
But apart from that dubious comment in the commit message,
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, tha
table contains no entries */
> - if (!bitmap_empty(tbl->it_map, tbl->it_size))
> - pr_warn("%s: Unexpected TCEs for %s\n", __func__, node_name);
> -
> - /* calculate bitmap size in bytes */
> - bitmap_sz = BITS_TO_LONGS(
On Fri, Apr 10, 2015 at 04:31:02PM +1000, Alexey Kardashevskiy wrote:
> This is a part of moving DMA window programming to an iommu_ops
> callback.
>
> This is a mechanical patch.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson
On Fri, Apr 17, 2015 at 02:29:23AM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 04:46 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:31:03PM +1000, Alexey Kardashevskiy wrote:
> >>The iommu_free_table helper release memory it is using (the TCE table and
> >&
On Fri, Apr 17, 2015 at 01:48:13AM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 03:55 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:30:54PM +1000, Alexey Kardashevskiy wrote:
> >>Modern IBM POWERPC systems support multiple (currently two) TCE tables
> >>
On Fri, Apr 17, 2015 at 07:46:23PM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 03:55 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:30:54PM +1000, Alexey Kardashevskiy wrote:
> >>Modern IBM POWERPC systems support multiple (currently two) TCE tables
> >>
On Fri, Apr 17, 2015 at 08:16:13PM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 04:10 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:30:57PM +1000, Alexey Kardashevskiy wrote:
> >>This adds missing locks in iommu_take_ownership()/
> >>iommu_release_ownership
On Fri, Apr 17, 2015 at 08:09:29PM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 04:07 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:30:56PM +1000, Alexey Kardashevskiy wrote:
> >>At the moment the iommu_table struct has a set_bypass() which enables/
> >>d
On Fri, Apr 17, 2015 at 08:37:54PM +1000, Alexey Kardashevskiy wrote:
> On 04/16/2015 04:26 PM, David Gibson wrote:
> >On Fri, Apr 10, 2015 at 04:30:59PM +1000, Alexey Kardashevskiy wrote:
> >>At the moment writing new TCE value to the IOMMU table fails with EBUSY
> >&g
an <= in ibmveth_change_mtu(), which only permits an MTU which
is strictly smaller than the buffer size, rather than allowing the buffer
to be completely filled.
This patch fixes the buglet.
Signed-off-by: David Gibson 1
---
drivers/net/ethernet/ibm/ibmveth.c | 4 ++--
1 file changed, 2 inser
On Mon, Apr 20, 2015 at 04:34:24PM +1000, Alexey Kardashevskiy wrote:
> On 04/20/2015 12:46 PM, David Gibson wrote:
> >On Fri, Apr 17, 2015 at 08:16:13PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/16/2015 04:10 PM, David Gibson wrote:
> >>>On Fri, Apr 10, 20
On Mon, Apr 20, 2015 at 04:55:32PM +1000, Alexey Kardashevskiy wrote:
> On 04/20/2015 12:44 PM, David Gibson wrote:
> >On Fri, Apr 17, 2015 at 08:09:29PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/16/2015 04:07 PM, David Gibson wrote:
> >>>On Fri, Apr 10, 20
On Tue, Apr 21, 2015 at 09:47:54PM +1000, Alexey Kardashevskiy wrote:
> On 04/21/2015 07:43 PM, David Gibson wrote:
> >On Mon, Apr 20, 2015 at 04:55:32PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/20/2015 12:44 PM, David Gibson wrote:
> >>>On Fri, Apr 17, 20
an <= in ibmveth_change_mtu(), which only permits an MTU which
is strictly smaller than the buffer size, rather than allowing the buffer
to be completely filled.
This patch fixes the buglet.
Signed-off-by: David Gibson
Acked-by: Thomas Falcon
---
drivers/net/ethernet/ibm/ibmveth.c | 4 ++--
1 file
t;
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www
chg() callback for an IOMMU table which will accept/return
> physical addresses (unlike current tce_build()) which will eliminate
> redundant conversions.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
Reviewed-by: Da
ng the it_map to the state it was in when we called
> iommu_take_ownership().
Ah! I finally understand what all this bit#0 stuff is about. Thanks
for the explanation.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
With one small comment..
> ---
> Change
* bus number, print that out instead.
> - */
> - pe->tce_inval_reg_phys = be64_to_cpup(swinvp);
> - tbl->it_index = (unsigned long)ioremap(pe->tce_inval_reg_phys,
> - 8);
> + if (pe->tce_in
27;m not particularly fond of the "table_group" name, but I can't
really think of a better name for now. So,
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank
gt;it_page_shift));
>
> - /* Some implementations won't cache invalid TCEs and thus may not
> - * need that flush. We'll probably turn it_type into a bit mask
> - * of flags if that becomes the case
> - */
> - if (tbl->it_type & TCE_PCI_SWINV_C
ned-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgib
p from
an enabled container would fail with EBUSY, now it forces a disable.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
> Reviewed-by: David Gibson
> ---
> drivers/vfio/vfio_iommu_spapr_tce.c | 40
> ++
via the bypass window instead of just
> + * the pages that has been explicitly mapped into the iommu
> + */
> + table_group->ops->take_ownership(table_group);
> + ret = 0;
> + }
> +
> + if (ret)
> + g
__init pnv_pci_init_p5ioc2_phb(struct
> device_node *np, u64 hub_id,
> u64 phb_id;
> int64_t rc;
> static int primary = 1;
> + struct iommu_table_group *table_group;
> + struct iommu_table *tbl;
>
> pr_info(" Initializing p5ioc2 PHB %s\n&
ior is expected.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
> ---
> Changes:
> v9:
> * new patch in the series to separate this mechanical change from
> functional changes; this is not right before
> "powerpc/powernv: Implement multilevel TCE
;
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http
f (!tbl->it_size)
> return;
>
> - free_pages(tbl->it_base, get_order(tbl->it_size << 3));
> + pnv_free_tce_table_pages(tbl->it_base, size, tbl->it_indirect_levels);
> iommu_reset_table(tbl, "pnv");
> }
>
> diff --git a/arch/pow
> is never recreated after reboot but it will in the following patches.
>
> This should cause no behavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: David Gibson
Really? I don't remember this one.
> ---
> Changes:
> v9:
> * ini
ops->release_ownership)
> tce_iommu_release_ownership(container, table_group);
> - else
> + else if (!table_group->ops->unset_window)
> + WARN_ON_ONCE(1);
> + else {
> + for (i = 0; i < IOMMU_TABLE_GROUP_MAX_TABLES; ++i) {
> +
; helpers as it does not do anything IODA2-specific.
>
> This adds pnv_pci_free_table() helper to release the actual TCE table.
>
> This enforces window size to be a power of two.
>
> This should cause no behavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
>
PAGE_MASK(tbl))
> + return -EINVAL;
> +
> + if (param.vaddr & (TCE_PCI_READ | TCE_PCI_WRITE))
> return -EINVAL;
This doesn't look right - the existing check against PAGE_MASK
is still correct and included the check for the permission bits as
arch/powerpc/platforms/powernv/pci.h
> b/arch/powerpc/platforms/powernv/pci.h
> index 3d1ff584..ce4bc3c 100644
> --- a/arch/powerpc/platforms/powernv/pci.h
> +++ b/arch/powerpc/platforms/powernv/pci.h
> @@ -224,6 +224,8 @@ extern long pnv_pci_create_table(struct iommu_table_gro
break;
> + }
> + }
> +
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(mm_iommu_lookup);
> +
> +long mm_iommu_ua_to_hpa(struct mm_iommu_table_group_mem_t *mem,
> + unsigned long ua, unsigned long *hpa)
Return type should be int, it's just an
> __u64 bus_offset = num ? pe->tce_bypass_base : 0;
> long ret;
> + unsigned long *uas, uas_cb = sizeof(*uas) * (window_size >> page_shift);
> +
> + uas = vzalloc(uas_cb);
> + if (!uas)
> + return -ENOMEM;
I don't see why this is allocated
On Wed, Apr 29, 2015 at 07:02:17PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 02:04 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:41PM +1000, Alexey Kardashevskiy wrote:
> >>This replaces direct accesses to TCE table with a helper which
> >>returns
On Wed, Apr 29, 2015 at 07:44:20PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 03:30 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:47PM +1000, Alexey Kardashevskiy wrote:
> >>This extends iommu_table_group_ops by a set of callbacks to support
> >>dyn
On Thu, Apr 30, 2015 at 12:29:30PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 12:16 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:33PM +1000, Alexey Kardashevskiy wrote:
> >>This is to make extended ownership and multiple groups support patches
>
On Wed, Apr 29, 2015 at 07:00:30PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 01:25 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:40PM +1000, Alexey Kardashevskiy wrote:
> >>At the moment the DMA setup code looks for the "ibm,opal-tce-kill" propert
On Thu, Apr 30, 2015 at 12:58:12PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 01:18 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:39PM +1000, Alexey Kardashevskiy wrote:
> >>The pnv_pci_ioda_tce_invalidate() helper invalidates TCE cache. It is
> >>sup
On Wed, Apr 29, 2015 at 07:12:37PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 02:39 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:44PM +1000, Alexey Kardashevskiy wrote:
> >>This is a part of moving TCE table allocation into an iommu_ops
> >>callbac
On Wed, Apr 29, 2015 at 07:19:51PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 01:02 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:37PM +1000, Alexey Kardashevskiy wrote:
> >>This adds tce_iommu_take_ownership() and tce_iommu_release_ownership
> &
On Wed, Apr 29, 2015 at 07:51:21PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 02:18 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:42PM +1000, Alexey Kardashevskiy wrote:
> >>At the moment writing new TCE value to the IOMMU table fails with EBUSY
> >&g
On Wed, Apr 29, 2015 at 07:26:28PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 02:45 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:45PM +1000, Alexey Kardashevskiy wrote:
> >>This is a part of moving DMA window programming to an iommu_ops
> >>callbac
ock or unlock, but I don't see what the point of
actualy storing the translations in hpas is.
I had assumed it was so that you could later on get to the
translations in real mode when you do in-kernel acceleration. But
that doesn't make sense, because the array is vmalloc()ed, so can
> index b57b750..8fdcfb9 100644
> --- a/include/uapi/linux/vfio.h
> +++ b/include/uapi/linux/vfio.h
> @@ -36,6 +36,8 @@
> /* Two-stage IOMMU */
> #define VFIO_TYPE1_NESTING_IOMMU 6 /* Implies v2 */
>
> +#define VFIO_SPAPR_TCE_v2_IOMMU 7
> +
> /*
> * The IOCTL interface is designed for
r to review if you took this and the parts of the
earlier patch which add the tce32_* fields to table_group and roll
them up on their own.
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank
iommu_group_id(iommu_group),
> - iommu_group_id(container->grp));
> +
> + list_for_each_entry(tcegrp, &container->group_list, next) {
> + if (tcegrp->grp == iommu_group) {
> + found = true;
> + break;
> +
On Thu, Apr 30, 2015 at 07:56:17PM +1000, Alexey Kardashevskiy wrote:
> On 04/30/2015 02:37 PM, David Gibson wrote:
> >On Wed, Apr 29, 2015 at 07:44:20PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/29/2015 03:30 PM, David Gibson wrote:
> >>>On Sat, Apr 25, 20
On Thu, Apr 30, 2015 at 06:25:25PM +1000, Paul Mackerras wrote:
> On Thu, Apr 30, 2015 at 04:34:55PM +1000, David Gibson wrote:
> > On Sat, Apr 25, 2015 at 10:14:52PM +1000, Alexey Kardashevskiy wrote:
> > > We are adding support for DMA memory pre-registration to be used in
>
On Fri, May 01, 2015 at 10:46:08AM +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2015-04-30 at 19:33 +1000, Alexey Kardashevskiy wrote:
> > On 04/30/2015 05:22 PM, David Gibson wrote:
> > > On Sat, Apr 25, 2015 at 10:14:55PM +1000, Alexey Kardashevskiy wrote:
> > >>
On Fri, May 01, 2015 at 02:01:17PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 04:31 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:50PM +1000, Alexey Kardashevskiy wrote:
> >>In order to support memory pre-registration, we need a way to track
> >>
On Thu, Apr 30, 2015 at 07:33:09PM +1000, Alexey Kardashevskiy wrote:
> On 04/30/2015 05:22 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:55PM +1000, Alexey Kardashevskiy wrote:
> >>At the moment only one group per container is supported.
> >>POWER8 CPUs ha
On Fri, May 01, 2015 at 02:10:58PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 04:40 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:51PM +1000, Alexey Kardashevskiy wrote:
> >>This adds a way for the IOMMU user to know how much a new table will
> >>us
On Fri, May 01, 2015 at 02:35:23PM +1000, Alexey Kardashevskiy wrote:
> On 04/30/2015 04:55 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:53PM +1000, Alexey Kardashevskiy wrote:
> >>The existing implementation accounts the whole DMA window in
> >>the locked_v
On Fri, May 01, 2015 at 04:05:24PM +1000, Alexey Kardashevskiy wrote:
> On 05/01/2015 02:33 PM, David Gibson wrote:
> >On Thu, Apr 30, 2015 at 07:33:09PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/30/2015 05:22 PM, David Gibson wrote:
> >>>On Sat, Apr 25, 20
On Fri, May 01, 2015 at 04:53:08PM +1000, Alexey Kardashevskiy wrote:
> On 05/01/2015 03:12 PM, David Gibson wrote:
> >On Fri, May 01, 2015 at 02:10:58PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/29/2015 04:40 PM, David Gibson wrote:
> >>>On Sat, Apr 25, 20
On Fri, May 01, 2015 at 04:27:47PM +1000, Alexey Kardashevskiy wrote:
> On 05/01/2015 03:23 PM, David Gibson wrote:
> >On Fri, May 01, 2015 at 02:35:23PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/30/2015 04:55 PM, David Gibson wrote:
> >>>On Sat, Apr 25, 20
On Fri, May 01, 2015 at 05:12:45PM +1000, Alexey Kardashevskiy wrote:
> On 05/01/2015 02:23 PM, David Gibson wrote:
> >On Fri, May 01, 2015 at 02:01:17PM +1000, Alexey Kardashevskiy wrote:
> >>On 04/29/2015 04:31 PM, David Gibson wrote:
> >>>On Sat, Apr 25, 20
On Fri, May 01, 2015 at 07:48:49PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 03:04 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:46PM +1000, Alexey Kardashevskiy wrote:
> >>TCE tables might get too big in case of 4K IOMMU pages and DDW enabled
> >>on
On Fri, May 01, 2015 at 09:26:48PM +1000, Alexey Kardashevskiy wrote:
> On 04/29/2015 05:01 PM, David Gibson wrote:
> >On Sat, Apr 25, 2015 at 10:14:52PM +1000, Alexey Kardashevskiy wrote:
> >>We are adding support for DMA memory pre-registration to be used in
> >>conj
age = NULL;
> + goto no_page;
> }
> mask = (1UL << shift) - 1;
> - page = pte_page(*ptep);
> + page = pte_page(pte);
> if (page)
> page += (address & mask) / PAGE_SIZE;
>
> +no_page:
> local_i
ot rely on the table presence here, remove the workaround
> from pnv_pci_ioda2_set_bypass(); also remove the @add_to_iommu_group
> parameter from pnv_ioda_setup_bus_dma().
>
> Signed-off-by: Alexey Kardashevskiy
> Acked-by: Gavin Shan
Reviewed-by: David Gibson
--
David Gibson
l PE, the sysfs entries are not ready to create all symlinks
> so actual adding is happening in tce_iommu_bus_notifier.
>
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: Gavin Shan
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: Gavin Shan
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
e sense when we add TCE table sharing.
>
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: Gavin Shan
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist,
mic DMA windows, we will need to be able to release
> iommu_table even if it was used for VFIO in which case it_map is NULL
> so does the patch.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my mus
skiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
> Reviewed-by: David Gibson
> Reviewed-by: Gavin Shan
> ---
> Changes:
> v4:
> * new helpers do nothing if @npages == 0
> * tce_iommu_disable() now can decrement the counter if the group w
pci_ioda_setup_dma_pe and
> pnv_pci_ioda2_setup_dma_pe as this is where DMA is actually initialized.
> This change is here because those lines had to be changed anyway.
>
> This should cause no behavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related c
es not do much
> more compared to pnv_pci_ioda2_set_bypass. This moves tce_bypass_base
> initialization to pnv_pci_ioda2_setup_dma_pe.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
> Reviewed-by: Gavin Shan
Reviewe
ehavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
> Reviewed-by: David Gibson
> Reviewed-by: Gavin Shan
It looks like this commit message doesn't match the code - it seems
like an older or newer ve
a single TCE table and 64bit DMA was handled via
> bypass window (which has no table so no cache was used) but this is going
> to change with Dynamic DMA windows (DDW).
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have
ach PE needs to be invalidated so does the patch.
>
> This does not change pnv_pci_ioda1_tce_invalidate() as there is no plan
> to enable TCE table sharing on PHBs older than IODA2.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson
o the IOMMU code to make it work for both
> VFIO ioctl interface in in-kernel TCE acceleration (when it becomes
> available later).
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
Reviewed-by: David Gibson
--
David
wed-by: Gavin Shan
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
ot but it will in the following patches.
>
> This should cause no behavioural change.
>
> Signed-off-by: Alexey Kardashevskiy
> Reviewed-by: David Gibson
> Reviewed-by: Gavin Shan
> ---
> Changes:
> v11:
> * replaced some 1<
> v9:
> * initialize pe-&g
, IOMMU_PAGE_SHIFT_4K, phb->ioda.m32_pci_base,
> + POWERNV_IOMMU_DEFAULT_LEVELS, tbl);
> if (rc) {
> pe_err(pe, "Failed to create 32-bit TCE table, err %ld", rc);
> goto fail;
> diff --git a/arch/powerpc/platforms/powe
This makes use of new values in
> vfio_iommu_spapr_tce. IODA1/P5IOC2 do not support DDW so they do not
> advertise pagemasks to the userspace.
>
> Signed-off-by: Alexey Kardashevskiy
> Acked-by: Alex Williamson
Reviewed-by: David Gibson
--
David Gibson| I
lease and
> TVT update.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
_get_table_size()
> so the locked_vm counter can be updated correctly when a table is
> being disposed.
>
> This defines an iommu_table_group_ops callback to let VFIO know
> how much memory will be locked if a table is created.
>
> Signed-off-by: Alexey Kardashevskiy
Reviewed
and when the ownership is
> passed from VFIO to the platform code.
>
> Signed-off-by: Alexey Kardashevskiy
> [aw: for the vfio related changes]
> Acked-by: Alex Williamson
Reviewed-by: David Gibson
--
David Gibson| I'll have
sed remains 1.
>
> Host physical addresses are stored in vmalloc'ed array. In order to
> access these in the real mode (mmu off), there is a real_vmalloc_addr()
> helper. In-kernel acceleration patchset will move it from KVM to MMU code.
>
> Signed-off-by: Alexey Kar
tatic int tce_iommu_attach_group(void *iommu_data,
> else
> ret = tce_iommu_take_ownership_ddw(container, table_group);
>
> - if (!ret)
> - container->grp = iommu_group;
> + if (!ret) {
> + tcegrp->grp = iommu_group;
> + list_add
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