Hi Kumar,
> > static void register_decrementer_clockevent(int cpu)
> > {
> > struct clock_event_device *dec = &per_cpu(decrementers,
> > cpu).event; @@ -955,7 +928,8 @@ static void __init
> > init_decrementer_cloc {
> > int cpu = smp_processor_id();
> >
> > - setup_clockevent_multiplie
Here are a number of patches I've put together based on some rather
strenuous testing of our oops and kdump paths.
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panic, then delay 1 second before calling into the
panic code. Move oops_exit inside the die lock and put a newline
between oopses for clarity.
Signed-off-by: Anton Blanchard
---
We should really rename kexec_should_crash() to something like
kernel_will_panic() and use it here. I'll work on
We have a lot of complicated logic that handles possible recursion between
kdump and a system reset exception. We can solve this in a much simpler
way using the same setjmp/longjmp tricks xmon does.
As a first step, this patch removes the old system reset code.
Signed-off-by: Anton Blanchard
r and must continue
the kdump.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-25
16:41:06.228864087 +1100
+++ linux-build/arch/powe
Remove some unnecessary defines and fix some spelling mistakes.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/crash.c
===
--- linux-build.orig/arch/powerpc/kernel/crash.c2011-11-25
16:42
Our die() code was based off a very old x86 version. Update it to
mirror the current x86 code.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/traps.c
===
--- linux-build.orig/arch/powerpc/kernel/traps.c
n it is to power cycle.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/setup.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/setup.c 2011-11-08
11:41:51.84258 +1100
+++ linux-
I have an intermittent kdump fail where the hypervisor fails an H_EOI.
As a result our CPPR is never reset to 0xff and we no longer accept
interrupts.
This patch calls icp_hv_set_cppr to reset the CPPR if H_EOI fails,
fixing the kdump fail.
Signed-off-by: Anton Blanchard
---
- I'm still t
handler which is not what we want.
I took the opportunity to add defines for all the various delays
we have. There's no need for cpu_relax when we are doing an mdelay,
so remove them too.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/cr
lback.
For controlling progress now use atomic_t cpus_in_crash to count how
many CPUs have made it into the kdump code, and time_to_dump to tell
everyone it's time to dump.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kern
Most distros use it so we may as well enable it and get regular compile
testing.
Signed-off-by: Anton Blanchard
---
Index: linux-powerpc/arch/powerpc/configs/ppc64_defconfig
===
--- linux-powerpc.orig/arch/powerpc/configs
ng at exactly
the same time but I think it's best to play it safe for now. Once we
are happy with the reliability we can change it to a full spinlock.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseri
Hi Ben,
> How would we miss ?
>
> trylock does loop on stwcx. failure, it doesn't loop if the lock is
> -taken-, so if the lock is only used for actually dealing with the
> oops the only "miss" is because somebody already got it... or am I
> missing something ?
I'm thinking of two CPUs that ente
boot
issues we have on 128MB RMO boxes and all new machines have virtual
RMO, we may as well set our minimum to 256MB.
Signed-off-by: Anton Blanchard
---
Index: linux-powerpc/arch/powerpc/kernel/prom_init.c
===
--- linux-powerpc.orig
ould
be a second bit in the paca so we can calculate the break points quickly.
- One suggestion from Ben was to save and restore the VSX registers
we use inline instead of using enable_kernel_altivec.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/p
Hi,
> I hate the idea of having a POWER7 FTR bit. Every loon will (and has
> tried to in the past) attach every POWER7 related thing to it, rather
> than thinking about what the feature really is for.
>
> What about other processors which could also benefit from this copy
> loop? Turning on
ould
be a second bit in the paca so we can calculate the break points quickly.
- One suggestion from Ben was to save and restore the VSX registers
we use inline instead of using enable_kernel_altivec.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/p
bout to investigate.
Can I suggest we add:
Cc: [2.6.37+]
so it will make it back into the stable trees?
Anton
> Signed-off-by: Andreas Schwab
FWIW:
Acked-by: Anton Blanchard
> ---
> arch/powerpc/include/asm/cputime.h |6 +++---
> arch/powerpc/kernel/time.c | 10
Hi Andreas,
> There is no user of usecs_to_cputime before 3.2-rc1, so it wouldn't
> have any effect for older versions.
Great, that explains why I only noticed it last week :)
Anton
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We support 16TB of user address space and half a million contexts
so update the comment to reflect this.
Signed-off-by: Anton Blanchard
---
Index: linux-powerpc/arch/powerpc/include/asm/mmu-hash64.h
===
--- linux-powerpc.orig/arch
Hi,
> This is 2.6.32, but I think 2.6.36 is the same.
Sounds a bit like this, merged in 2.6.39.
Anton
--
commit ad5d1c888e556bc00c4e86f452cad4a3a87d22c1
Author: Anton Blanchard
Date: Sun Mar 20 15:28:03 2011 +
powerpc: Fix accounting of softirq time when idle
com
multiplatform builds.
The simple fix is to avoid tracing H_CEDE and rely on other tracepoints
and the hypervisor dispatch trace log to work out if we called H_CEDE.
This fixes a hang during boot on pSeries.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/idle.c
Enable the hardware RNG and crypto modules. I verified they both
autoload via the VIO subsystem, so there is no need to build them in.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/configs/ppc64_defconfig
===
--- a/arch
Reduce the severity of the warning given when firmware flash is
not supported. Not all platforms have it.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/kernel/rtas_flash.c
===
--- a/arch/powerpc/kernel/rtas_flash.c
"powerpc: Use enhanced touch instructions in POWER7
copy_to_user/copy_from_user" was applied twice. Remove one.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/lib/copyuser_power7.S
===
--- a/arch/p
The enhanced prefetch hint patches corrupt the condition register
that was used to check if we are in interrupt. Fix this by using cr1.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/lib/copyuser_power7.S
===
--- a/arch
owing test case:
http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c
Signed-off-by: Anton Blanchard
Cc: # 3.0+
---
Index: b/arch/powerpc/kernel/sysfs.c
===
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -
ue of thread.dscr
into the child. To avoid this, always keep thread.dscr in sync with
reality.
This issue was found with the following testcase:
http://ozlabs.org/~anton/junkcode/dscr_inherit_test.c
Signed-off-by: Anton Blanchard
Cc: # 3.0+
---
Index: b/arch/powerpc/kernel/tr
thread.dscr_inherit from
the parent which ends up being much simpler.
This was found with the following test case:
http://ozlabs.org/~anton/junkcode/dscr_default_test.c
Signed-off-by: Anton Blanchard
Cc: # 3.0+
---
Index: b/arch/powerpc/kernel/process.c
t the same time:
http://ozlabs.org/~anton/junkcode/dscr_default_test.c
http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c
http://ozlabs.org/~anton/junkcode/dscr_inherit_test.c
Signed-off-by: Anton Blanchard
Cc: # 3.0+
---
Index: b/arch/powerpc/kernel/entry
Hi Ben,
> > Or could we just move these tracepoints inside the
> > irq_enter()/irq_exit() area? (Seems not good for the timer_interrupt
> > case).
>
> I'd say just move them in. Anton, any objection ?
Sounds reasonable, no objections from me.
Anton
_
d() will always return true, so the hack
> has effectively been disabled since Dec 2006. Ergo, I think we can
> drop it.
Ouch. We probably had the last nighthawk in existence and we crushed it
years ago. So:
Acked-by: Anton Blanchard
Anton
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Hi,
> Yes. With that patch applied, things work for me again.
Thanks Alex, Nish. We can reproduce this on one of our Biminis, looking
into it now.
Anton
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e now that the global lock is gone.
Reported-by: Alexander Graf
Signed-off-by: Anton Blanchard
---
There is still an issue with the lazy u3 flushing, but I wanted
to get this out for testing.
Index: b/arch/powerpc/kernel/iommu.c
===
Most of setup.h should not be exported to userspace, so move it
back. All we are left with is the asm-generic include to pick
up the COMMAND_LINE_SIZE define.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/include/asm/setup.h
I noticed a couple of function prototypes for functions that
no longer exist. Remove them.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/include/asm/setup.h
===
--- a/arch/powerpc/include/asm/setup.h
+++ b/arch/powerpc
Hi,
Thanks for looking into this mess. One small thing we can fix in a
follow up patch:
> + if (!found)
> + printk(KERN_WARNING "Can't find PMC that caused
I think it would be worth making that a printk_ratelimited. We are
probably dead at this stage but we shouldn't spam the co
If we build a kernel with CONFIG_RELOCATABLE=y CONFIG_CRASH_DUMP=n,
the kernel fails when we run at a non zero offset. It turns out
we were incorrectly wrapping some of the relocatable kernel code
with CONFIG_CRASH_DUMP.
Signed-off-by: Anton Blanchard
Cc:
---
Index: b/arch/powerpc/kernel
Hi,
Commit bdb498c20040 (TTY: hvc_console, add tty install) breaks HVC on
ppc64. It looks a bit like a refcounting issue and we end up releasing
the tty. I haven't had a change to look closer yet.
Anton
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ime script which passes through the
prom_init.c TOC entries to make sure everything looks reasonable.
Signed-off-by: Anton Blanchard
---
To keep the patch small and reviewable, I separated the removal
of the RELOC macro into a follow up patch.
For simplicity I do the relocation in C but if self bra
Now we relocate prom_init.c on 64bit we can finally remove the
nasty RELOC() macro.
Finally a patch that I can claim has a net positive effect on
the kernel. It doesn't happen very often.
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/kernel/prom_i
64bit relocation for this to work, hence -mcmodel=large.
On older kernels we fall back to the two level TOC (-mminimal-toc)
Signed-off-by: Anton Blanchard
---
Index: b/arch/powerpc/Makefile
===
--- a/arch/powerpc/Makefile
+++ b/arch/po
Hi Ben,
> My only potential objection was that it might have been cleaner to
> actually build prom_init.c as a separate binary alltogether and piggy
> back it...
Yeah, I went through a number of options before settling on this one.
Move prom_init.c into arch/powerpc/boot
Pros:
- 32 bit enviro
SAMPLE | tail -1
SAMPLE events: 9948
Signed-off-by: Anton Blanchard
---
Cc:
Index: linux-build/arch/powerpc/kernel/perf_event.c
===
--- linux-build.orig/arch/powerpc/kernel/perf_event.c 2012-02-16
15:07:57.46538469
We want to implement a ppc64 specific version of atomic_inc_not_zero
so wrap it in an ifdef to allow it to be overridden.
Signed-off-by: Anton Blanchard
---
Index: linux-build/include/linux/atomic.h
===
--- linux-build.orig
: 39 00 00 00 li r8,0
- c01b63c4: 39 40 00 01 li r10,1
...
- c01b63e8: 7c 0a 00 50 subfr0,r10,r0
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/atomic.h
Hi,
I'm seeing this on a POWER7 blade booting 3.3.0-rc6-next-20120308:
PCI host bridge to bus :00
pci_bus :00: root bus resource [io 0x10-0x10] (bus address
[0xf-0xf])
pci_bus :00: root bus resource [mem 0x3b00-0x3b001fff] (bus
address [0xe000-0xff
Hi Ben,
> Looks like something that got fixed but the new patches from Bjorn
> aren't in next yet. I'll fwd you the patch separately to apply on top
> of what you have see if that helps (to confirm that's indeed the
> issue).
Thanks, confirmed that it fixes it. Patch below in case anyone else is
rorlog
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/rtas.h
===
--- linux-build.orig/arch/powerpc/include/asm/rtas.h2012-03-22
11:46:57.408187770 +1100
+++ linux-build/arch/powerpc/include/asm/rtas.h 2
S error log for details
Depending on the error encountered, we now issue an immediate or
an orderly power down.
Move initialization of the EPOW interrupt earlier in boot since we
want to respond to them as early as possible.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerp
We have rtas_get_sensor so we may as well use it.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/ras.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/ras.c 2012-03-22
12:42
IBM bit 2 in the rtas event-scan and check-exception calls is
marked reserved in the PAPR, so remove it from our RAS code.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/rtas.h
===
--- linux
The RAS error interrupt is no longer used but we may as well
mirror the changes we made to the EPOW interrupt.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/ras.c
===
--- linux-build.orig
So many defines for such a little file. Most of them can go.
Also remove the single entry changelog, we have git for that.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/ras.c
===
--- linux
Hi,
+#if defined(CONFIG_HW_RANDOM_PSERIES) || \
+ defined(CONFIG_HW_RANDOM_PSERIES_MODULE)
+#define OV5_PFO_HW_RNG 0x80/* PFO Random Number
Generator */ +#else
+#define OV5_PFO_HW_RNG 0x00
+#endif
Milton tipped me off about this. We really don't want to be doing
ibm,cli
syscall_dotrace_cont and syscall_error_cont tend to complicate perf
output so make them local.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig/arch/powerpc/kernel
The XER is a volatile register so there is no need to save and restore
it over a system call - zero it out in the exception stack frame
instead.
This should fix a 5 cycle stall of the mfxer/std seen on POWER7.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64
the crclr by doing it in a GPR with rlwinm which gives us more room
to better schedule the sequence.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig/arch/powerpc/kernel
The count register is volatile so we don't need to preserve it.
Store zero to the entry in the exception frame.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig
the crclr by doing it in a GPR with rlwinm which gives us more room
to better schedule the sequence.
Signed-off-by: Anton Blanchard
---
v2:
Milton pointed out that rlwinm copies the low 32bits into the top
32bits and this might confuse ptracers. We tossed around a few ideas
but his suggestion of
We have a union containing fields from the old iseries hypervisor
that has been reused for the cede latency hint. Since we no
longer support iseries, remove the union completely.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/lppaca.h
Remove all the iseries specific fields in the lppaca.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/lppaca.h
===
--- linux-build.orig/arch/powerpc/include/asm/lppaca.h 2012-04-11
12:05
Reformat lppaca.h to match Linux coding standards.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/lppaca.h
===
--- linux-build.orig/arch/powerpc/include/asm/lppaca.h 2012-04-11
12:07:53.0
Hi Gavin,
> This series of patches is going to reorganize EEH so that it could
> support multiple platforms in future. The requirements were raised
> from the aspects.
I just hit this on mainline from today (3.4.0-rc2-00065-gf549e08).
Haven't had a chance to narrow it down yet.
Oops: Kernel acc
Hi,
> I just hit this on mainline from today (3.4.0-rc2-00065-gf549e08).
> Haven't had a chance to narrow it down yet.
Looking closer, it was caused by an EEH error at boot. It looks like
the Mellanox infiniband card gets an error when probed by their
firmware tool (mstmread), but only if the ke
Use an empty inline instead of an empty function to implement
giveup_altivec on book3e CPUs, similar to flush_altivec_to_thread.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/switch_to.h
-i 100
completes 5.2% faster on a POWER7 PS700.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/process.c
===
--- linux-build.orig/arch/powerpc/kernel/process.c 2012-04-16
11:35:19.0 +1000
Hi,
> Thanks for the information. I'll try to reproduce the issue on
> Firebird-L today. By the way, it seems that "mstmread" is some
> user-level application accessing the config space while the problem
> happened?
The EEH error is caused by the Melanox firmware tools.
> It seems the crash was
Hi Gavin,
> The problem was reported by Anton Blanchard. While EEH error
> happened to the PCI device without the corresponding device
> driver, kernel crash was seen. Eventually, I successfully
> reproduced the problem on Firebird-L machine with utility
> "errinjct". Ini
-off-by: Anton Blanchard
---
4.0 came out in 2005 and the gcc on RHEL5 and SLES10 looks to be 4.1.
I highly doubt a ppc64 kernel will build these days on either RHEL4 or
SLES9.
Anything else we have to worry about?
Index: linux-build/arch/powerpc/Makefile
Now we require gcc 4.0 on 64-bit we can remove the pre gcc 4.0
-maltivec workaround.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/Makefile
===
--- linux-build.orig/arch/powerpc/Makefile 2012-04-18 07:49
Add a menu to select various 64-bit CPU targets for gcc. We
default to -mtune=power7 and if gcc doesn't understand that we
fallback to -mtune=power4.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/Mak
option just do it at runtime via
a feature fixup.
I had to expose CPU_FTR_PPCAS_ARCH_V2 to assembly since I key off
that.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/configs/g5_defconfig
===
--- linux
: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/eeh.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/eeh.c 2012-04-13
10:29:53.576534339 +1000
+++ linux-build/arch/powerpc/platforms/pseries/eeh.c
calls so
lets remove them.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/ptrace.h
===
--- linux-build.orig/arch/powerpc/include/asm/ptrace.h 2012-04-12
11:36:25.784215556 +1000
+++ linux-build/arc
Hi Ben,
> So if I remember properly, this means you key off if both
> CPU_FTR_NOEXECUTE and CPU_FTR_NODISRALIGN are clear... is
> there a point ? You make the patch simpler by only keying
> on NO_EXECUTE which afaik is a power4 or later only feature no ?
Was going to do that, but noticed ARCH_V2
option just do it at runtime via
a feature fixup.
Signed-off-by: Anton Blanchard
---
v2: Use CPU_FTR_NOEXECUTE to select the newer mtocrf
Index: linux-build/arch/powerpc/configs/g5_defconfig
===
--- linux-build.orig/arch/powerpc
abled:
stdx 3,11,9
lwz 0,8(29)
cmpwi 7,0,0
bne- 7,.L124
bl .irq_enter
CONFIG_JUMP_LABEL enabled:
stdx 3,11,9
nop
bl .irq_enter
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/configs/ppc64_defc
16 2890370e7 arch/powerpc/kernel/irq.o
6817 19019 16 2585264fc arch/powerpc/kernel/irq.o
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/trace.h
===
--- linux-build.orig/arch
=1
1048576 bytes (10 GB) copied, 3.72379 s, 2.8 GB/s
After:
# time dd if=/dev/zero of=/dev/null bs=1M count=1
1048576 bytes (10 GB) copied, 0.728318 s, 14.4 GB/s
Over 5x faster.
Signed-off-by: Anton Blanchard
---
Interestingly, it picked up an issue with the old clear_user which
lly:
http://ozlabs.org/~anton/junkcode/copy_to_user.c
# time ./copy_to_user2 -l 4224 -i 1000
before: 6.807 s
after: 6.946 s
A 2% slowdown, which seems reasonable considering our data is unlikely
to be completely L1 contained.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/p
disabled this patch improves the
null system call by 7%.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/entry_64.S
===
--- linux-build.orig/arch/powerpc/kernel/entry_64.S 2012-05-28
18:23:33.374451416
g it all
in one go.
This does complicate things a bit - we have to be careful to restore
RI if we branch out before returning to userspace.
On a POWER7 with virtual cputime disabled this patch improves the
null system call by 7%.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc
Subsequent patches will add more VMX library functions and it makes
sense to keep all the c-code helper functions in the one file.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/lib/Makefile
===
--- linux
following microbenchmark was used to assess the impact of
the patch:
http://ozlabs.org/~anton/junkcode/page_fault_file.c
We test MAP_PRIVATE page faults across a 1GB file, 100 times:
# time ./page_fault_file -p -l 1G -i 100
Before: 22.25s
After: 18.89s
17% faster
Signed-off-by: Anton Blanchard
lly:
http://ozlabs.org/~anton/junkcode/copy_to_user.c
# time ./copy_to_user2 -l 4224 -i 1000
before: 6.807 s
after: 6.946 s
A 2% slowdown, which seems reasonable considering our data is unlikely
to be completely L1 contained.
Signed-off-by: Anton Blanchard
---
v2: Use cr1 in the compar
(booting with brd.rd_size=1048576):
# mdadm -CR -e 1.2 /dev/md0 --level=6 -n4 /dev/ram[0-3]
I then timed how long it took to write to the entire array:
# dd if=/dev/zero of=/dev/md0 bs=1M
Before: 892 MB/s
After: 999 MB/s
A 12% improvement.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch
commit e57f93cc53b7 (powerpc: get rid of nlink_t uses, switch to
explicitly-sized type) changed the size of st_nlink on ppc64 from
a long to a short, resulting in boot failures.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/include/asm/stat.h
Hi Stephen,
> > commit e57f93cc53b7 (powerpc: get rid of nlink_t uses, switch to
> > explicitly-sized type) changed the size of st_nlink on ppc64 from
> > a long to a short, resulting in boot failures.
> >
> > Signed-off-by: Anton Blanchard
>
> Would t
quota allows it.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/msi.c
===
--- linux-build.orig/arch/powerpc/platforms/pseries/msi.c 2012-06-03
20:49:29.082280031 +1000
+++ linux
ut 4 seconds
> (or longer, depending on timebase frequency). I saw these pauses as
> a consequence of getting a stray hypervisor decrementer interrupt
> left over from exiting a KVM guest.
Urgh, sorry for that mess.
Acked-by: Anton Blanchard
Anton
> This isn't quite a straight rev
tce_buildmulti_pSeriesLP uses a per cpu page to communicate with the
hypervisor. We currently rely on the IOMMU table spinlock but
subsequent patches will be removing that so disable interrupts
around all accesses of tce_page.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc
iommu_free.
Some performance numbers were obtained with a Chelsio T3 adapter on
two POWER7 boxes, running a 100 session TCP round robin test.
Performance improved 32% with this patch applied.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/iommu.c
This patch moves tce_free outside of the lock in iommu_free.
Some performance numbers were obtained with a Chelsio T3 adapter on
two POWER7 boxes, running a 100 session TCP round robin test.
Performance improved 25% with this patch applied.
Signed-off-by: Anton Blanchard
---
Index: linux
In preparation for IOMMU pools, push the spinlock into
iommu_range_alloc and __iommu_free.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/kernel/iommu.c
===
--- linux-build.orig/arch/powerpc/kernel/iommu.c
improved 69% with this patch applied.
Signed-off-by: Anton Blanchard
---
All patches combined improve performance by 178%
Index: linux-build/arch/powerpc/kernel/iommu.c
===
--- linux-build.orig/arch/powerpc/kernel/iommu.c2012
gets
the destination 128 byte aligned then uses dcbz on whole cachelines.
Before:
1048576 bytes (10 GB) copied, 0.414744 s, 25.3 GB/s
After:
1048576 bytes (10 GB) copied, 0.268597 s, 39.0 GB/s
39 GB/s, a new record.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc
gets
the destination cacheline aligned then uses dcbz on whole cachelines.
Before:
1048576 bytes (10 GB) copied, 0.414744 s, 25.3 GB/s
After:
1048576 bytes (10 GB) copied, 0.268597 s, 39.0 GB/s
39 GB/s, a new record.
Signed-off-by: Anton Blanchard
---
v2: handle any cacheline size
uest to the next power of two
if the quota allows it. If this fails we fall back to using the
original request size.
Signed-off-by: Anton Blanchard
---
Index: linux-build/arch/powerpc/platforms/pseries/msi.c
===
--- linux-bui
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