[PowerPC] [PASEMI] Issue with the identification of ATA drives after the of/irq updates 2024-05-29

2024-06-30 Thread Christian Zigotzky
Hello, There is an issue with the identification of ATA drives with our P.A. Semi Nemo boards [1] after the commit "of/irq: Factor out parsing of interrupt-map parent phandle+args from of_irq_parse_raw()" [2]. Error messages: ata2.00: failed to IDENTIFY (I/O error, err_mask=0x4) ata2.00: qc

Re: [V4 05/16] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc

2024-06-30 Thread Athira Rajeev
> On 27 Jun 2024, at 2:47 AM, Namhyung Kim wrote: > > Hello, > > On Wed, Jun 26, 2024 at 09:38:28AM +0530, Athira Rajeev wrote: >> >> >>> On 26 Jun 2024, at 12:15 AM, Namhyung Kim wrote: >>> >>> On Tue, Jun 25, 2024 at 06:12:51PM +0530, Athira Rajeev wrote: > On 25 Jun 202

[PATCH AUTOSEL 6.9 08/20] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

[PATCH AUTOSEL 6.6 04/12] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

[PATCH AUTOSEL 6.1 2/5] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

[PATCH AUTOSEL 5.15 2/5] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

[PATCH AUTOSEL 5.10 2/4] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

[PATCH AUTOSEL 5.4 2/4] KVM: PPC: Book3S HV: Prevent UAF in kvm_spapr_tce_attach_iommu_group()

2024-06-30 Thread Sasha Levin
From: Michael Ellerman [ Upstream commit a986fa57fd81a1430e00b3c6cf8a325d6f894a63 ] Al reported a possible use-after-free (UAF) in kvm_spapr_tce_attach_iommu_group(). It looks up `stt` from tablefd, but then continues to use it after doing fdput() on the returned fd. After the fdput() the tabl

Re: [PATCH 2/2] ASoC: fsl_rpmsg: Add support for i.MX95 platform

2024-06-30 Thread Shengjiu Wang
On Wed, Jun 26, 2024 at 3:12 PM Chancel Liu wrote: > > Add compatible string and specific soc data to support rpmsg sound card > on i.MX95 platform. > > Signed-off-by: Chancel Liu Acked-by: Shengjiu Wang Best regards Shengjiu Wang > --- > sound/soc/fsl/fsl_rpmsg.c | 9 + > 1 file chan

Re: [PATCH] powerpc/pseries: Fix scv instruction crash with kexec

2024-06-30 Thread Sourabh Jain
On 26/06/24 15:10, Gautam Menghani wrote: Without this patch, we had an issue where if we have some cpus disabled in the system and we try to do a 2 stage kexec as follows: kexec -l vmlinux kexec -e we would hit the following Oops [ 2598.923098] kernel BUG at arch/powerpc/kernel/except

Re: [PATCH 00/13] fs/dax: Fix FS DAX page reference counts

2024-06-30 Thread Dave Chinner
On Thu, Jun 27, 2024 at 10:54:15AM +1000, Alistair Popple wrote: > FS DAX pages have always maintained their own page reference counts > without following the normal rules for page reference counting. In > particular pages are considered free when the refcount hits one rather > than zero and refcou

[PATCH V5 00/17] Add data type profiling support for powerpc

2024-06-30 Thread Athira Rajeev
The patchset from Namhyung added support for data type profiling in perf tool. This enabled support to associate PMU samples to data types they refer using DWARF debug information. With the upstream perf, currently it possible to run perf report or perf annotate to view the data type information on

[PATCH V5 01/17] tools/perf: Move the data structures related to register type to header file

2024-06-30 Thread Athira Rajeev
Data type profiling uses instruction tracking by checking each instruction and updating the register type state in some data structures. This is useful to find the data type in cases when the register state gets transferred from one reg to another. Example, in x86, "mov" instruction and in powerpc,

[PATCH V5 02/17] tools/perf: Add "update_insn_state" callback function to handle arch specific instruction tracking

2024-06-30 Thread Athira Rajeev
Add "update_insn_state" callback to "struct arch" to handle instruction tracking. Currently updating instruction state is handled by static function "update_insn_state_x86" which is defined in "annotate-data.c". Make this as a callback for specific arch and move to archs specific file "arch/x86/ann

[PATCH V5 03/17] tools/perf: Update TYPE_STATE_MAX_REGS to include max of regs in powerpc

2024-06-30 Thread Athira Rajeev
Add TYPE_STATE_MAX_REGS_X86 and TYPE_STATE_MAX_REGS_PPC. Define TYPE_STATE_MAX_REGS to be 32 which is max size of the array. While checking if reg is valid using has_reg_type, use the max value depending on the architecture. For x86, use TYPE_STATE_MAX_REGS_X86 since max number of regs is 16. Updat

[PATCH V5 04/17] tools/perf: Add disasm_line__parse to parse raw instruction for powerpc

2024-06-30 Thread Athira Rajeev
Currently, the perf tool infrastructure disasm_line__parse function to parse disassembled line. Example snippet from objdump: objdump --start-address= --stop-address= -d --no-show-raw-insn -C c10224b4: lwz r10,0(r9) This line "lwz r10,0(r9)" is parsed to extract instruction

[PATCH V5 05/17] tools/perf: Add support to capture and parse raw instruction in powerpc using dso__data_read_offset utility

2024-06-30 Thread Athira Rajeev
Add support to capture and parse raw instruction in powerpc. Currently, the perf tool infrastructure uses two ways to disassemble and understand the instruction. One is objdump and other option is via libcapstone. Currently, the perf tool infrastructure uses "--no-show-raw-insn" option with "objdu

[PATCH V5 06/17] tools/perf: Update parameters for reg extract functions to use raw instruction on powerpc

2024-06-30 Thread Athira Rajeev
Use the raw instruction code and macros to identify memory instructions, extract register fields and also offset. The implementation addresses the D-form, X-form, DS-form instructions. Adds "mem_ref" field to check whether source/target has memory reference. Add function "get_powerpc_regs" which wi

[PATCH V5 07/17] tools/perf: Add parse function for memory instructions in powerpc

2024-06-30 Thread Athira Rajeev
Use the raw instruction code and macros to identify memory instructions, extract register fields and also offset. The implementation addresses the D-form, X-form, DS-form instructions. Two main functions are added. New parse function "load_store__parse" as instruction ops parser for memory instruct

[PATCH V5 08/17] tools/perf: Add support to identify memory instructions of opcode 31 in powerpc

2024-06-30 Thread Athira Rajeev
There are memory instructions in powerpc with opcode as 31. Example: "ldx RT,RA,RB" , Its X form is as below: __ | 31 | RT | RA | RB | 21 |/| -- 06 111621 30 31 The opcode for "ldx" i

[PATCH V5 09/17] tools/perf: Add some of the arithmetic instructions to support instruction tracking in powerpc

2024-06-30 Thread Athira Rajeev
Data type profiling has concept of instruction tracking. Example sequence in powerpc: ld r10,264(r3) mr r31,r3 < ld r9,312(r31) or differently lwz r10,264(r3) add r31, r3, RB lwz r9, 0(r31) If a sample is hit at

[PATCH V5 10/17] tools/perf: Add more instructions for instruction tracking

2024-06-30 Thread Athira Rajeev
Add few more instructions and use opcode as search key to find if it is supported by the architecture. Added ones are: addi, addic, addic., addis, subfic and mulli Signed-off-by: Athira Rajeev --- tools/perf/arch/powerpc/annotate/instructions.c | 14 ++ 1 file changed, 14 insertions(

[PATCH V5 11/17] tools/perf: Update instruction tracking for powerpc

2024-06-30 Thread Athira Rajeev
Add instruction tracking function "update_insn_state_powerpc" for powerpc. Example sequence in powerpc: ld r10,264(r3) mr r31,r3 < ld r9,312(r31) Consider ithe sample is pointing to: "ld r9,312(r31)". Here the memory reference is hit at "312(r31)" where 312 is the offset and r31 is

[PATCH V5 12/17] tools/perf: Make capstone_init non-static so that it can be used during symbol disassemble

2024-06-30 Thread Athira Rajeev
symbol__disassemble_capstone in util/disasm.c calls function open_capstone_handle to open/init the capstone. We already have a capstone_init function in "util/print_insn.c". But capstone_init is defined as a static function in util/print_insn.c. Change this and also add the function in print_insn.h

[PATCH V5 13/17] tools/perf: Use capstone_init and remove open_capstone_handle from disasm.c

2024-06-30 Thread Athira Rajeev
capstone_init is made availbale for all archs to use and updated to enable support for CS_ARCH_PPC as well. Patch removes open_capstone_handle and uses capstone_init in all the places. Signed-off-by: Athira Rajeev --- tools/perf/util/disasm.c | 42 +++- tools/p

[PATCH V5 14/17] tools/perf: Add support to use libcapstone in powerpc

2024-06-30 Thread Athira Rajeev
Now perf uses the capstone library to disassemble the instructions in x86. capstone is used (if available) for perf annotate to speed up. Currently it only supports x86 architecture. Patch includes changes to enable this in powerpc. For now, only for data type sort keys, this method is used and onl

[PATCH V5 15/17] tools/perf: Add support to find global register variables using find_data_type_global_reg

2024-06-30 Thread Athira Rajeev
There are cases where define a global register variable and associate it with a specified register. Example, in powerpc, two registers are defined to represent variable: 1. r13: represents local_paca register struct paca_struct *local_paca asm("r13"); 2. r1: represents stack_pointer register void

[PATCH V5 16/17] tools/perf: Add support for global_die to capture name of variable in case of register defined variable

2024-06-30 Thread Athira Rajeev
In case of register defined variable (found using find_data_type_global_reg), if the type of variable happens to be base type (example, long unsigned int), perf report captures it as: 12.85% long unsigned int long unsigned int +0 (no field) The above data type is actually referring to sampl

[PATCH V5 17/17] tools/perf: Set instruction name to be used with insn-stat when using raw instruction

2024-06-30 Thread Athira Rajeev
Since the "ins.name" is not set while using raw instruction, perf annotate with insn-stat gives wrong data: Result from "./perf annotate --data-type --insn-stat": Annotate Instruction stats total 615, ok 419 (68.1%), bad 196 (31.9%) Name : Good Bad -

Re: [PATCH 0/2] Skip offline cores when enabling SMT on PowerPC

2024-06-30 Thread Shrikanth Hegde
On 6/25/24 2:54 AM, Thomas Gleixner wrote: > On Tue, Jun 25 2024 at 00:41, Shrikanth Hegde wrote: >> On 6/24/24 1:44 AM, Thomas Gleixner wrote: >>> Right. So changing it not to online a thread when the full core is >>> offline should not really break stuff. >>> >>> OTH, the mechanism to figure t