On Mon, Jun 03, 2024 at 03:42:22PM GMT, Nicholas Piggin wrote:
> On Wed May 22, 2024 at 6:49 PM AEST, Gautam Menghani wrote:
> > Doorbell emulation is broken for KVM on PowerVM guests as support for
> > DPDES was not added in the initial patch series. Due to this, a KVM on
> > PowerVM guest cannot
On Mon Jun 3, 2024 at 5:09 PM AEST, Gautam Menghani wrote:
> On Mon, Jun 03, 2024 at 03:42:22PM GMT, Nicholas Piggin wrote:
> > On Wed May 22, 2024 at 6:49 PM AEST, Gautam Menghani wrote:
> > > Doorbell emulation is broken for KVM on PowerVM guests as support for
> > > DPDES was not added in the in
Hi Nathan,
On 4/23/24 5:58 AM, Nathan Chancellor wrote:
Hi Sathvika,
On Mon, Apr 22, 2024 at 02:52:06PM +0530, Sathvika Vasireddy wrote:
Implement build-time fixup of alternate feature relative addresses for
the out-of-line (else) patch code. Initial posting to achieve the same
using another t
On 5/31/24 22:09, Mark Brown wrote:
On Tue, May 28, 2024 at 12:26:54PM +0530, Amit Daniel Kachhap wrote:
On 5/3/24 18:31, Joey Gouly wrote:
+#define POE_MAGIC 0x504f4530
+struct poe_context {
+ struct _aarch64_ctx head;
+ __u64 por_el0;
+};
There is a comment section
On 04/05/2024 14.28, Nicholas Piggin wrote:
The exception stack setup does not work correctly for SMP, because
it is the boot processor that calls cpu_set() which sets SPRG2 to
the exception stack, not the target CPU itself. So secondaries
never got their SPRG2 set to a valid exception stack.
S
On 04/05/2024 14.28, Nicholas Piggin wrote:
These will be used for stack allocation for secondary CPUs.
Signed-off-by: Nicholas Piggin
---
lib/powerpc/setup.c | 8
powerpc/Makefile.common | 1 +
2 files changed, 9 insertions(+)
Reviewed-by: Thomas Huth
The series fixes the issues exposed by the kvm-unit-tests[1]
sprs-migration test.
The SDAR, MMCR3 were seen to have some typo/refactoring bugs.
The first two patches fix them.
Though the nestedv2 APIs defined the guest state elements for
Power ISA 3.1B SPRs to save-restore with PHYP during entry-
The kvmppc_set_one_reg_hv() wrongly get() the value
instead of set() for MMCR3. Fix the same.
Fixes: 5752fe0b811b ("KVM: PPC: Book3S HV: Save/restore new PMU registers")
Signed-off-by: Shivaprasad G Bhat
Reviewed-by: Nicholas Piggin
---
arch/powerpc/kvm/book3s_hv.c |2 +-
1 file changed, 1
The kvmppc_get_one_reg_hv() for SDAR is wrongly getting the SIAR
instead of SDAR, possibly a paste error emanating from the previous
refactoring.
Patch fixes the wrong get_one_reg() for the same.
Fixes: ebc88ea7a6ad ("KVM: PPC: Book3S HV: Use accessors for VCPU registers")
Signed-off-by: Shivapra
The nestedv2 APIs has the guest state element defined for DEXCR
for the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the DEXCR GSID.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/book3s_hv.h
The patch adds a one-reg register identifier which can be used to
read and set the DEXCR for the guest during enter/exit with
KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
---
Documentation/virt/kvm/api.rst|1 +
arch/powe
The nestedv2 APIs has the guest state element defined for HASHKEYR for
the save-restore with L0. However, its ignored in the code.
The patch takes care of this for the HASHKEYR GSID.
Signed-off-by: Shivaprasad G Bhat
---
arch/powerpc/include/asm/kvm_host.h |1 +
arch/powerpc/kvm/book3s_hv
The patch adds a one-reg register identifier which can be used to
read and set the virtual HASHKEYR for the guest during enter/exit
with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
too updated.
Signed-off-by: Shivaprasad G Bhat
---
Documentation/virt/kvm/api.rst|
Hi Yunhui,
On Mon, Jun 3, 2024 at 4:26 AM yunhui cui wrote:
>
> Hi Alexandre,
>
> On Thu, Feb 1, 2024 at 12:03 AM Alexandre Ghiti
> wrote:
> >
> > In 6.5, we removed the vmalloc fault path because that can't work (see
> > [1] [2]). Then in order to make sure that new page table entries were
> >
// We can now add the CPU name & PVR to the hardware description
- seq_buf_printf(&ppc_hw_desc, "%s 0x%04lx ", cur_cpu_spec->cpu_name,
mfspr(SPRN_PVR));
-
/* Retrieve CPU related informations from the flat tree
* (altivec support, boot CPU ID, ...)
/arch/powerpc/crypto/.gitignore
@@ -1,3 +1,5 @@
# SPDX-License-Identifier: GPL-2.0-only
aesp10-ppc.S
+aesp8-ppc.S
ghashp10-ppc.S
+ghashp8-ppc.S
---
base-commit: be2fc65d66e0406cc9d39d40becaecdf4ee765f3
change-id: 20240603-powerpc-crypto-ignore-p8-asm-4d9f59da003e
Best regards,
--
Nathan Lynch
On Wed, 29 May 2024 16:40:01 +0800, Shengjiu Wang wrote:
> Add compatible string "fsl,imx95-xcvr" for i.MX95 platform.
>
> The difference between each platform is in below table.
>
> +-++--++
> | SOC | PHY | eARC/ARC | SPDIF |
> +-++
On Fri, May 31, 2024 at 11:10 PM Athira Rajeev
wrote:
>
> Now perf uses the capstone library to disassemble the instructions in
> x86. capstone is used (if available) for perf annotate to speed up.
> Currently it only supports x86 architecture. Patch includes changes to
> enable this in powerpc. F
On 3/06/24 19:30, Ian Rogers wrote:
> On Fri, May 31, 2024 at 11:10 PM Athira Rajeev
> wrote:
>>
>> Now perf uses the capstone library to disassemble the instructions in
>> x86. capstone is used (if available) for perf annotate to speed up.
>> Currently it only supports x86 architecture. Patch inc
ic-reconfiguration-memory");
- if (!dn) {
- pr_info("No dynamic reconfiguration memory found\n");
+ if (!dn)
return 0;
- }
if (init_drmem_lmb_size(dn)) {
of_node_put(dn);
---
base-commit: be2fc65d66e0406cc9d39d40beca
On Sun, 2 Jun 2024 20:03:32 +0200
Erhard Furtner wrote:
> On Sat, 1 Jun 2024 00:01:48 -0600
> Yu Zhao wrote:
>
> > The OOM kills on both kernel versions seem to be reasonable to me.
> >
> > Your system has 2GB memory and it uses zswap with zsmalloc (which is
> > good since it can allocate from
On 27/03/2024 17:03, Allen Pais wrote:
EXTERNAL EMAIL: Do not click links or open attachments unless you know the
content is safe
The only generic interface to execute asynchronously in the BH context is
tasklet; however, it's marked deprecated and has some design flaws. To
replace tasklets, BH
> On Jun 3, 2024, at 5:38 AM, Aubin Constans
> wrote:
>
> On 27/03/2024 17:03, Allen Pais wrote:
>> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
>> content is safe
>> The only generic interface to execute asynchronously in the BH context is
>> tasklet; however,
Make two APIs look similar. Hence convert match_string() to be
a 2-argument macro. In order to avoid unneeded churn, convert
all users as well. There is no functional change intended.
Signed-off-by: Andy Shevchenko
---
Compile tested with `make allyesconfig` and `make allmodconfig`
on x86_64, ar
On Sun, Jun 02, 2024 at 06:57:12PM +0300, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
Looks nice, thanks for doing this.
> diff
On Thu, May 30, 2024 at 11:06 PM Yu Zhao wrote:
>
> On Wed, May 29, 2024 at 7:08 PM James Houghton wrote:
> >
> > Hi Yu, Sean,
> >
> > Perhaps I "simplified" this bit of the series a little bit too much.
> > Being able to opportunistically do aging with KVM (even without
> > setting the Kconfig)
On Mon, Jun 03, 2024, James Houghton wrote:
> On Thu, May 30, 2024 at 11:06 PM Yu Zhao wrote:
> > What I don't think is acceptable is simplifying those optimizations
> > out without documenting your justifications (I would even call it a
> > design change, rather than simplification, from v3 to v4
On Mon, Jun 3, 2024 at 4:03 PM Sean Christopherson wrote:
>
> On Mon, Jun 03, 2024, James Houghton wrote:
> > On Thu, May 30, 2024 at 11:06 PM Yu Zhao wrote:
> > > What I don't think is acceptable is simplifying those optimizations
> > > out without documenting your justifications (I would even c
On Mon, Jun 3, 2024 at 3:13 PM Erhard Furtner wrote:
>
> On Sun, 2 Jun 2024 20:03:32 +0200
> Erhard Furtner wrote:
>
> > On Sat, 1 Jun 2024 00:01:48 -0600
> > Yu Zhao wrote:
> >
> > > The OOM kills on both kernel versions seem to be reasonable to me.
> > >
> > > Your system has 2GB memory and it
On Mon, Jun 03, 2024, James Houghton wrote:
> On Mon, Jun 3, 2024 at 4:03 PM Sean Christopherson wrote:
> > But before we do that, I think we need to perform due dilegence (or provide
> > data)
> > showing that having KVM take mmu_lock for write in the "fast only" API
> > provides
> > better tot
On 6/3/24 00:57, Andy Shevchenko wrote:
> Make two APIs look similar. Hence convert match_string() to be
> a 2-argument macro. In order to avoid unneeded churn, convert
> all users as well. There is no functional change intended.
>
> Signed-off-by: Andy Shevchenko
> ---
[...]
> diff --git a/dri
在 2024/6/2 23:57, Andy Shevchenko 写道:
Make two APIs look similar. Hence convert match_string() to be
a 2-argument macro. In order to avoid unneeded churn, convert
all users as well. There is no functional change intended.
Signed-off-by: Andy Shevchenko
---
Compile tested with `make allyesconfi
On Mon Jun 3, 2024 at 7:30 PM AEST, Thomas Huth wrote:
> On 04/05/2024 14.28, Nicholas Piggin wrote:
> > The exception stack setup does not work correctly for SMP, because
> > it is the boot processor that calls cpu_set() which sets SPRG2 to
> > the exception stack, not the target CPU itself. So se
On 04/05/2024 14.28, Nicholas Piggin wrote:
powerpc SMP support is very primitive and does not set up a first-class
runtime environment for secondary CPUs.
This reworks SMP support, and provides a complete C and harness
environment for the secondaries, including interrupt handling, as well
as IP
On 04/05/2024 14.28, Nicholas Piggin wrote:
Modify run script to permit single vs mttcg threading, add a
thread=single smp case to unittests.cfg.
Signed-off-by: Nicholas Piggin
---
powerpc/run | 4 ++--
powerpc/unittests.cfg | 6 ++
2 files changed, 8 insertions(+), 2 deletion
On 04/05/2024 14.28, Nicholas Piggin wrote:
The test harness uses spinlocks if they are implemented with larx/stcx.
it can prevent some test scenarios such as testing migration of a
reservation.
I'm having a hard time to understand that patch description. Maybe you could
rephrase it / elaborat
On 04/05/2024 14.28, Nicholas Piggin wrote:
Signed-off-by: Nicholas Piggin
---
Please provide at least a short patch description about what is being tested
here!
Thanks,
Thomas
On Mon Jun 3, 2024 at 9:14 PM AEST, Shivaprasad G Bhat wrote:
> The patch adds a one-reg register identifier which can be used to
> read and set the DEXCR for the guest during enter/exit with
> KVM_REG_PPC_DEXCR. The specific SPR KVM API documentation
> too updated.
I wonder if the uapi and docume
On Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote:
> The patch adds a one-reg register identifier which can be used to
> read and set the virtual HASHKEYR for the guest during enter/exit
> with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
> too updated.
Reviewed-by: Nich
On Mon Jun 3, 2024 at 9:14 PM AEST, Shivaprasad G Bhat wrote:
> The nestedv2 APIs has the guest state element defined for DEXCR
> for the save-restore with L0. However, its ignored in the code.
>
> The patch takes care of this for the DEXCR GSID.
>
> Signed-off-by: Shivaprasad G Bhat
> ---
> arch
On Mon Jun 3, 2024 at 9:14 PM AEST, Shivaprasad G Bhat wrote:
> The nestedv2 APIs has the guest state element defined for HASHKEYR for
> the save-restore with L0. However, its ignored in the code.
>
> The patch takes care of this for the HASHKEYR GSID.
>
> Signed-off-by: Shivaprasad G Bhat
> ---
>
On Mon Jun 3, 2024 at 9:13 PM AEST, Shivaprasad G Bhat wrote:
> The series fixes the issues exposed by the kvm-unit-tests[1]
> sprs-migration test.
>
> The SDAR, MMCR3 were seen to have some typo/refactoring bugs.
> The first two patches fix them.
>
> Though the nestedv2 APIs defined the guest stat
On Mon Jun 3, 2024 at 9:15 PM AEST, Shivaprasad G Bhat wrote:
> The patch adds a one-reg register identifier which can be used to
> read and set the virtual HASHKEYR for the guest during enter/exit
> with KVM_REG_PPC_HASHKEYR. The specific SPR KVM API documentation
> too updated.
>
> Signed-off-by:
On 04/05/2024 14.28, Nicholas Piggin wrote:
This has a known failure on QEMU TCG machines where the decrementer
interrupt is not lowered when the DEC wraps from -ve to +ve.
Would it then make sense to mark the test with accel = kvm to avoid the test
failure when running with TCG?
diff --git
Hi Alexandre,
On Mon, Jun 3, 2024 at 8:02 PM Alexandre Ghiti wrote:
>
> Hi Yunhui,
>
> On Mon, Jun 3, 2024 at 4:26 AM yunhui cui wrote:
> >
> > Hi Alexandre,
> >
> > On Thu, Feb 1, 2024 at 12:03 AM Alexandre Ghiti
> > wrote:
> > >
> > > In 6.5, we removed the vmalloc fault path because that ca
45 matches
Mail list logo
