Re: [PATCH v2 01/13] mm/Kconfig: CONFIG_PGTABLE_HAS_HUGE_LEAVES

2024-01-22 Thread Peter Xu
On Mon, Jan 15, 2024 at 01:37:37PM -0400, Jason Gunthorpe wrote: > On Wed, Jan 03, 2024 at 05:14:11PM +0800, pet...@redhat.com wrote: > > From: Peter Xu > > > > Introduce a config option that will be selected as long as huge leaves are > > involved in pgtable (thp or hugetlbfs). It would be usef

Re: [PATCH] NUMA: Early use of cpu_to_node() returns 0 instead of the correct node id

2024-01-22 Thread Shijie Huang
在 2024/1/22 15:41, Mike Rapoport 写道: On Fri, Jan 19, 2024 at 04:50:53PM +0800, Shijie Huang wrote: 在 2024/1/19 16:42, Mike Rapoport 写道: Is there a fundamental reason to have early_cpu_to_node() at all? The early_cpu_to_node does not work on some ARCHs (which support the NUMA), such as SPARC

Re: [PATCH 1/1] PCI/DPC: Fix TLP Prefix register reading offset

2024-01-22 Thread Ilpo Järvinen
On Fri, 19 Jan 2024, Bjorn Helgaas wrote: > On Thu, Jan 18, 2024 at 01:08:15PM +0200, Ilpo Järvinen wrote: > > The TLP Prefix Log Register consists of multiple DWORDs (PCIe r6.1 sec > > 7.9.14.13) but the loop in dpc_process_rp_pio_error() keeps reading > > from the first DWORD. Add the iteration

Re: [RFC PATCH 2/3] fs: remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
On 1/22/24 6:20 PM, Chandan Babu R wrote: > On Thu, Jan 18, 2024 at 01:33:25 PM +0530, Shrikanth Hegde wrote: >> when a ifdef is used in the below manner, second one could be considered as >> duplicate. >> >> ifdef DEFINE_A >> ...code block... >> ifdef DEFINE_A >> ...code block... >> endif >> ..

[RFC PATCH v2 1/4] sched: remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
when a ifdef is used in the below manner, second one could be considered as duplicate. ifdef DEFINE_A ...code block... ifdef DEFINE_A ...code block... endif ...code block... endif In the scheduler code, there are two places where above pattern can be observed. Hence second ifdef is a duplicate an

[RFC PATCH v2 0/4] remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
When going through the code observed a case in scheduler, where #ifdef CONFIG_SMP was used to inside an #ifdef CONFIG_SMP. That didn't make sense since first one is good enough and second one is a duplicate. This could improve code readability. No functional change is intended. Since this might b

[RFC PATCH v2 2/4] xfs: remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
when a ifdef is used in the below manner, second one could be considered as duplicate. ifdef DEFINE_A ...code block... ifdef DEFINE_A ...code block... endif ...code block... endif In the xfs code two such patterns were seen. Hence removing these ifdefs. No functional change is intended here. It o

[RFC PATCH v2 3/4] ntfs: remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
when a ifdef is used in the below manner, second one could be considered as duplicate. ifdef DEFINE_A ...code block... ifdef DEFINE_A ...code block... endif ...code block... endif In the ntfs code, one such pattern was seen. Hence remove that duplicate ifdef. No functional change is intended here

[RFC PATCH v2 4/4] arch/powerpc: remove duplicate ifdefs

2024-01-22 Thread Shrikanth Hegde
when a ifdef is used in the below manner, second one could be considered as duplicate. ifdef DEFINE_A ...code block... ifdef DEFINE_A ...code block... endif ...code block... endif few places in arch/powerpc where this pattern was seen. In addition to that in paca.h, CONFIG_PPC_BOOK3S_64 was defin

Re: [PATCH 1/1] PCI/DPC: Fix TLP Prefix register reading offset

2024-01-22 Thread Bjorn Helgaas
On Thu, Jan 18, 2024 at 01:08:15PM +0200, Ilpo Järvinen wrote: > The TLP Prefix Log Register consists of multiple DWORDs (PCIe r6.1 sec > 7.9.14.13) but the loop in dpc_process_rp_pio_error() keeps reading > from the first DWORD. Add the iteration count based offset calculation > into the config re

[PATCH v1 00/11] mm/memory: optimize fork() with PTE-mapped THP

2024-01-22 Thread David Hildenbrand
Now that the rmap overhaul[1] is upstream that provides a clean interface for rmap batching, let's implement PTE batching during fork when processing PTE-mapped THPs. This series is partially based on Ryan's previous work[2] to implement cont-pte support on arm64, but its a complete rewrite based

[PATCH v1 01/11] arm/pgtable: define PFN_PTE_SHIFT on arm and arm64

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/arm/include/asm/pgtable.h | 2 ++ arch/arm64/include/asm/pgtable.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/

[PATCH v1 02/11] nios2/pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/nios2/include/asm/pgtable.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/nios2/include/asm/pgtable.h b/arch/nios2/i

[PATCH v1 03/11] powerpc/pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/powerpc/include/asm/pgtable.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/po

[PATCH v1 04/11] risc: pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/riscv/include/asm/pgtable.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/i

[PATCH v1 05/11] s390/pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/s390/include/asm/pgtable.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/incl

[PATCH v1 06/11] sparc/pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/sparc/include/asm/pgtable_64.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/sparc/include/asm/pgtable_64.h b/arch/

[PATCH v1 07/11] mm/memory: factor out copying the actual PTE in copy_present_pte()

2024-01-22 Thread David Hildenbrand
Let's prepare for further changes. Signed-off-by: David Hildenbrand --- mm/memory.c | 60 - 1 file changed, 32 insertions(+), 28 deletions(-) diff --git a/mm/memory.c b/mm/memory.c index 7e1f4849463aa..2aa2051ee51d3 100644 --- a/mm/memory.c ++

[PATCH v1 08/11] mm/memory: pass PTE to copy_present_pte()

2024-01-22 Thread David Hildenbrand
We already read it, let's just forward it. This patch is based on work by Ryan Roberts. Signed-off-by: David Hildenbrand --- mm/memory.c | 7 +++ 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/mm/memory.c b/mm/memory.c index 2aa2051ee51d3..185b4aff13d62 100644 --- a/mm/memory

[PATCH v1 09/11] mm/memory: optimize fork() with PTE-mapped THP

2024-01-22 Thread David Hildenbrand
Let's implement PTE batching when consecutive (present) PTEs map consecutive pages of the same large folio, and all other PTE bits besides the PFNs are equal. We will optimize folio_pte_batch() separately, to ignore some other PTE bits. This patch is based on work by Ryan Roberts. Use __always_in

[PATCH v1 10/11] mm/memory: ignore dirty/accessed/soft-dirty bits in folio_pte_batch()

2024-01-22 Thread David Hildenbrand
Let's ignore these bits: they are irrelevant for fork, and will likely be irrelevant for upcoming users such as page unmapping. Signed-off-by: David Hildenbrand --- mm/memory.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/mm/memory.c b/mm/memory.c index f563aec8

[PATCH v1 11/11] mm/memory: ignore writable bit in folio_pte_batch()

2024-01-22 Thread David Hildenbrand
... and conditionally return to the caller if any pte except the first one is writable. fork() has to make sure to properly write-protect in case any PTE is writable. Other users (e.g., page unmaping) won't care. Signed-off-by: David Hildenbrand --- mm/memory.c | 26 +- 1

Re: [PATCH v1 04/11] risc: pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread Alexandre Ghiti
Hi David, On 22/01/2024 20:41, David Hildenbrand wrote: We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/riscv/include/asm/pgtable.h | 2 ++ 1 file changed, 2 insertions(+)

Re: [PATCH v1 04/11] risc: pgtable: define PFN_PTE_SHIFT

2024-01-22 Thread David Hildenbrand
On 22.01.24 21:03, Alexandre Ghiti wrote: Hi David, On 22/01/2024 20:41, David Hildenbrand wrote: We want to make use of pte_next_pfn() outside of set_ptes(). Let's simpliy define PFN_PTE_SHIFT, required by pte_next_pfn(). Signed-off-by: David Hildenbrand --- arch/riscv/include/asm/pgtable

Re: [PATCH v2 0/3] ASoC: Support SAI and MICFIL on i.MX95 platform

2024-01-22 Thread Mark Brown
On Fri, 12 Jan 2024 14:43:28 +0900, Chancel Liu wrote: > Support SAI and MICFIL on i.MX95 platform > > changes in v2 > - Remove unnecessary "item" in fsl,micfil.yaml > - Don't change alphabetical order in fsl,sai.yaml > > Chancel Liu (3): > ASoC: dt-bindings: fsl,sai: Add compatible string for

Re: [RFC PATCH] mm: z3fold: rename CONFIG_Z3FOLD to CONFIG_Z3FOLD_DEPRECATED

2024-01-22 Thread Yosry Ahmed
On Sun, Jan 21, 2024 at 11:42 PM Christoph Hellwig wrote: > > On Tue, Jan 16, 2024 at 12:19:39PM -0800, Yosry Ahmed wrote: > > Well, better compression ratios for one :) > > > > I think a long time ago there were complaints that zsmalloc had higher > > latency than zbud/z3fold, but since then a lo

Re: [RFC PATCH 2/3] fs: remove duplicate ifdefs

2024-01-22 Thread Chandan Babu R
On Thu, Jan 18, 2024 at 01:33:25 PM +0530, Shrikanth Hegde wrote: > when a ifdef is used in the below manner, second one could be considered as > duplicate. > > ifdef DEFINE_A > ...code block... > ifdef DEFINE_A > ...code block... > endif > ...code block... > endif > > There are few places in fs co

[PATCH v2] powerpc/pseries/iommu: DLPAR ADD of pci device doesn't completely initialize pci_controller structure

2024-01-22 Thread Gaurav Batra
When a PCI device is Dynamically added, LPAR OOPS with NULL pointer exception. Complete stack is as below [ 211.239206] BUG: Kernel NULL pointer dereference on read at 0x0030 [ 211.239210] Faulting instruction address: 0xc06bbe5c [ 211.239214] Oops: Kernel access of bad area, sig:

[PATCH 6.7 517/641] perf vendor events powerpc: Update datasource event name to fix duplicate events

2024-01-22 Thread Greg Kroah-Hartman
6.7-stable review patch. If anyone has any objections, please let me know. -- From: Athira Rajeev [ Upstream commit 9eef41014fe01287dae79fe208b9b433b13040bb ] Running "perf list" on powerpc fails with segfault as below: $ ./perf list Segmentation fault (core dumped)

[PATCH 60/82] powerpc: Refactor intentional wrap-around test

2024-01-22 Thread Kees Cook
In an effort to separate intentional arithmetic wrap-around from unexpected wrap-around, we need to refactor places that depend on this kind of math. One of the most common code patterns of this is: VAR + value < VAR Notably, this is considered "undefined behavior" for signed and pointer

[PING PATCH] powerpc/kasan: Fix addr error caused by page alignment

2024-01-22 Thread Jiangfeng Xiao
In kasan_init_region, when k_start is not page aligned, at the begin of for loop, k_cur = k_start & PAGE_MASK is less than k_start, and then va = block + k_cur - k_start is less than block, the addr va is invalid, because the memory address space from va to block is not alloced by memblock_alloc, w

[PATCH v2] NUMA: Early use of cpu_to_node() returns 0 instead of the correct node id

2024-01-22 Thread Huang Shijie
During the kernel booting, the generic cpu_to_node() is called too early in arm64, powerpc and riscv when CONFIG_NUMA is enabled. For arm64/powerpc/riscv, there are at least four places in the common code where the generic cpu_to_node() is called before it is initialized: 1.) early_trac

[PATCH 1/1] arch/arm/mm: fix major fault accounting when retrying under per-VMA lock

2024-01-22 Thread Suren Baghdasaryan
The change [1] missed ARM architecture when fixing major fault accounting for page fault retry under per-VMA lock. Add missing code to fix ARM architecture fault accounting. [1] 46e714c729c8 ("arch/mm/fault: fix major fault accounting when retrying under per-VMA lock") Fixes: 12214eba1992 ("mm:

Re: [PATCH 1/1] arch/mm/fault: fix major fault accounting when retrying under per-VMA lock

2024-01-22 Thread Suren Baghdasaryan
On Sun, Jan 21, 2024 at 11:38 PM Suren Baghdasaryan wrote: > > On Sat, Jan 20, 2024 at 1:15 PM Russell King (Oracle) > wrote: > > > > On Sat, Jan 20, 2024 at 09:09:47PM +, > > patchwork-bot+linux-ri...@kernel.org wrote: > > > Hello: > > > > > > This patch was applied to riscv/linux.git (fixe

Re: [PING PATCH] powerpc/kasan: Fix addr error caused by page alignment

2024-01-22 Thread Christophe Leroy
Le 23/01/2024 à 02:45, Jiangfeng Xiao a écrit : > [Vous ne recevez pas souvent de courriers de xiaojiangf...@huawei.com. > Découvrez pourquoi ceci est important à > https://aka.ms/LearnAboutSenderIdentification ] > > In kasan_init_region, when k_start is not page aligned, > at the begin of for

Re: [PATCH] KVM: PPC: Book3S HV: Fix L2 guest reboot failure due to empty 'arch_compat'

2024-01-22 Thread Gautam Menghani
On Thu, Jan 18, 2024 at 03:26:53PM +0530, Amit Machhiwal wrote: > Currently, rebooting a pseries nested qemu-kvm guest (L2) results in > below error as L1 qemu sends PVR value 'arch_compat' == 0 via > ppc_set_compat ioctl. This triggers a condition failure in > kvmppc_set_arch_compat() resulting in