Commit d49a0626216b95 ("arch: Introduce CONFIG_FUNCTION_ALIGNMENT")
introduced a generic function-alignment infrastructure. Move to using
FUNCTION_ALIGNMENT_4B on powerpc, to use the same alignment as that of the
existing _GLOBAL macro.
Signed-off-by: Sathvika Vasireddy
Note:
Given that alignmen
On 3/3/23 17:40, Arnd Bergmann wrote:
On Fri, Mar 3, 2023, at 12:59, Alexandre Ghiti wrote:
On 3/2/23 20:50, H. Peter Anvin wrote:
On March 1, 2023 7:17:18 PM PST, Palmer Dabbelt wrote:
Commit 622021cd6c560ce7 ("s390: make command line configurable"),
I assume?
Yes, sorry for that. I got d
This all came up in the context of increasing COMMAND_LINE_SIZE in the
RISC-V port. In theory that's a UABI break, as COMMAND_LINE_SIZE is the
maximum length of /proc/cmdline and userspace could staticly rely on
that to be correct.
Usually I wouldn't mess around with changing this sort of thing,
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
---
arch/alpha/include/asm/setup.h | 4 ++--
arch/alpha/include/u
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/setup.h | 3 ++-
arch/arm64/include/uapi/asm/set
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Russell King (Oracle)
---
arch/arm/include/asm/setup.h | 1 +
arch/arm/include/uapi/asm/
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/ia64/include/asm/setup.h | 10 ++
arch/ia64/include/uapi/asm/setup.h | 6 ++
2 f
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Geert Uytterhoeven
---
arch/m68k/include/asm/setup.h | 3 +--
arch/m68k/include/uapi/asm/se
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/microblaze/include/asm/setup.h | 2 +-
arch/microblaze/include/uapi/asm/setup.h | 2 --
2 fil
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
---
arch/mips/include/asm/setup.h | 3 ++-
arch/mips/include/uapi
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Helge Deller
---
arch/parisc/include/asm/setup.h | 7 +
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Michael Ellerman
---
arch/powerpc/include/asm/setup.h | 2 +-
arch/powerpc/include/uapi/asm
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/sparc/include/asm/setup.h | 6 +-
arch/sparc/include/uapi/asm/setup.h | 7 ---
2 file
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Max Filippov
---
arch/xtensa/include/asm/setup.h | 17 +
arch/xtensa/includ
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API.
Signed-off-by: Alexandre Ghiti
---
arch/riscv/include/asm/setup.h | 7 +++
arch/riscv/include/uapi/asm/setup.h | 2 --
2 files changed, 7 insertions(+), 2 deletions(-)
create mode 10
From: Palmer Dabbelt
As far as I can tell this is not used by userspace and thus should not
be part of the user-visible API. Since only
contains COMMAND_LINE_SIZE we can just move it out of uapi to hide the
definition and fix up the only direct use in Loongarch.
Signed-off-by: Palmer Dabbelt
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/alpha/include/uapi/asm/setup.h | 5 -
1 file changed, 5 deletions(-)
delete mode 100644 arch/alpha/include/uapi/asm/setup.h
diff --git a/arch/alpha/include/uapi/asm/setup.h
b/arch/alpha/include/ua
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
---
arch/arc/include/asm/setup.h | 1 -
arch/arc/include/uapi/asm/setup.h | 6 --
2 files changed, 7 deletions(-)
delete mode 100644 arch/arc/include/uapi/asm/setup.
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Geert Uytterhoeven
---
arch/m68k/include/uapi/asm/setup.h | 15 ---
1 file changed, 15 deletions(-)
delete mode 100644 arch/m68k/include/uapi/asm/setup.h
diff --git a/arch/m68k/include/ua
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/arm64/include/uapi/asm/setup.h | 25 -
1 file changed, 25 deletions(-)
delete mode 100644 arch/arm64/include/uapi/asm/setup.h
diff --git a/arch/arm64/include/uapi/asm/setup.h
b
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/microblaze/include/uapi/asm/setup.h | 18 --
1 file changed, 18 deletions(-)
delete mode 100644 arch/microblaze/include/uapi/asm/setup.h
diff --git a/arch/microblaze/include/uapi/asm/se
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/sparc/include/uapi/asm/setup.h | 9 -
1 file changed, 9 deletions(-)
delete mode 100644 arch/sparc/include/uapi/asm/setup.h
diff --git a/arch/sparc/include/uapi/asm/setup.h
b/arch/sparc/includ
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Helge Deller
---
arch/parisc/include/uapi/asm/setup.h | 5 -
1 file changed, 5 deletions(-)
delete mode 100644 arch/parisc/include/uapi/asm/setup.h
diff --git
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Reviewed-by: Philippe Mathieu-Daudé
---
arch/x86/include/asm/setup.h | 2 --
arch/x86/include/uapi/asm/setup.h | 1 -
2 files changed, 3 deletions(-)
delete mode 100644 arch/x86/include/uapi/asm/setup.h
d
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Max Filippov
---
arch/xtensa/include/uapi/asm/setup.h | 15 ---
1 file changed, 15 deletions(-)
delete mode 100644 arch/xtensa/include/uapi/asm/setup.h
diff --git a/arch/xtensa/include/ua
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/powerpc/include/uapi/asm/setup.h | 5 -
1 file changed, 5 deletions(-)
delete mode 100644 arch/powerpc/include/uapi/asm/setup.h
diff --git a/arch/powerpc/include/uapi/asm/setup.h
b/arch/powerpc/in
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
---
arch/mips/include/uapi/asm/setup.h | 5 -
1 file changed, 5 deletions(-)
delete mode 100644 arch/mips/include/uapi/asm/setup.h
diff --git a/arch/mips/include/uapi/asm/setup.h
b/arch/mips/include/uapi/a
From: Palmer Dabbelt
Signed-off-by: Palmer Dabbelt
Signed-off-by: Alexandre Ghiti
Acked-by: Heiko Carstens
Reviewed-by: Philippe Mathieu-Daudé
---
arch/s390/include/asm/setup.h | 1 -
arch/s390/include/uapi/asm/setup.h | 1 -
2 files changed, 2 deletions(-)
delete mode 100644 arch/s390
Signed-off-by: Alexandre Ghiti
---
arch/riscv/include/uapi/asm/setup.h | 6 --
1 file changed, 6 deletions(-)
delete mode 100644 arch/riscv/include/uapi/asm/setup.h
diff --git a/arch/riscv/include/uapi/asm/setup.h
b/arch/riscv/include/uapi/asm/setup.h
deleted file mode 100644
index 17fcecd
On 2023-02-24 16:45:45, Sathvika Vasireddy wrote:
> On 23/02/23 10:39, Kautuk Consul wrote:
>
> > Hi Sathvika,
> > > Just one question though. Went through the code again and I think
> > > that this place shouldn't be proper to insert a SYM_FUNC_END
> > > because we haven't entered the guest at th
Hi,
On 2023-02-20 10:53:55, Kautuk Consul wrote:
> kvmppc_hv_entry is called from only 2 locations within
> book3s_hv_rmhandlers.S. Both of those locations set r4
> as HSTATE_KVM_VCPU(r13) before calling kvmppc_hv_entry.
> So, shift the r4 load instruction to kvmppc_hv_entry and
> thus modify the
- remove .global scope of kvmppc_hv_entry
- remove r4 argument to kvmppc_hv_entry as it is not required
Changes since v1:
- replaced .global by SYM_INNER_LABEL for kvmpcc_hv_entry
Kautuk Consul (2):
arch/powerpc/kvm: kvmppc_hv_entry: remove .global scope
arch/powerpc/kvm: kvmppc_hv_entry: rem
kvmppc_hv_entry isn't called from anywhere other than
book3s_hv_rmhandlers.S itself. Removing .global scope for
this function and annotating it with SYM_INNER_LABEL.
Signed-off-by: Kautuk Consul
---
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
kvmppc_hv_entry is called from only 2 locations within
book3s_hv_rmhandlers.S. Both of those locations set r4
as HSTATE_KVM_VCPU(r13) before calling kvmppc_hv_entry.
So, shift the r4 load instruction to kvmppc_hv_entry and
thus modify the calling convention of this function.
Signed-off-by: Kautuk
On 6/3/23 11:04, Alexandre Ghiti wrote:
This all came up in the context of increasing COMMAND_LINE_SIZE in the
RISC-V port. In theory that's a UABI break, as COMMAND_LINE_SIZE is the
maximum length of /proc/cmdline and userspace could staticly rely on
that to be correct.
Usually I wouldn't mess
On 03/03/2023 10:19:29, Sachin Sant wrote:
> While running powerpc/primitives selftests, the test (load_unaligned_zeropad)
> hangs indefinitely. This behaviour is seen with linux-next 6.2.0-next-20230303
> on a Power10 logical partition.
>
> Git bisect points to following commit
>
> commit 169db3
When page fault is tried holding the per VMA lock, bad_access_pkey() and
bad_access() should not be called because it is assuming the mmap_lock is
held.
In the case a bad access is detected, fall back to the default path,
grabbing the mmap_lock to handle the fault and report the error.
Fixes: 169d
On 06.03.23 14:55, Laurent Dufour wrote:
When page fault is tried holding the per VMA lock, bad_access_pkey() and
bad_access() should not be called because it is assuming the mmap_lock is
held.
In the case a bad access is detected, fall back to the default path,
grabbing the mmap_lock to handle t
On 06/03/2023 15:07:26, David Hildenbrand wrote:
> On 06.03.23 14:55, Laurent Dufour wrote:
>> When page fault is tried holding the per VMA lock, bad_access_pkey() and
>> bad_access() should not be called because it is assuming the mmap_lock is
>> held.
>> In the case a bad access is detected, fall
Hi Rob,
On Sun, 26 Feb 2023 11:48:33 -0600
Rob Herring wrote:
[...]
> > + '#size-cells':
> > +const: 0
> > +
> > + '#fsl,serial-cells':
>
> #foo-cells is for when there are differing foo providers which need
> different number of cells. That's not the case here.
>
Ok, I will remove th
When page fault is tried holding the per VMA lock, bad_access_pkey() and
bad_access() should not be called because it is assuming the mmap_lock is
held.
In the case a bad access is detected, fall back to the default path,
grabbing the mmap_lock to handle the fault and report the error.
Fixes: 169d
s390 can do more fine-grained handling of spurious TLB protection faults,
when there also is the PTE pointer available.
Therefore, pass on the PTE pointer to flush_tlb_fix_spurious_fault() as
an additional parameter.
This will add no functional change to other architectures, but those with
privat
Hi,
This series adds support for audio using the QMC controller available in
some Freescale PowerQUICC SoCs.
This series contains three parts in order to show the different blocks
hierarchy and their usage in this support.
The first one is related to TSA (Time Slot Assigner).
The TSA handles the
Add support for the time slot assigner (TSA) available in some
PowerQUICC SoC such as MPC885 or MPC866.
Signed-off-by: Herve Codina
Reviewed-by: Christophe Leroy
---
.../bindings/soc/fsl/cpm_qe/fsl,cpm1-tsa.yaml | 205 ++
include/dt-bindings/soc/cpm1-fsl,tsa.h| 13 ++
2
The TSA (Time Slot Assigner) purpose is to route some TDM time-slots to
other internal serial controllers.
It is available in some PowerQUICC SoC such as the MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version support CPM1 SoCs only and some enhancement are
need
After contributing the driver, add myself as the maintainer for the
Freescale TSA controller.
Signed-off-by: Herve Codina
Reviewed-by: Christophe Leroy
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8d5bc223f305..fea9ee7ade8e 100644
The CPM1 command mask is defined for use with the standard
CPM1 command register as described in the user's manual:
0 |13|47|8 11|12 14| 15|
RST|- |OPCODE|CH_NUM| -|FLG|
In the QMC extension the CPM1 command register is redefined
(QMC supplement user's manue
Add support for the QMC (QUICC Multichannel Controller) available in
some PowerQUICC SoC such as MPC885 or MPC866.
Signed-off-by: Herve Codina
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Christophe Leroy
---
.../soc/fsl/cpm_qe/fsl,cpm1-scc-qmc.yaml | 162 ++
1 file chang
The QMC (QUICC Multichannel Controller) emulates up to 64
channels within one serial controller using the same TDM
physical interface routed from the TSA.
It is available in some PowerQUICC SoC such as the
MPC885 or MPC866.
It is also available on some Quicc Engine SoCs.
This current version supp
After contributing the driver, add myself as the maintainer for the
Freescale QMC controller.
Signed-off-by: Herve Codina
Reviewed-by: Christophe Leroy
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index fea9ee7ade8e..5597d402fbd8 100644
-
The QMC (QUICC mutichannel controller) is a controller present in some
PowerQUICC SoC such as MPC885.
The QMC audio is an ASoC component that uses the QMC controller to
transfer the audio data.
Signed-off-by: Herve Codina
Reviewed-by: Krzysztof Kozlowski
Reviewed-by: Christophe Leroy
---
.../b
The QMC audio is an ASoC component which provides DAIs that use the QMC
(QUICC Multichannel Controller) to transfer the audio data.
It provides as many DAIs as the number of QMC channels it references.
Signed-off-by: Herve Codina
Reviewed-by: Christophe Leroy
Tested-by: Christophe Leroy
---
s
After contributing the component, add myself as the maintainer for the
Freescale QMC audio ASoC component.
Signed-off-by: Herve Codina
Reviewed-by: Christophe Leroy
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 5597d402fbd8..a6e6b70c
On Mon, Mar 06, 2023 at 05:17:44PM +0100, Herve Codina wrote:
> Hi,
>
> This series adds support for audio using the QMC controller available in
> some Freescale PowerQUICC SoCs.
>
> This series contains three parts in order to show the different blocks
> hierarchy and their usage in this support
On Mon, Mar 06, 2023 at 05:15:48PM +0100, Gerald Schaefer wrote:
> diff --git a/arch/arm64/include/asm/pgtable.h
> b/arch/arm64/include/asm/pgtable.h
> index b6ba466e2e8a..0bd18de9fd97 100644
> --- a/arch/arm64/include/asm/pgtable.h
> +++ b/arch/arm64/include/asm/pgtable.h
> @@ -57,7 +57,7 @@ stat
On Mon, Mar 6, 2023 at 6:09 AM Laurent Dufour wrote:
>
> On 06/03/2023 15:07:26, David Hildenbrand wrote:
> > On 06.03.23 14:55, Laurent Dufour wrote:
> >> When page fault is tried holding the per VMA lock, bad_access_pkey() and
> >> bad_access() should not be called because it is assuming the mma
allow blocking domains
Up until now PPC64 managed to avoid using iommu_ops. The VFIO driver
uses a SPAPR TCE sub-driver and all iommu_ops uses were kept in
the Type1 VFIO driver. Recent development added 2 uses of iommu_ops to
the generic VFIO which broke POWER:
- a coherency capability check;
-
Signed-off-by: Timothy Pearson
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8d5bc223f305..876f96e82d66 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9836,6 +9836,11 @@ F: drivers/crypto/vmx/ghash*
F: drivers/crypto/vmx/ppc-xl
dependent
When introduced, IRQFD resampling worked on POWER8 with XICS. However
KVM on POWER9 has never implemented it - the compatibility mode code
("XICS-on-XIVE") misses the kvm_notify_acked_irq() call and the native
XIVE mode does not handle INTx in KVM at all.
This moved the capability supp
The following patches are going to add dependency/use of iommu_ops which
is initialized in subsys_initcall as well.
This moves pciobios_init() to the next initcall level.
This should not cause behavioral change.
Signed-off-by: Alexey Kardashevskiy
Signed-off-by: Timothy Pearson
---
arch/power
PPC64 IOMMU API defines iommu_table_group_ops which handles DMA windows
for PEs: control the ownership, create/set/unset a table the hardware
for dynamic DMA windows (DDW). VFIO uses the API to implement support
on POWER.
So far only PowerNV IODA2 (POWER8 and newer machines) implemented this and
This patch series reenables VFIO support on POWER systems. It
is based on Alexey Kardashevskiys's patch series, rebased and
successfully tested under QEMU with a Marvell PCIe SATA controller
on a POWER9 Blackbird host.
Alexey Kardashevskiy (3):
powerpc/iommu: Add "borrowing" iommu_table_group_o
On Mon, 6 Mar 2023 17:06:44 +
Catalin Marinas wrote:
> On Mon, Mar 06, 2023 at 05:15:48PM +0100, Gerald Schaefer wrote:
> > diff --git a/arch/arm64/include/asm/pgtable.h
> > b/arch/arm64/include/asm/pgtable.h
> > index b6ba466e2e8a..0bd18de9fd97 100644
> > --- a/arch/arm64/include/asm/pgtabl
This series refactors the KVM stats macros to reduce duplication and
adds the support for choosing custom names for stats.
Custom name makes it possible to decouple the userspace-visible stat
names from their internal representation in C. This can allow future
commits to refactor the various stats
Refactor the macros that generate struct _kvm_stats_desc designated
initializers to cut down on duplication.
No functional change intended.
Signed-off-by: David Matlack
---
include/linux/kvm_host.h | 75 +++-
1 file changed, 35 insertions(+), 40 deletions(-)
Refactor the various KVM stats macros to reduce the amount of duplicate
macro code. This change also improves readability by spelling out
"CUMULATIVE", "INSTANT", and "PEAK" instead of the previous short-hands
which were less clear ("COUNTER", "ICOUNTER", and "PCOUNTER").
No functional change inte
Allow custom names to be specified for stats built on KVM_STAT() via a
new inner macro __KVM_STAT(). e.g.
KVM_STAT(VM, CUMULATIVE, NONE, foo),
__KVM_STAT(VM, CUMULATIVE, NONE, bar, "custom_name"),
...
Custom name support enables decoupling the userspace-visible stat names
from their interna
Drop the union for the pages_{4k,2m,1g} stats. The union is no longer
necessary now that KVM supports choosing a custom name for stats.
Eliminating the union also would allow future commits to more easily
move pages[] into common code, e.g. if KVM ever gains support for a
common page table code.
This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
with assigned-clock* to specify a particular frequency to use. For
example, to set the second PLL (at offset 0x20)'s frequency, use
LYNX10G_PLLa(1). These are for use only in the device tree, and are not
otherwise used by the
This adds support for the Lynx 10G SerDes found on the QorIQ T-series
and Layerscape series. Due to limited time and hardware, only support
for the LS1046ARDB and LS1088ARDB is added in this initial series.
This series is based on phy/next, but it requires phylink support. This
is already present
This is a generic binding for simple MMIO GPIO controllers. Although we
have a single driver for these controllers, they were previously spread
over several files. Consolidate them. The register descriptions are
adapted from the comments in the source. There is no set order for the
registers, so I
This adds a binding for the SerDes module found on QorIQ processors.
Each phy is a subnode of the top-level device, possibly supporting
multiple lanes and protocols. This "thick" #phy-cells is used due to
allow for better organization of parameters. Note that the particular
parameters necessary to
This adds support for the PLLs found in Lynx 10G "SerDes" devices found on
various NXP QorIQ SoCs. There are two PLLs in each SerDes. This driver has
been split from the main PHY driver to allow for better review, even though
these PLLs are not present anywhere else besides the SerDes. An auxiliary
This adds some modes necessary for Lynx 10G support. 2500BASE-X, also
known as 2.5G SGMII, is 1000BASE-X/SGMII overclocked to 3.125 GHz, with
autonegotiation disabled. 10GBASE-R, also known as XFI, is the protocol
spoken between the PMA and PMD ethernet layers for 10GBASE-T and
10GBASE-S/L/E. It is
NXP has a "QIXIS" FPGA on several of their reference design boards. On
the LS1088ARDB there are several registers which control GPIOs. These
can be modeled with the MMIO GPIO driver.
Signed-off-by: Sean Anderson
---
Changes in v10:
- New
.../devicetree/bindings/gpio/gpio-mmio.yaml| 14
This adds nodes for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson
---
Changes in v10:
- Move serdes bindings to SoC dtsi
- Add support for all (ethernet) serdes modes
- Refer to "nodes" instead of "bindings"
- Move compa
The next few patches will break ethernet if the serdes is not enabled,
so enable the serdes driver by default on Layerscape.
Signed-off-by: Sean Anderson
---
Changes in v10:
- New
drivers/phy/freescale/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/phy/freescale/Kconfig b/
This adds appropriate descriptions for the macs which use the SerDes. The
156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
no driver for this device (and as far as I know all you can do with the
100MHz clocks i
This adds nodes for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson
---
Changes in v10:
- Move serdes bindings to SoC dtsi
- Add support for all (ethernet) serdes modes
- Refer to "nodes" instead of "bindings"
- Move compa
This adds serdes support to the LS1088ARDB. I have tested the QSGMII
ports as well as the two 10G ports. The SFP slot is now fully supported,
instead of being modeled as a fixed-link.
Linux hangs around when the serdes is initialized if the si5341 is
enabled with the in-tree driver, so I have mode
The internal PCSs are not always accessible during boot (such as if the
serdes has deselected the appropriate link mode). Give them appropriate
compatible strings so they don't automatically (fail to) probe as
genphys.
Signed-off-by: Sean Anderson
---
(no changes since v8)
Changes in v8:
- New
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is highly
heterogeneous, with each SoC typically having a totally different
selection of suppo
On Mon, Feb 27, 2023 at 9:37 AM Suren Baghdasaryan wrote:
>
> From: Laurent Dufour
>
> Attempt VMA lock-based page fault handling first, and fall back to the
> existing mmap_lock-based handling if that fails.
> Copied from "x86/mm: try VMA lock-based page fault handling first"
Hi Andrew,
Laurent
Hi,
On Mon, 6 Mar 2023 at 20:16, Sean Anderson wrote:
>
> This is a generic binding for simple MMIO GPIO controllers. Although we
> have a single driver for these controllers, they were previously spread
> over several files. Consolidate them. The register descriptions are
> adapted from the comm
On 3/6/23 15:51, Jonas Gorski wrote:
> Hi,
>
> On Mon, 6 Mar 2023 at 20:16, Sean Anderson wrote:
>>
>> This is a generic binding for simple MMIO GPIO controllers. Although we
>> have a single driver for these controllers, they were previously spread
>> over several files. Consolidate them. The re
From: Nathan Lynch
The 'filter' member is a pointer, not a bool; fix the wording
accordingly.
Signed-off-by: Nathan Lynch
---
arch/powerpc/kernel/rtas.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index c73b01d722f
From: Nathan Lynch
Any caller of rtas_call_unlocked() must provide an rtas_args parameter
block distinct from the core rtas_args buffer used by the rtas_call()
path. It's an unlikely error to make, but the potential consequences
are grim, and it's trivial to check.
Signed-off-by: Nathan Lynch
-
From: Nathan Lynch
Add documentation for rtas_call_unlocked(), including details on how
it differs from rtas_call().
Signed-off-by: Nathan Lynch
---
arch/powerpc/kernel/rtas.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kerne
From: Nathan Lynch
The kernel can handle retrying RTAS function calls in response to
-2/990x in the sys_rtas() handler instead of relaying the intermediate
status to user space.
Justifications:
* Currently it's nondeterministic and quite variable in practice
whether a retry status is returned
Proposed changes for the RTAS subsystem and client code.
Fixes that are subject to backporting are at the front of the queue,
followed by documentation and cleanups, with enhancements at the end.
Noteworthy changes:
* Change sys_rtas() to consume -2/990x statuses instead of returning
them to us
From: Nathan Lynch
CHRP and PAPR agree: "In order to make an RTAS call, the operating
system must construct an argument call buffer aligned on an eight byte
boundary in physically contiguous real memory [...]." (7.2.7 Calling
Mechanism and Conventions).
struct rtas_args is the type used for this
From: Nathan Lynch
The function name va_rtas_call_unlocked() is confusing: it may be
called with or without rtas_lock held. Rename it to va_rtas_call().
Signed-off-by: Nathan Lynch
---
arch/powerpc/kernel/rtas.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/arch/
From: Nathan Lynch
Using memcpy() isn't safe when buf is identical to rtas_err_buf, which
can happen during boot before slab is up. Full context which may not
be obvious from the diff:
if (altbuf) {
buf = altbuf;
} else {
buf = rtas_err_buf;
From: Nathan Lynch
Add lockdep annotations for the following properties that must hold:
* Any error log retrieval must be atomically coupled with the prior
RTAS call, without a window for another RTAS call to occur before the
error log can be retrieved.
* All users of the core rtas_args par
This patch is in the continuation to the discussions which happened on
'commit f89504300e94 ("spi: Stacked/parallel memories bindings")' for
adding dt-binding support for stacked/parallel memories.
This patch series updated the spi-nor, spi core and the spi drivers
to add stacked and parallel memo
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select
Supporting multi-cs in spi drivers would require the chip_select & cs_gpiod
members of struct spi_device to be an array. But changing the type of these
members to array would break the spi driver functionality. To make the
transition smoother introduced four new APIs to get/set the
spi->chip_select
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