On Thu, Oct 27, 2022 at 9:14 AM Chancel Liu wrote:
>
> This patchset supports SAI on i.MX93 platform.
>
> Chancel Liu (3):
> ASoC: dt-bindings: fsl,sai: Add compatible string for i.MX93 platform
> ASoC: fsl_sai: Add support for i.MX93 platform
> ASoC: fsl_sai: Specify the maxburst to 8 on i.
Michael, Fred, ping?
On 20/09/2022 23:04, Alexey Kardashevskiy wrote:
Here is another take on iommu_ops on POWER to make VFIO work
again on POWERPC64. Tested on PPC, kudos to Fred!
The tree with all prerequisites is here:
https://github.com/aik/linux/tree/kvm-fixes-wip
The previous discussion
On 2022/10/27 14:38, Takashi Iwai wrote:
On Thu, 27 Oct 2022 03:34:38 +0200,
Yang Yingliang wrote:
dev_set_name() in soundbus_add_one() allocates memory for name, it need be
freed when of_device_register() fails, call soundbus_dev_put() to give up
the reference that hold in device_initialize()
NMIs that are taken in real mode (the early MCE and HMI handlers)
skipped calling nmi_enter() in some configurations, in the hope that
more modern configurations like radix suffer fewer restrictions. This
just turns into whack-a-mole and fragile when core kernel code changes
anything.
A recent su
On Thu, 27 Oct 2022 09:41:03 +0200,
Yang Yingliang wrote:
>
>
> On 2022/10/27 14:38, Takashi Iwai wrote:
> > On Thu, 27 Oct 2022 03:34:38 +0200,
> > Yang Yingliang wrote:
> >> dev_set_name() in soundbus_add_one() allocates memory for name, it need be
> >> freed when of_device_register() fails, ca
The qe gpio driver is a custom API combined GPIO and pin control
driver that exist outside of the pin control subsystem for historical
reasons.
We want to get rid of the old GPIO numberspace, so instead of
calling gpio_to_desc() we get the gpio descriptor for the requested
line from the device tre
Hi Nicholas,
I love your patch! Yet something to improve:
[auto build test ERROR on powerpc/next]
[also build test ERROR on linus/master v6.1-rc2 next-20221027]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--bas
On 9/28/22 05:53, Barry Song wrote:
> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
>>
>> On 2022/9/27 14:16, Anshuman Khandual wrote:
>>> [...]
>>>
>>> On 9/21/22 14:13, Yicong Yang wrote:
+static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)
+{
+/* for
Hello:
This patch was applied to netdev/net-next.git (master)
by Paolo Abeni :
On Tue, 25 Oct 2022 11:42:54 -0700 you wrote:
> The git history for this driver seems to be completely
> automated / tree wide changes. I can't find any boards
> or systems which would use this chip. Google search
> sh
There's a build failure for Book3E without AltiVec:
Error: cc1: error: AltiVec not supported in this target
make[6]: *** [/linux/scripts/Makefile.build:250:
drivers/gpu/drm/amd/amdgpu/../display/dc/dml/display_mode_lib.o] Error 1
This happens because the amdgpu build is only gated by
PPC_LON
On 27/10/2022 02:03, Chancel Liu wrote:
> Add compatible string "fsl,imx93-sai" for i.MX93 platform
>
> Signed-off-by: Chancel Liu
> ---
> Documentation/devicetree/bindings/sound/fsl,sai.yaml | 1 +
Acked-by: Krzysztof Kozlowski
Best regards,
Krzysztof
This adds support for the Lynx 10G SerDes found on the QorIQ T-series
and Layerscape series. Due to limited time and hardware, only support
for the LS1046ARDB and LS1088ARDB is added in this initial series.
This series is based on phy/next, but it requires phylink support. This
is already present
This adds a binding for the SerDes module found on QorIQ processors.
Each phy is a subnode of the top-level device, possibly supporting
multiple lanes and protocols. This "thick" #phy-cells is used due to
allow for better organization of parameters. Note that the particular
parameters necessary to
This adds some modes necessary for Lynx 10G support. 2500BASE-X, also
known as 2.5G SGMII, is 1000BASE-X/SGMII overclocked to 3.125 GHz, with
autonegotiation disabled. 10GBASE-R, also known as XFI, is the protocol
spoken between the PMA and PMD ethernet layers for 10GBASE-T and
10GBASE-S/L/E. It is
This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
with assigned-clock* to specify a particular frequency to use. For
example, to set the second PLL (at offset 0x20)'s frequency, use
LYNX10G_PLLa(1). These are for use only in the device tree, and are not
otherwise used by the
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson
---
(no changes since v4)
Changes in v4:
- Convert to new bindings
Changes in v3:
- Describe modes in device tree
Changes in v2:
- Use one phy cell
This adds support for the Lynx 10G "SerDes" devices found on various NXP
QorIQ SoCs. There may be up to four SerDes devices on each SoC, each
supporting up to eight lanes. Protocol support for each SerDes is highly
heterogeneous, with each SoC typically having a totally different
selection of suppo
This adds appropriate bindings for the macs which use the SerDes. The
156.25MHz fixed clock is a crystal. The 100MHz clocks (there are
actually 3) come from a Renesas 6V49205B at address 69 on i2c0. There is
no driver for this device (and as far as I know all you can do with the
100MHz clocks is ga
This adds bindings for the SerDes devices. They are disabled by default
to prevent any breakage on existing boards.
Signed-off-by: Sean Anderson
---
(no changes since v4)
Changes in v4:
- Convert to new bindings
Changes in v3:
- New
arch/arm64/boot/dts/freescale/fsl-ls1088a.dtsi | 18 +++
The internal PCSs are not always accessible during boot (such as if the
serdes has deselected the appropriate link mode). Give them appropriate
compatible strings so they don't automatically (fail to) probe as
genphys.
Signed-off-by: Sean Anderson
---
Changes in v8:
- New
.../arm64/boot/dts/f
This adds serdes support to the LS1088ARDB. I have tested the QSGMII
ports as well as the two 10G ports. The SFP slot is now fully supported,
instead of being modeled as a fixed-link.
Linux hangs around when the serdes is initialized if the si5341 is
enabled with the in-tree driver, so I have mode
On Wed, Oct 26, 2022 at 05:34:04PM -0700, Mike Kravetz wrote:
> On 10/26/22 17:59, Peter Xu wrote:
> > Hi, Mike,
> >
> > On Sun, Sep 18, 2022 at 07:13:48PM -0700, Mike Kravetz wrote:
> > > +struct page *hugetlb_follow_page_mask(struct vm_area_struct *vma,
> > > + unsigned l
Quoting Sean Anderson (2022-10-18 16:11:07)
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in
Quoting Sean Anderson (2022-10-27 12:11:07)
> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
> with assigned-clock* to specify a particular frequency to use. For
> example, to set the second PLL (at offset 0x20)'s frequency, use
> LYNX10G_PLLa(1). These are for use only in
On Fri, Oct 28, 2022 at 3:19 AM Punit Agrawal
wrote:
>
>
> [ Apologies for chiming in late in the conversation ]
>
> Anshuman Khandual writes:
>
> > On 9/28/22 05:53, Barry Song wrote:
> >> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
> >>>
> >>> On 2022/9/27 14:16, Anshuman Khandual wrot
On 10/27/22 17:49, Stephen Boyd wrote:
> Quoting Sean Anderson (2022-10-27 12:11:07)
>> This adds ids for the Lynx 10g SerDes's internal PLLs. These may be used
>> with assigned-clock* to specify a particular frequency to use. For
>> example, to set the second PLL (at offset 0x20)'s frequency, use
On Thu, Oct 27, 2022 at 11:42 PM Anshuman Khandual
wrote:
>
>
>
> On 9/28/22 05:53, Barry Song wrote:
> > On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
> >>
> >> On 2022/9/27 14:16, Anshuman Khandual wrote:
> >>> [...]
> >>>
> >>> On 9/21/22 14:13, Yicong Yang wrote:
> +static inline b
Quoting Sean Anderson (2022-10-27 12:11:08)
> diff --git a/drivers/phy/freescale/Kconfig b/drivers/phy/freescale/Kconfig
> index 853958fb2c06..a6f9e39b 100644
> --- a/drivers/phy/freescale/Kconfig
> +++ b/drivers/phy/freescale/Kconfig
> @@ -47,3 +47,25 @@ config PHY_FSL_LYNX_28G
> fou
On Fri, 14 Oct 2022 08:58:43 PDT (-0700), ajo...@ventanamicro.com wrote:
Commit 78e5a3399421 ("cpumask: fix checking valid cpu range") has
started issuing warnings[*] when cpu indices equal to nr_cpu_ids - 1
are passed to cpumask_next* functions. seq_read_iter() and cpuinfo's
start and next seq o
[ Apologies for chiming in late in the conversation ]
Anshuman Khandual writes:
> On 9/28/22 05:53, Barry Song wrote:
>> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
>>>
>>> On 2022/9/27 14:16, Anshuman Khandual wrote:
[...]
On 9/21/22 14:13, Yicong Yang wrote:
> +st
On 2022/10/27 22:19, Punit Agrawal wrote:
>
> [ Apologies for chiming in late in the conversation ]
>
> Anshuman Khandual writes:
>
>> On 9/28/22 05:53, Barry Song wrote:
>>> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
On 2022/9/27 14:16, Anshuman Khandual wrote:
> [...]
onfig
m68k allyesconfig
i386defconfig
arm allyesconfig
arc randconfig-r043-20221027
sh allmodconfig
arm64allyesconfig
i386 randconfig
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
fixes-test
branch HEAD: 32f648fac0c17215014a47f1cd5c17d8abec powerpc/64e: Fix amdgpu
build on Book3E w/o AltiVec
elapsed time: 724m
configs tested: 32
configs skipped: 94
The following configs have been built s
On 10/28/22 03:37, Barry Song wrote:
> On Thu, Oct 27, 2022 at 11:42 PM Anshuman Khandual
> wrote:
>>
>>
>>
>> On 9/28/22 05:53, Barry Song wrote:
>>> On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
On 2022/9/27 14:16, Anshuman Khandual wrote:
> [...]
>
> On 9/21/22 1
On 2022/10/22 4:01, Tony Luck wrote:
> If the kernel is copying a page as the result of a copy-on-write
> fault and runs into an uncorrectable error, Linux will crash because
> it does not have recovery code for this case where poison is consumed
> by the kernel.
>
> It is easy to set up a test ca
On 10/28/22 03:25, Barry Song wrote:
> On Fri, Oct 28, 2022 at 3:19 AM Punit Agrawal
> wrote:
>>
>> [ Apologies for chiming in late in the conversation ]
>>
>> Anshuman Khandual writes:
>>
>>> On 9/28/22 05:53, Barry Song wrote:
On Tue, Sep 27, 2022 at 10:15 PM Yicong Yang wrote:
> O
On 2022/10/22 4:01, Tony Luck wrote:
> Cannot call memory_failure() directly from the fault handler because
> mmap_lock (and others) are held.
Could you please explain which lock makes it unfeasible to call
memory_failure() directly and
why? I'm somewhat confused. But I agree using memory_failure
On Mon, Sep 26, 2022 at 11:03:25PM -0700, Dmitry Torokhov wrote:
> This switches PIKA Warp away from legacy gpio API and to newer gpiod
> API, so that we can eventually deprecate the former.
>
> Because LEDs are normally driven by leds-gpio driver, but the
> platform code also wants to access the
With CONFIG_DEBUG_WX=y I am observing following warning
During kdump kernel boot. This warning is not seen during production
kernel boot. Kernel crash dump is captured correctly.
[ cut here ]
[ 11.541311] powerpc/mm: Found insecure W+X mapping at address
749d3849
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