Christophe Leroy writes:
> Le 03/09/2022 à 14:36, Michael Ellerman a écrit :
>
> ...
>
>>
>> However in commit ba95b5d03596 ("powerpc/mm/book3s/64: Rework page table
>> geometry for lower memory usage") the page table layout was reworked to
>> shrink the size of the PGD.
>>
>> As a result the 16
Christophe Leroy writes:
> Le 03/09/2022 à 14:36, Michael Ellerman a écrit :
>> Because 64-bit Book3S uses pgtable-nop4d.h, the P4D is folded into the
>> PGD. So P4D entries are actually PGD entries, or vice versa.
>>
>> The other way to think of it is that the P4D is a single entry page
>> table
Christophe Leroy writes:
> +Resending with valid powerpc list address
>
> Le 02/09/2022 à 20:52, David Hildenbrand a écrit :
> Adding Christophe on Cc:
>
> Christophe do you know if is_hugepd is true for all hugetlb entries, not
> just hugepd?
>
> is_hugepd() is true if and only if
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA256
Hi Linus,
Please pull some more powerpc fixes for 6.0:
The following changes since commit 1c23f9e627a7b412978b4e852793c5e3c3efc555:
Linux 6.0-rc2 (2022-08-21 17:32:54 -0700)
are available in the git repository at:
https://git.kernel.org/pub/
Michael Ellerman writes:
>
> On powerpc there are two ways for huge pages to be represented in the
> top level page table, aka PGD (Page Global Directory).
>
> If the address space mapped by an individual PGD entry does not
> correspond to a given huge page size, then the PGD entry points to a
>
Michael Ellerman writes:
>
> Because 64-bit Book3S uses pgtable-nop4d.h, the P4D is folded into the
> PGD. So P4D entries are actually PGD entries, or vice versa.
>
> The other way to think of it is that the P4D is a single entry page
> table below the PGD. Zero bits of the address are needed to
The pull request you sent on Sun, 04 Sep 2022 22:36:31 +1000:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-6.0-4
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/5995497296ade7716c8e70899e02235f2b6d9f5d
Thank you!
--
Deet-doot-do
Drop the repeated word "when" in comments.
Signed-off-by: Shaomin Deng
---
drivers/ps3/ps3-lpm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/ps3/ps3-lpm.c b/drivers/ps3/ps3-lpm.c
index 65512b6cc6fd..200ad8751860 100644
--- a/drivers/ps3/ps3-lpm.c
+++ b/drivers/ps3
fig
x86_64 rhel-8.3-kvm
i386 randconfig-a012
arc randconfig-r043-20220904
i386 randconfig-a016
loongarchalldefconfig
mips bmips_be_def
On 9/1/22 17:35, Alistair Popple wrote:
> We were not correctly copying PTE dirty bits to pages during
> migrate_vma_setup() calls. This could potentially lead to data loss, so
> add a test for this.
>
> Signed-off-by: Alistair Popple
> ---
> tools/testing/selftests/vm/hmm-tests.c | 124
Liang He writes:
> We should call of_node_put() for the reference 'tsi' returned by
> of_get_parent() which will increase the refcount.
>
> Signed-off-by: Liang He
> ---
> changelog:
>
> v2: use more conservative way to call of_node_put()
> v1: mov 'of_node_put()' into the 'if' condition
>
>
> So the basic issue I mentioned is that:
>
>
> /*
> * ,[1:n]-.
> * V V
> * perf_event_context <-[1:n]-> perf_event_pmu_context <--- perf_event
> * ^
The affinity code in "affinity_set" function access array
named "sched_cpus". The size for this array is allocated in
affinity_setup function which is nothing but value from
get_cpu_set_size. This is used to contain the cpumask value
for each cpu. While setting bit for each cpu, it calls
"set_bit"
The cpu mask init code in "record__mmap_cpu_mask_init"
function access "bits" array part of "struct mmap_cpu_mask".
The size of this array is the value from cpu__max_cpu().cpu.
This array is used to contain the cpumask value for each
cpu. While setting bit for each cpu, it calls "set_bit" function
Le 02/09/2022 à 21:03, Mike Kravetz a écrit :
> During discussions of this series [1], it was suggested that hugetlb
> handling code in follow_page_mask could be simplified. At the beginning
> of follow_page_mask, there currently is a call to follow_huge_addr which
> 'may' handle hugetlb pages.
Part of machine check error handling is done in realmode,
As of now instrumentation is not possible for any code that
runs in realmode.
When MCE is injected on KASAN enabled kernel, crash is
observed, Hence force inline or mark no instrumentation
for functions which can run in realmode, to avoid KA
On 05/09/22 10:24 am, Athira Rajeev wrote:
The affinity code in "affinity_set" function access array
named "sched_cpus". The size for this array is allocated in
affinity_setup function which is nothing but value from
get_cpu_set_size. This is used to contain the cpumask value
for each cpu. Whi
On 05/09/22 10:24 am, Athira Rajeev wrote:
The cpu mask init code in "record__mmap_cpu_mask_init"
function access "bits" array part of "struct mmap_cpu_mask".
The size of this array is the value from cpu__max_cpu().cpu.
This array is used to contain the cpumask value for each
cpu. While settin
18 matches
Mail list logo
