Hi all,
Today's linux-next merge of the nvdimm tree got a conflict in:
arch/powerpc/platforms/pseries/papr_scm.c
between commit:
bbbca72352bb ("powerpc/papr_scm: Implement initial support for injecting
smart errors")
from the powerpc tree and commit:
4c08d4bbc089 ("powerpc/papr_scm: Ad
Le 07/05/2021 à 12:20, Jiapeng Chong a écrit :
The return from the call to irq_domain_alloc_irqs() is int, it can be
a negative error code, however this is being assigned to an unsigned
int variable 'irq', this may lead to invalid if statement detection,
so that kfree execution is invalid. So
Le 31/03/2021 à 14:53, YueHaibing a écrit :
pseries_eeh_add_device_early()/pseries_eeh_add_device_tree_early() is
never used since adding, however pseries_eeh_init_edev() and
pseries_eeh_init_edev_recursive() need their inline versions.
Fixes: b6eebb093cad ("powerpc/eeh: Make early EEH init p
Le 07/08/2020 à 12:19, chenzefeng a écrit :
Update the comment for file's directory and function name changed.
The function name changed again with commit 714acdbd1c94 ("arch: rename
copy_thread_tls() back to copy_thread()")
Please update the patch to just drop the file name. Users are ab
Le 20/08/2021 à 04:34, jing yangyang a écrit :
Fix the following coccicheck warning:
./drivers/macintosh/windfarm_pm91.c:152:12-13:WARNING comparing pointer to 0
Reported-by: Zeal Robot
Signed-off-by: jing yangyang
WARNING:FROM_SIGN_OFF_MISMATCH: From:/Signed-off-by: email address
misma
Stephen Rothwell writes:
> Hi all,
>
> Today's linux-next merge of the nvdimm tree got a conflict in:
>
> arch/powerpc/platforms/pseries/papr_scm.c
>
> between commit:
>
> bbbca72352bb ("powerpc/papr_scm: Implement initial support for injecting
> smart errors")
>
> from the powerpc tree and c
Le 19/08/2021 à 14:56, Cédric Le Goater a écrit :
This fixes a compile error with W=1.
Cc: Christophe Leroy
Signed-off-by: Cédric Le Goater
Instead of doing that, we should use COMPAT_SYSCALL_DEFINEx macros in
the function definitions.
Thanks
Christophe
---
arch/powerpc/include/as
Le 24/04/2020 à 10:58, Wang Wenhu a écrit :
Include "linux/of_address.h" to fix the compile error for
mpc85xx_l2ctlr_of_probe() when compiling fsl_85xx_cache_sram.c.
CC arch/powerpc/sysdev/fsl_85xx_l2ctlr.o
arch/powerpc/sysdev/fsl_85xx_l2ctlr.c: In function ‘mpc85xx_l2ctlr_of_probe’:
icts.
>
Hi Stephan,
The change for resolving merged trees issue looks good to me. I
also tested the latest linux-next tree - master branch with
next-20220315 changes and the papr_scm perf interface is working as
expected. Thanks for correcting it.
Thanks,
Kajol Jain
More information on the general COW issues can be found at [2]. This series
is based on v5.17-rc8, [1]:
[PATCH v3 0/9] mm: COW fixes part 1: fix the COW security issue for
THP and swap
and [4]:
[PATCH v2 00/15] mm: COW fixes part 2: reliable GUP pins of
anonymous pag
Currently, we clear PG_anon_exclusive in try_to_unmap() and forget about
it. We do this, to keep fork() logic on swap entries easy and efficient:
for example, if we wouldn't clear it when unmapping, we'd have to lookup
the page in the swapcache for each and every swap entry during fork() and
clear
Let's test that __HAVE_ARCH_PTE_SWP_EXCLUSIVE works as expected.
Signed-off-by: David Hildenbrand
---
mm/debug_vm_pgtable.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/mm/debug_vm_pgtable.c b/mm/debug_vm_pgtable.c
index db2abd9e415b..55f1a8dc716f 100644
--- a/mm/debug_vm
Let's use bit 3 to remember PG_anon_exclusive in swap ptes.
Signed-off-by: David Hildenbrand
---
arch/x86/include/asm/pgtable.h | 16
arch/x86/include/asm/pgtable_64.h| 4 +++-
arch/x86/include/asm/pgtable_types.h | 5 +
3 files changed, 24 insertions(+), 1 delet
Let's use one of the type bits: core-mm only supports 5, so there is no
need to consume 6.
Signed-off-by: David Hildenbrand
---
arch/arm64/include/asm/pgtable-prot.h | 1 +
arch/arm64/include/asm/pgtable.h | 23 ---
2 files changed, 21 insertions(+), 3 deletions(-)
dif
Let's steal one bit from the offset. While at it, document the meaning
of bit 62 for swap ptes.
Signed-off-by: David Hildenbrand
---
arch/s390/include/asm/pgtable.h | 37 ++---
1 file changed, 30 insertions(+), 7 deletions(-)
diff --git a/arch/s390/include/asm/pgtabl
The swap type is simply stored in bits 0x1f of the swap pte. Let's
simplify by just getting rid of _PAGE_BIT_SWAP_TYPE. It's not like that
we can simply change it: _PAGE_SWP_SOFT_DIRTY would suddenly fall into
_RPAGE_RSV1, which isn't possible and would make the
BUILD_BUG_ON(_PAGE_HPTEFLAGS & _PAGE
Right now, the last 5 bits (0x1f) of the swap entry are used for the
type and the bit before that (0x20) is used for _PAGE_SWP_SOFT_DIRTY. We
cannot use 0x40, as that collides with _RPAGE_RSV1 -- contained in
_PAGE_HPTEFLAGS. The next candidate would be _RPAGE_SW3 (0x200) -- which is
used for _PAGE
On Tue, Mar 15, 2022 at 4:21 AM Michael Ellerman wrote:
>
> Stephen Rothwell writes:
> > Hi all,
> >
> > Today's linux-next merge of the nvdimm tree got a conflict in:
> >
> > arch/powerpc/platforms/pseries/papr_scm.c
> >
> > between commit:
> >
> > bbbca72352bb ("powerpc/papr_scm: Implement
On Mon, Mar 14, 2022 at 04:49:12PM -0700, Dave Hansen wrote:
> On 3/10/22 16:57, ira.we...@intel.com wrote:
> > From: Ira Weiny
> >
> > The number of pkeys supported on x86 and powerpc are much smaller than a
> > u16 value can hold. It is desirable to standardize on the type for
> > pkeys. powe
On 3/15/22 08:53, Ira Weiny wrote:
> On Mon, Mar 14, 2022 at 04:49:12PM -0700, Dave Hansen wrote:
>> On 3/10/22 16:57, ira.we...@intel.com wrote:
>>> From: Ira Weiny
>>>
>>> The number of pkeys supported on x86 and powerpc are much smaller than a
>>> u16 value can hold. It is desirable to standar
On Tue, 15 Mar 2022 15:18:35 +0100
David Hildenbrand wrote:
> Let's steal one bit from the offset. While at it, document the meaning
> of bit 62 for swap ptes.
You define _PAGE_SWP_EXCLUSIVE as _PAGE_LARGE, which is bit 52, and
this is not part of the swap pte offset IIUC. So stealing any bit mi
On 15.03.22 17:21, Gerald Schaefer wrote:
> On Tue, 15 Mar 2022 15:18:35 +0100
> David Hildenbrand wrote:
>
>> Let's steal one bit from the offset. While at it, document the meaning
>> of bit 62 for swap ptes.
>
> You define _PAGE_SWP_EXCLUSIVE as _PAGE_LARGE, which is bit 52, and
> this is not
On Tue, Mar 15, 2022 at 09:03:26AM -0700, Dave Hansen wrote:
> On 3/15/22 08:53, Ira Weiny wrote:
> > On Mon, Mar 14, 2022 at 04:49:12PM -0700, Dave Hansen wrote:
> >> On 3/10/22 16:57, ira.we...@intel.com wrote:
> >>> From: Ira Weiny
> >>>
> >>> The number of pkeys supported on x86 and powerpc ar
>> This would mean that it is not OK to have bit 52 not zero for swap PTEs.
>> But if I read the POP correctly, all bits except for the DAT-protection
>> would be ignored for invalid PTEs, so maybe this comment needs some update
>> (for both bits 52 and also 55).
>>
>> Heiko might also have some
On 15.03.22 17:58, David Hildenbrand wrote:
>
>>> This would mean that it is not OK to have bit 52 not zero for swap PTEs.
>>> But if I read the POP correctly, all bits except for the DAT-protection
>>> would be ignored for invalid PTEs, so maybe this comment needs some update
>>> (for both bits 5
On 15.03.22 18:12, David Hildenbrand wrote:
> On 15.03.22 17:58, David Hildenbrand wrote:
>>
This would mean that it is not OK to have bit 52 not zero for swap PTEs.
But if I read the POP correctly, all bits except for the DAT-protection
would be ignored for invalid PTEs, so maybe th
On 08/03/2022, 14:50:45, Nicholas Piggin wrote:
> If buff_copy allocation failed then there was an error and the errbuf
> allocation succeeded, it will not be logged or freed.
Good catch!
Since you're dealing with the error log buffer allocation/free, I think it
would be better to not make this a
On 08/03/2022, 14:50:46, Nicholas Piggin wrote:
> rtas_call must not be called with the MMU disabled because in case
> of rtas error, log_error is called which requires MMU enabled. Add
> a test and warning for this.
>
> Signed-off-by: Nicholas Piggin
Reviewed-by: Laurent Dufour
> ---
> arch/
s correction Stephen and the change looks ok to me. I
verified the functionality introduced by kernel commit bbbca72352bb
("powerpc/papr_scm: Implement initial support for injecting smart
errors") on the 'next-20220315' and found it to be working fine.
--
Cheers
~ Vaibhav
On 08/03/2022, 14:50:47, Nicholas Piggin wrote:
> Add range checking from the rtas syscall, and other error checks
> and warnings to kernel callers, so problems can be found and
> fixed.
>
> Signed-off-by: Nicholas Piggin
> ---
> arch/powerpc/kernel/rtas.c | 23 +--
> 1 file
On 3/15/22 10:14 AM, Eric Badger wrote:
# Prep injection data for a correctable error.
$ cd /sys/kernel/debug/apei/einj
$ echo 0x0040 > error_type
$ echo 0x4 > flags
$ echo 0x891000 > param4
# Root Error Status is initially clear
$ setpci -s ECAP0001+0x30.w
# Inje
On Mon, Mar 14, 2022 at 08:21:30AM +0100, Christophe Leroy wrote:
> System.map shows that vmlinux contains several instances of
> __static_call_return0():
>
> c0004fc0 t __static_call_return0
> c0011518 t __static_call_return0
> c00d8160 t __static_call_return0
>
> arch_static_c
On 3/15/22 12:52 PM, Eric Badger wrote:
On Tue, Mar 15, 2022 at 10:26:46AM -0700, Sathyanarayanan Kuppuswamy wrote:
On 3/15/22 10:14 AM, Eric Badger wrote:
# Prep injection data for a correctable error.
$ cd /sys/kernel/debug/apei/einj
$ echo 0x0040 > error_type
$ echo 0x4 >
Dear Linux folks,
On the POWER8 server IBM S822LC (ppc64le), I am unable to set the
message level for the network device to 0x010 but it fails.
$ sudo ethtool -s enP1p1s0f2 msglvl 0x010
netlink error: cannot modify bits past kernel bitset size (offset 56)
netlink error: In
On Mon, Mar 14, 2022 at 11:27:35AM +0100, Christophe Leroy wrote:
> #define ARCH_DEFINE_STATIC_CALL_TRAMP(name, func)__PPC_SCT(name, "b "
> #func)
> #define ARCH_DEFINE_STATIC_CALL_NULL_TRAMP(name) __PPC_SCT(name, "blr")
> +#define ARCH_DEFINE_STATIC_CALL_RET0_TRAMP(name) __PPC_SCT(n
On Mon, Mar 14, 2022 at 11:27:36AM +0100, Christophe Leroy wrote:
> Only DEFINE_STATIC_CALL use __DEFINE_STATIC_CALL macro now when
> CONFIG_HAVE_STATIC_CALL is selected.
>
> Only keep __DEFINE_STATIC_CALL() for the generic fallback, and
> also use it to implement DEFINE_STATIC_CALL_NULL() in that
On 3/15/22 2:36 AM, Christoph Hellwig wrote:
@@ -271,12 +273,23 @@ void __init swiotlb_init(bool addressing_limit, unsigned
int flags)
* allow to pick a location everywhere for hypervisors with guest
* memory encryption.
*/
+retry:
+ bytes = PAGE_ALIGN(defaul
Michael Neuling writes:
> On Fri, 2022-03-11 at 12:47 +1000, Nicholas Piggin wrote:
>> Commit cf13435b730a ("powerpc/tm: Fix userspace r13 corruption") fixes
>> a problem in treclaim where a SLB miss can occur on the
>> thread_struct->ckpt_regs while SCRATCH0 is live with the saved user r13
>> val
On Tue, 15 Mar 2022 22:58:57 +0100 Paul Menzel wrote:
> On the POWER8 server IBM S822LC (ppc64le), I am unable to set the
> message level for the network device to 0x010 but it fails.
>
> $ sudo ethtool -s enP1p1s0f2 msglvl 0x010
> netlink error: cannot modify bits past kernel b
This is a minimal stable kernel fix for the problem solved by
4c2de74cc869 ("powerpc/64: Interrupts save PPR on stack rather than
thread_struct"). Instead of changing the interrupt stack frame (which
causes a lot of churn), it moves the PPR value from the PACA save area
to an unused slot in the sta
Dear Jakub,
Am 16.03.22 um 02:35 schrieb Jakub Kicinski:
On Tue, 15 Mar 2022 22:58:57 +0100 Paul Menzel wrote:
On the POWER8 server IBM S822LC (ppc64le), I am unable to set the
message level for the network device to 0x010 but it fails.
$ sudo ethtool -s enP1p1s0f2 msglvl 0x010
Dear Jakub,
Sorry, one more addition.
Am 16.03.22 um 06:16 schrieb Paul Menzel:
Am 16.03.22 um 02:35 schrieb Jakub Kicinski:
On Tue, 15 Mar 2022 22:58:57 +0100 Paul Menzel wrote:
On the POWER8 server IBM S822LC (ppc64le), I am unable to set the
message level for the network device to 0x0100
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