Re: [PATCH v14 3/4] mm: define default MAX_PTRS_PER_* in include/pgtable.h

2021-06-17 Thread Christophe Leroy
Le 17/06/2021 à 08:39, Daniel Axtens a écrit : Commit c65e774fb3f6 ("x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable") made PTRS_PER_P4D variable on x86 and introduced MAX_PTRS_PER_P4D as a constant for cases which need a compile-time constant (e.g. fixed-size arrays). powerpc likewise has

[PATCH v2 0/8] Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
Form2 associativity adds a much more flexible NUMA topology layout than what is provided by Form1. This also allows PAPR SCM device to use better associativity when using the device as DAX KMEM device. More details can be found in patch 7. $ ndctl list -N -v [ { "dev":"namespace0.0", "mo

[PATCH v2 1/8] powerpc/pseries: rename min_common_depth to primary_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 38 +++--- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index f2bf98bdcea2..8365b298ec48 100644 ---

[PATCH v2 2/8] powerpc/pseries: rename distance_ref_points_depth to max_associativity_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 8365b298ec48..132813dd1a6c 100644 --- a/arch/powerpc/mm/n

[PATCH v2 3/8] powerpc/pseries: Rename TYPE1_AFFINITY to FORM1_AFFINITY

2021-06-17 Thread Aneesh Kumar K.V
Also make related code cleanup that will allow adding FORM2_AFFINITY in later patches. No functional change in this patch. Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/firmware.h | 4 +-- arch/powerpc/include/asm/prom.h | 2 +- arch/po

[PATCH v2 4/8] powerpc/pseries: Consolidate DLPAR NUMA distance update

2021-06-17 Thread Aneesh Kumar K.V
The associativity details of the newly added resourced are collected from the hypervisor via "ibm,configure-connector" rtas call. Update the numa distance details of the newly added numa node after the above call. In later patch we will remove updating NUMA distance when we are looking for node id

[PATCH v2 5/8] powerpc/pseries: Consolidate NUMA distance update during boot

2021-06-17 Thread Aneesh Kumar K.V
Instead of updating NUMA distance every time we lookup a node id from the associativity property, add helpers that can be used during boot which does this only once. Also remove the distance update from node id lookup helpers. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 135

[PATCH v2 6/8] powerpc/pseries: Add a helper for form1 cpu distance

2021-06-17 Thread Aneesh Kumar K.V
This helper is only used with the dispatch trace log collection. A later patch will add Form2 affinity support and this change helps in keeping that simpler. Also add a comment explaining we don't expect the code to be called with FORM0 Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V -

[PATCH v2 7/8] powerpc/pseries: Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
PAPR interface currently supports two different ways of communicating resource grouping details to the OS. These are referred to as Form 0 and Form 1 associativity grouping. Form 0 is the older format and is now considered deprecated. This patch adds another resource grouping named FORM2. Signed-o

[PATCH v2 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
FORM2 introduce a concept of secondary domain which is identical to the conceept of FORM1 primary domain. Use secondary domain as the numa node when using persistent memory device. For DAX kmem use the logical domain id introduced in FORM2. This new numa node Signed-off-by: Aneesh Kumar K.V ---

[PATCH] Fix for "powerpc/64: use interrupt restart table to speed up return from interrupt" SOFTE loading

2021-06-17 Thread Nicholas Piggin
This patch loads SOFTE(r1) with lbz, which existing code stores to with std. This causes interrupt flag corruption on big endian (as Michael pointed out to me, lbz happens to grab the correct byte on LE kernels which explains why I didn't run into it). Signed-off-by: Nicholas Piggin --- 64e still

[PATCH v3 0/8] Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
Form2 associativity adds a much more flexible NUMA topology layout than what is provided by Form1. This also allows PAPR SCM device to use better associativity when using the device as DAX KMEM device. More details can be found in patch 7. $ ndctl list -N -v [ { "dev":"namespace0.0", "mo

[PATCH v3 1/8] powerpc/pseries: rename min_common_depth to primary_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 38 +++--- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index f2bf98bdcea2..8365b298ec48 100644 ---

[PATCH v3 3/8] powerpc/pseries: Rename TYPE1_AFFINITY to FORM1_AFFINITY

2021-06-17 Thread Aneesh Kumar K.V
Also make related code cleanup that will allow adding FORM2_AFFINITY in later patches. No functional change in this patch. Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/firmware.h | 4 +-- arch/powerpc/include/asm/prom.h | 2 +- arch/po

[PATCH v3 4/8] powerpc/pseries: Consolidate DLPAR NUMA distance update

2021-06-17 Thread Aneesh Kumar K.V
The associativity details of the newly added resourced are collected from the hypervisor via "ibm,configure-connector" rtas call. Update the numa distance details of the newly added numa node after the above call. In later patch we will remove updating NUMA distance when we are looking for node id

[PATCH v3 5/8] powerpc/pseries: Consolidate NUMA distance update during boot

2021-06-17 Thread Aneesh Kumar K.V
Instead of updating NUMA distance every time we lookup a node id from the associativity property, add helpers that can be used during boot which does this only once. Also remove the distance update from node id lookup helpers. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 135

[PATCH v3 6/8] powerpc/pseries: Add a helper for form1 cpu distance

2021-06-17 Thread Aneesh Kumar K.V
This helper is only used with the dispatch trace log collection. A later patch will add Form2 affinity support and this change helps in keeping that simpler. Also add a comment explaining we don't expect the code to be called with FORM0 Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V -

[PATCH v3 7/8] powerpc/pseries: Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
PAPR interface currently supports two different ways of communicating resource grouping details to the OS. These are referred to as Form 0 and Form 1 associativity grouping. Form 0 is the older format and is now considered deprecated. This patch adds another resource grouping named FORM2. Signed-o

[PATCH v3 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
FORM2 introduce a concept of secondary domain which is identical to the concept of FORM1 primary domain. Use secondary domain as the numa node when using persistent memory device. With DAX kmem kernel can use the pimary domainID introduced in Form2. More details can be found in patch "powerpc/pseri

[PATCH v3 2/8] powerpc/pseries: rename distance_ref_points_depth to max_associativity_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 8365b298ec48..132813dd1a6c 100644 --- a/arch/powerpc/mm/n

Re: [PATCH 04/11] crypto: marvell: cesa: change FPGA indirect article to an

2021-06-17 Thread Herbert Xu
On Tue, Jun 08, 2021 at 02:23:43PM -0700, t...@redhat.com wrote: > From: Tom Rix > > Change use of 'a fpga' to 'an fpga' > > Signed-off-by: Tom Rix > --- > drivers/crypto/marvell/cesa/cesa.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Patch applied. Thanks. -- Email: Herbert Xu

Re: [PATCH] selftests/powerpc: Add a test of sigreturn vs VDSO

2021-06-17 Thread Christophe Leroy
Le 26/03/2020 à 13:06, Michael Ellerman a écrit : On Wed, 2020-03-04 at 11:04:02 UTC, Michael Ellerman wrote: There's two different paths through the sigreturn code, depending on whether the VDSO is mapped or not. We recently discovered a bug in the unmapped case, because it's not commonly us

[PATCH v15 0/4] KASAN core changes for ppc64 radix KASAN

2021-06-17 Thread Daniel Axtens
Building on the work of Christophe, Aneesh and Balbir, I've ported KASAN to 64-bit Book3S kernels running on the Radix MMU. I've been trying this for a while, but we keep having collisions between the kasan code in the mm tree and the code I want to put in to the ppc tree. This series just contain

[PATCH v15 1/4] kasan: allow an architecture to disable inline instrumentation

2021-06-17 Thread Daniel Axtens
For annoying architectural reasons, it's very difficult to support inline instrumentation on powerpc64.* Add a Kconfig flag to allow an arch to disable inline. (It's a bit annoying to be 'backwards', but I'm not aware of any way to have an arch force a symbol to be 'n', rather than 'y'.) We also

[PATCH v15 2/4] kasan: allow architectures to provide an outline readiness check

2021-06-17 Thread Daniel Axtens
Allow architectures to define a kasan_arch_is_ready() hook that bails out of any function that's about to touch the shadow unless the arch says that it is ready for the memory to be accessed. This is fairly uninvasive and should have a negligible performance penalty. This will only work in outline

[PATCH v15 3/4] mm: define default MAX_PTRS_PER_* in include/pgtable.h

2021-06-17 Thread Daniel Axtens
Commit c65e774fb3f6 ("x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable") made PTRS_PER_P4D variable on x86 and introduced MAX_PTRS_PER_P4D as a constant for cases which need a compile-time constant (e.g. fixed-size arrays). powerpc likewise has boot-time selectable MMU features which can cause o

[PATCH v15 4/4] kasan: use MAX_PTRS_PER_* for early shadow tables

2021-06-17 Thread Daniel Axtens
powerpc has a variable number of PTRS_PER_*, set at runtime based on the MMU that the kernel is booted under. This means the PTRS_PER_* are no longer constants, and therefore breaks the build. Switch to using MAX_PTRS_PER_*, which are constant. Suggested-by: Christophe Leroy Suggested-by: Balbir

Re: [RFC PATCH 7/8] powerpc/pseries: Add support for FORM2 associativity

2021-06-17 Thread David Gibson
On Tue, Jun 15, 2021 at 01:10:27PM +0530, Aneesh Kumar K.V wrote: > David Gibson writes: > > > On Tue, Jun 15, 2021 at 10:58:42AM +0530, Aneesh Kumar K.V wrote: > >> David Gibson writes: > >> > >> > On Mon, Jun 14, 2021 at 10:10:02PM +0530, Aneesh Kumar K.V wrote: > >> >> Signed-off-by: Daniel

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread David Gibson
On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: > David Gibson writes: > > > On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: > >> David Gibson writes: > >> > >> > On Mon, Jun 14, 2021 at 10:10:03PM +0530, Aneesh Kumar K.V wrote: > >> >> FORM2 introduce a conc

[PATCH 1/1] ALSA: aoa: remove unnecessary oom message

2021-06-17 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- sound/aoa/soundbus/i2sbus/pcm.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/aoa/soundbus/i2sbus/pcm

[PATCH 1/1] ASoC: fsl: remove unnecessary oom message

2021-06-17 Thread Zhen Lei
Fixes scripts/checkpatch.pl warning: WARNING: Possible unnecessary 'out of memory' message Remove it can help us save a bit of memory. Signed-off-by: Zhen Lei --- sound/soc/fsl/imx-audmix.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/soc/fsl/imx-audmix.c b/sound

Re: [RFC PATCH 7/8] powerpc/pseries: Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
On 6/17/21 1:20 PM, David Gibson wrote: On Tue, Jun 15, 2021 at 01:10:27PM +0530, Aneesh Kumar K.V wrote: David Gibson writes: PAPR defines "most significant" as below When the “ibm,architecture-vec-5” property byte 5 bit 0 has the value of one, the “ibm,associativ- ity-reference-po

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Daniel Henrique Barboza
On 6/17/21 4:46 AM, David Gibson wrote: On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: David Gibson writes: On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: David Gibson writes: On Mon, Jun 14, 2021 at 10:10:03PM +0530, Aneesh Kumar K.V wrote: FORM2

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
On 6/17/21 1:16 PM, David Gibson wrote: On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: David Gibson writes: On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: David Gibson writes: ... It's weird to me that you'd want to consider them in different nodes

Re: [PATCH v14 2/4] kasan: allow architectures to provide an outline readiness check

2021-06-17 Thread Marco Elver
On Thu, 17 Jun 2021 at 08:40, Daniel Axtens wrote: > > Allow architectures to define a kasan_arch_is_ready() hook that bails > out of any function that's about to touch the shadow unless the arch > says that it is ready for the memory to be accessed. This is fairly > uninvasive and should have a n

Re: [PATCH v14 1/4] kasan: allow an architecture to disable inline instrumentation

2021-06-17 Thread Marco Elver
On Thu, 17 Jun 2021 at 08:40, Daniel Axtens wrote: > > For annoying architectural reasons, it's very difficult to support inline > instrumentation on powerpc64.* > > Add a Kconfig flag to allow an arch to disable inline. (It's a bit > annoying to be 'backwards', but I'm not aware of any way to hav

Re: [PATCH v14 3/4] mm: define default MAX_PTRS_PER_* in include/pgtable.h

2021-06-17 Thread Marco Elver
On Thu, 17 Jun 2021 at 08:40, Daniel Axtens wrote: > > Commit c65e774fb3f6 ("x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable") > made PTRS_PER_P4D variable on x86 and introduced MAX_PTRS_PER_P4D as a > constant for cases which need a compile-time constant (e.g. fixed-size > arrays). > > powerpc

Re: [PATCH v14 4/4] kasan: use MAX_PTRS_PER_* for early shadow tables

2021-06-17 Thread Marco Elver
On Thu, 17 Jun 2021 at 08:40, Daniel Axtens wrote: > > powerpc has a variable number of PTRS_PER_*, set at runtime based > on the MMU that the kernel is booted under. > > This means the PTRS_PER_* are no longer constants, and therefore > breaks the build. Switch to using MAX_PTRS_PER_*, which are

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
Daniel Henrique Barboza writes: > On 6/17/21 4:46 AM, David Gibson wrote: >> On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: >>> David Gibson writes: >>> On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: > David Gibson writes: > >> On Mon, Jun

Re: [PATCH v3 1/5] powerpc/interrupt: Rename and lightly change syscall_exit_prepare_main()

2021-06-17 Thread Nicholas Piggin
Excerpts from Christophe Leroy's message of June 15, 2021 6:33 pm: > Rename syscall_exit_prepare_main() into interrupt_exit_prepare_main() > > Make it static as it is not used anywhere else. > > Pass it the 'ret' so that it can 'or' it directly instead of > oring twice, once inside the function a

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
On 6/17/21 4:41 PM, Aneesh Kumar K.V wrote: Daniel Henrique Barboza writes: On 6/17/21 4:46 AM, David Gibson wrote: On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: David Gibson writes: On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: David Gibson write

[PATCH v3 1/4] drivers/nvdimm: Add nvdimm pmu structure

2021-06-17 Thread Kajol Jain
A structure is added, called nvdimm_pmu, for performance stats reporting support of nvdimm devices. It can be used to add nvdimm pmu data such as supported events and pmu event functions like event_init/add/read/del with cpu hotplug support. Tested-by: Nageswara R Sastry Signed-off-by: Kajol Jain

[PATCH v3 2/4] drivers/nvdimm: Add perf interface to expose nvdimm performance stats

2021-06-17 Thread Kajol Jain
A common interface is added to get performance stats reporting support for nvdimm devices. Added interface includes support for pmu register/unregister functions, cpu hotplug and pmu event functions like event_init/add/read/del. User could use the standard perf tool to access perf events exposed vi

[PATCH v3 4/4] powerpc/papr_scm: Document papr_scm sysfs event format entries

2021-06-17 Thread Kajol Jain
Details is added for the event, cpumask and format attributes in the ABI documentation. Tested-by: Nageswara R Sastry Signed-off-by: Kajol Jain --- Documentation/ABI/testing/sysfs-bus-papr-pmem | 31 +++ 1 file changed, 31 insertions(+) diff --git a/Documentation/ABI/testing/sy

[PATCH v3 0/4] Add perf interface to expose nvdimm

2021-06-17 Thread Kajol Jain
Patchset adds performance stats reporting support for nvdimm. Added interface includes support for pmu register/unregister functions. A structure is added called nvdimm_pmu to be used for adding arch/platform specific data such as supported events, cpumask pmu event functions like event_init/add/re

[PATCH v3 3/4] powerpc/papr_scm: Add perf interface support

2021-06-17 Thread Kajol Jain
Performance monitoring support for papr-scm nvdimm devices via perf interface is added which includes addition of pmu functions like add/del/read/event_init for nvdimm_pmu struture. A new parameter 'priv' in added to the pdev_archdata structure to save nvdimm_pmu device pointer, to handle the unre

Re: [PATCH v6 0/3] Introduce 64b relocatable kernel

2021-06-17 Thread Alex Ghiti
Le 18/05/2021 à 12:12, Alexandre Ghiti a écrit : After multiple attempts, this patchset is now based on the fact that the 64b kernel mapping was moved outside the linear mapping. The first patch allows to build relocatable kernels but is not selected by default. That patch should ease KASLR impl

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
David Gibson writes: > On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: >> David Gibson writes: >> >> > On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: >> >> David Gibson writes: >> >> >> >> > On Mon, Jun 14, 2021 at 10:10:03PM +0530, Aneesh Kumar K.V wrote:

Re: [PATCH v3 1/5] powerpc/interrupt: Rename and lightly change syscall_exit_prepare_main()

2021-06-17 Thread Christophe Leroy
Le 17/06/2021 à 13:25, Nicholas Piggin a écrit : Excerpts from Christophe Leroy's message of June 15, 2021 6:33 pm: Rename syscall_exit_prepare_main() into interrupt_exit_prepare_main() Make it static as it is not used anywhere else. Pass it the 'ret' so that it can 'or' it directly instead

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Aneesh Kumar K.V
Aneesh Kumar K.V writes: > David Gibson writes: > >> On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: >>> David Gibson writes: >>> >>> > On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: >>> >> David Gibson writes: >>> >> >>> >> > On Mon, Jun 14, 2021 at 10:1

Re: [PATCH v15 0/4] KASAN core changes for ppc64 radix KASAN

2021-06-17 Thread Balbir Singh
On Thu, Jun 17, 2021 at 07:30:28PM +1000, Daniel Axtens wrote: > Building on the work of Christophe, Aneesh and Balbir, I've ported > KASAN to 64-bit Book3S kernels running on the Radix MMU. I've been > trying this for a while, but we keep having collisions between the > kasan code in the mm tree a

Re: [PATCH 8/8] membarrier: Rewrite sync_core_before_usermode() and improve documentation

2021-06-17 Thread Mathieu Desnoyers
- On Jun 15, 2021, at 11:21 PM, Andy Lutomirski l...@kernel.org wrote: > The old sync_core_before_usermode() comments suggested that a > non-icache-syncing > return-to-usermode instruction is x86-specific and that all other > architectures automatically notice cross-modified code on return to

Re: [PATCH 8/8] membarrier: Rewrite sync_core_before_usermode() and improve documentation

2021-06-17 Thread Mathieu Desnoyers
- On Jun 15, 2021, at 11:21 PM, Andy Lutomirski l...@kernel.org wrote: [...] > +# An architecture that wants to support > +# MEMBARRIER_CMD_PRIVATE_EXPEDITED_SYNC_CORE needs to define precisely what > it > +# is supposed to do and implement membarrier_sync_core_before_usermode() to > +# make

Re: [PATCH 1/1] ALSA: aoa: remove unnecessary oom message

2021-06-17 Thread Takashi Iwai
On Thu, 17 Jun 2021 12:27:45 +0200, Zhen Lei wrote: > > Fixes scripts/checkpatch.pl warning: > WARNING: Possible unnecessary 'out of memory' message > > Remove it can help us save a bit of memory. > > Signed-off-by: Zhen Lei Thanks, applied. Takashi

[PATCH v4 00/17] powerpc/64: fast interrupt exits

2021-06-17 Thread Nicholas Piggin
This series attempts to improve the speed of interrupts and system calls in three major ways. Firstly, the SRR/HSRR registers do not need to be reloaded if they were clobbered for the duration of the interrupt and the return NIP and MSR did not changed. 64e does not implement this part, but it cou

[PATCH v4 01/17] powerpc/interrupt: Fix CONFIG ifdef typo

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy CONFIG_PPC_BOOK3S should be CONFIG_PPC_BOOK3S_64. restore_math is a no-op for other configurations. Signed-off-by: Christophe Leroy [np: split from another patch] Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/interrupt.c | 2 +- 1 file changed, 1 insertion(+),

[PATCH v4 02/17] powerpc: remove interrupt exit helpers unused argument

2021-06-17 Thread Nicholas Piggin
The msr argument is not used, remove it. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/asm-prototypes.h | 4 ++-- arch/powerpc/kernel/interrupt.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/pow

[PATCH v4 03/17] powerpc/64s: introduce different functions to return from SRR vs HSRR interrupts

2021-06-17 Thread Nicholas Piggin
This makes no real difference yet except that HSRR type interrupts will use hrfid to return. This is important for the next patch. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 65 +--- arch/powerpc/kernel/exceptions-64e.S | 4 ++ arch/powerpc/ker

[PATCH v4 04/17] powerpc/64s: avoid reloading (H)SRR registers if they are still valid

2021-06-17 Thread Nicholas Piggin
When an interrupt is taken, the SRR registers are set to return to where it left off. Unless they are modified in the meantime, or the return address or MSR are modified, there is no need to reload these registers when returning from interrupt. Introduce per-CPU flags that track the validity of SR

[PATCH v4 05/17] powerpc/64: handle MSR EE and RI in interrupt entry wrapper

2021-06-17 Thread Nicholas Piggin
Similarly to the system call change in the previous patch, the mtmsrd to enable RI can be combined with the mtmsrd to enable EE for interrupts which enable the latter, which tends to be the important synchronous interrupts (i.e., page faults). Do this by enabling EE and RI together at the beginnin

[PATCH v4 06/17] powerpc/64: move interrupt return asm to interrupt_64.S

2021-06-17 Thread Nicholas Piggin
The next patch would like to move interrupt return assembly code to a low location before general text, so move it into its own file and include via head_64.S Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/head-64.h | 2 +- arch/powerpc/kernel/entry_64.S | 623

[PATCH v4 07/17] powerpc/64s: system call avoid setting MSR[RI] until we set MSR[EE]

2021-06-17 Thread Nicholas Piggin
This extends the MSR[RI]=0 window a little further into the system call in order to pair RI and EE enabling with a single mtmsrd. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 2 -- arch/powerpc/kernel/interrupt_64.S | 4 ++-- 2 files changed, 2 insertions(+), 4 del

[PATCH v4 08/17] powerpc/64s: save one more register in the masked interrupt handler

2021-06-17 Thread Nicholas Piggin
This frees up one more register (and takes advantage of that to clean things up a little bit). This register will be used in the following patch. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 34 1 file changed, 20 insertions(+), 14 delet

[PATCH v4 09/17] powerpc/64: allow alternate return locations for soft-masked interrupts

2021-06-17 Thread Nicholas Piggin
The exception table fixup adjusts a failed page fault's interrupt return location if it was taken at an address specified in the exception table, to a corresponding fixup handler address. Introduce a variation of that idea which adds a fixup table for NMIs and soft-masked asynchronous interrupts.

[PATCH v4 10/17] powerpc/64: interrupt soft-enable race fix

2021-06-17 Thread Nicholas Piggin
Prevent interrupt restore from allowing racing hard interrupts going ahead of previous soft-pending ones, by using the soft-masked restart handler to allow a store to clear the soft-mask while knowing nothing is soft-pending. This probably doesn't matter much in practice, but it's a simple demonst

[PATCH v4 11/17] powerpc/64: treat low kernel text as irqs soft-masked

2021-06-17 Thread Nicholas Piggin
Treat code below __end_soft_masked as soft-masked for the purpose of alternate return. 64s already mostly does this for scv entry. This will be used to exit from interrupts without disabling MSR[EE]. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/interrupt.h | 11 --- arch/

[PATCH v4 12/17] powerpc/64: use interrupt restart table to speed up return from interrupt

2021-06-17 Thread Nicholas Piggin
Use the restart table facility to return from interrupt or system calls without disabling MSR[EE] or MSR[RI]. Interrupt return asm is put into the low soft-masked region, to prevent interrupts being processed here, although they are still taken as masked interrupts which causes SRRs to be clobbere

[PATCH v4 13/17] powerpc/interrupt: Rename and lightly change syscall_exit_prepare_main()

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy Rename syscall_exit_prepare_main() into interrupt_exit_prepare_main() Pass it the 'ret' so that it can 'or' it directly instead of oring twice, once inside the function and once outside. And remove 'r3' parameter which is not used. Signed-off-by: Christophe Leroy Review

[PATCH v4 14/17] powerpc/interrupt: Refactor interrupt_exit_user_prepare()

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy interrupt_exit_user_prepare() is a superset of interrupt_exit_user_prepare_main(). Refactor to avoid code duplication. Signed-off-by: Christophe Leroy Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/interrupt.c | 57 ++--- 1 file chan

[PATCH v4 15/17] powerpc/interrupt: Interchange prep_irq_for_{kernel_enabled/user}_exit()

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy prep_irq_for_user_exit() is a superset of prep_irq_for_kernel_enabled_exit(). In order to allow refactoring in following patch, interchange the two. This will allow prep_irq_for_user_exit() to call a renamed version of prep_irq_for_kernel_enabled_exit(). Signed-off-by: Chr

[PATCH v4 16/17] powerpc/interrupt: Refactor prep_irq_for_{user/kernel_enabled}_exit()

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy prep_irq_for_user_exit() is a superset of prep_irq_for_kernel_enabled_exit(). Rename prep_irq_for_kernel_enabled_exit() as prep_irq_for_enabled_exit() and have prep_irq_for_user_exit() use it. Signed-off-by: Christophe Leroy Reviewed-by: Nicholas Piggin Signed-off-by: N

[PATCH v4 17/17] powerpc/interrupt: Remove prep_irq_for_user_exit()

2021-06-17 Thread Nicholas Piggin
From: Christophe Leroy prep_irq_for_user_exit() has only one caller, squash it inside that caller. Signed-off-by: Christophe Leroy Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/interrupt.c | 16 +++- 1 file changed, 3 insertions(+), 13 deletions(-) diff --git a/arch/powe

Re: Oops (NULL pointer) with 'perf record' of selftest 'null_syscall'

2021-06-17 Thread Christophe Leroy
Le 17/06/2021 à 08:36, Athira Rajeev a écrit : On 16-Jun-2021, at 11:56 AM, Christophe Leroy wrote: Le 16/06/2021 à 05:40, Athira Rajeev a écrit : On 16-Jun-2021, at 8:53 AM, Madhavan Srinivasan wrote: On 6/15/21 8:35 PM, Christophe Leroy wrote: For your information, I'm getting th

[PATCH v4 0/7] Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
Form2 associativity adds a much more flexible NUMA topology layout than what is provided by Form1. More details can be found in patch 7. $ numactl -H ... node distances: node 0 1 2 3 0: 10 11 222 33 1: 44 10 55 66 2: 77 88 10 99 3: 101 121 132 10 $ After DAX k

[PATCH v4 2/7] powerpc/pseries: rename distance_ref_points_depth to max_associativity_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 20 ++-- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index 8365b298ec48..132813dd1a6c 100644 --- a/arch/powerpc/mm/n

[PATCH v4 1/7] powerpc/pseries: rename min_common_depth to primary_domain_index

2021-06-17 Thread Aneesh Kumar K.V
No functional change in this patch. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 38 +++--- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c index f2bf98bdcea2..8365b298ec48 100644 ---

[PATCH v4 3/7] powerpc/pseries: Rename TYPE1_AFFINITY to FORM1_AFFINITY

2021-06-17 Thread Aneesh Kumar K.V
Also make related code cleanup that will allow adding FORM2_AFFINITY in later patches. No functional change in this patch. Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/include/asm/firmware.h | 4 +-- arch/powerpc/include/asm/prom.h | 2 +- arch/po

[PATCH v4 4/7] powerpc/pseries: Consolidate DLPAR NUMA distance update

2021-06-17 Thread Aneesh Kumar K.V
The associativity details of the newly added resourced are collected from the hypervisor via "ibm,configure-connector" rtas call. Update the numa distance details of the newly added numa node after the above call. In later patch we will remove updating NUMA distance when we are looking for node id

[PATCH v4 5/7] powerpc/pseries: Consolidate NUMA distance update during boot

2021-06-17 Thread Aneesh Kumar K.V
Instead of updating NUMA distance every time we lookup a node id from the associativity property, add helpers that can be used during boot which does this only once. Also remove the distance update from node id lookup helpers. Signed-off-by: Aneesh Kumar K.V --- arch/powerpc/mm/numa.c | 135

[PATCH v4 6/7] powerpc/pseries: Add a helper for form1 cpu distance

2021-06-17 Thread Aneesh Kumar K.V
This helper is only used with the dispatch trace log collection. A later patch will add Form2 affinity support and this change helps in keeping that simpler. Also add a comment explaining we don't expect the code to be called with FORM0 Reviewed-by: David Gibson Signed-off-by: Aneesh Kumar K.V -

[PATCH v4 7/7] powerpc/pseries: Add support for FORM2 associativity

2021-06-17 Thread Aneesh Kumar K.V
PAPR interface currently supports two different ways of communicating resource grouping details to the OS. These are referred to as Form 0 and Form 1 associativity grouping. Form 0 is the older format and is now considered deprecated. This patch adds another resource grouping named FORM2. Signed-o

Re: [PATCH 11/11] powerpc/microwatt: Disable interrupts in boot wrapper main program

2021-06-17 Thread Segher Boessenkool
On Thu, Jun 17, 2021 at 11:40:23AM +1000, Nicholas Piggin wrote: > Excerpts from Segher Boessenkool's message of June 17, 2021 9:37 am: > > On Tue, Jun 15, 2021 at 09:05:27AM +1000, Paul Mackerras wrote: > >> This ensures that we don't get a decrementer interrupt arriving before > >> we have set up

Re: Oops (NULL pointer) with 'perf record' of selftest 'null_syscall'

2021-06-17 Thread Athira Rajeev
> On 17-Jun-2021, at 10:05 PM, Christophe Leroy > wrote: > > > > Le 17/06/2021 à 08:36, Athira Rajeev a écrit : >>> On 16-Jun-2021, at 11:56 AM, Christophe Leroy >>> wrote: >>> >>> >>> >>> Le 16/06/2021 à 05:40, Athira Rajeev a écrit : > On 16-Jun-2021, at 8:53 AM, Madhavan Sriniva

[PATCH] powerpc/perf: Fix crash with 'perf_instruction_pointer' when pmu is not set

2021-06-17 Thread Athira Rajeev
On systems without any specific PMU driver support registered, running perf record causes Oops. The relevant portion from call trace: BUG: Kernel NULL pointer dereference on read at 0x0040 Faulting instruction address: 0xc0021f0c Oops: Kernel access of bad area, sig: 11 [#1] BE PAGE_SIZE=4K P

[powerpc:topic/ppc-kvm] BUILD SUCCESS fae5c9f3664ba278137e54a2083b39b90c64093a

2021-06-17 Thread kernel test robot
allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig i386 randconfig-a002-20210617 i386 randconfig-a006-20210617 i386

Re: [RFC PATCH 8/8] powerpc/papr_scm: Use FORM2 associativity details

2021-06-17 Thread Daniel Henrique Barboza
On 6/17/21 8:11 AM, Aneesh Kumar K.V wrote: Daniel Henrique Barboza writes: On 6/17/21 4:46 AM, David Gibson wrote: On Tue, Jun 15, 2021 at 12:35:17PM +0530, Aneesh Kumar K.V wrote: David Gibson writes: On Tue, Jun 15, 2021 at 11:27:50AM +0530, Aneesh Kumar K.V wrote: David Gibson wr

[powerpc:next-test] BUILD SUCCESS 3c53642324f526c0aba411bf8e6cf2ab2471192a

2021-06-17 Thread kernel test robot
onfig mips allyesconfig mips allmodconfig powerpc allyesconfig powerpc allmodconfig powerpc allnoconfig x86_64 randconfig-a004-20210617 x86_64

[PATCH v6 00/17] Enable VAS and NX-GZIP support on PowerVM

2021-06-17 Thread Haren Myneni
Virtual Accelerator Switchboard (VAS) allows kernel subsystems and user space processes to directly access the Nest Accelerator (NX) engines which provides HW compression. The true user mode VAS/NX support on PowerNV is already included in Linux. Whereas PowerVM support is available from P10 onwa

[PATCH v6 01/17] powerpc/powernv/vas: Release reference to tgid during window close

2021-06-17 Thread Haren Myneni
The kernel handles the NX fault by updating CSB or sending signal to process. In multithread applications, children can open VAS windows and can exit without closing them. But the parent can continue to send NX requests with these windows. To prevent pid reuse, reference will be taken on pid and

[PATCH v6 02/17] powerpc/vas: Move VAS API to book3s common platform

2021-06-17 Thread Haren Myneni
The pseries platform will share vas and nx code and interfaces with the PowerNV platform, so create the arch/powerpc/platforms/book3s/ directory and move VAS API code there. Functionality is not changed. Signed-off-by: Haren Myneni Reviewed-by: Nicholas Piggin --- arch/powerpc/include/asm/vas

[PATCH v6 03/17] powerpc/powernv/vas: Rename register/unregister functions

2021-06-17 Thread Haren Myneni
powerNV and pseries drivers register / unregister to the corresponding platform specific VAS separately. Then these VAS functions call the common API with the specific window operations. So rename powerNV VAS API register/unregister functions. Signed-off-by: Haren Myneni Reviewed-by: Nicholas P

[PATCH v6 04/17] powerpc/vas: Add platform specific user window operations

2021-06-17 Thread Haren Myneni
PowerNV uses registers to open/close VAS windows, and getting the paste address. Whereas the hypervisor calls are used on PowerVM. This patch adds the platform specific user space window operations and register with the common VAS user space interface. Signed-off-by: Haren Myneni Reviewed-by:

[PATCH v6 05/17] powerpc/vas: Create take/drop pid and mm reference functions

2021-06-17 Thread Haren Myneni
Take pid and mm references when each window opens and drops during close. This functionality is needed for powerNV and pseries. So this patch defines the existing code as functions in common book3s platform vas-api.c Signed-off-by: Haren Myneni Reviewed-by: Nicholas Piggin --- arch/powerpc/in

[PATCH v6 06/17] powerpc/vas: Move update_csb/dump_crb to common book3s platform

2021-06-17 Thread Haren Myneni
If a coprocessor encounters an error translating an address, the VAS will cause an interrupt in the host. The kernel processes the fault by updating CSB. This functionality is same for both powerNV and pseries. So this patch moves these functions to common vas-api.c and the actual functionality i

[PATCH v6 07/17] powerpc/vas: Define and use common vas_window struct

2021-06-17 Thread Haren Myneni
Many elements in vas_struct are used on PowerNV and PowerVM platforms. vas_window is used for both TX and RX windows on PowerNV and for TX windows on PowerVM. So some elements are specific to these platforms. So this patch defines common vas_window and platform specific window structs (pnv_vas_w

[PATCH v6 08/17] powerpc/pseries/vas: Define VAS/NXGZIP hcalls and structs

2021-06-17 Thread Haren Myneni
This patch adds hcalls and other definitions. Also define structs that are used in VAS implementation on PowerVM. Signed-off-by: Haren Myneni Acked-by: Nicholas Piggin --- arch/powerpc/include/asm/hvcall.h| 7 ++ arch/powerpc/include/asm/vas.h | 30 +++ arch/powerpc/platforms

[PATCH v6 09/17] powerpc/vas: Define QoS credit flag to allocate window

2021-06-17 Thread Haren Myneni
PowerVM introduces two different type of credits: Default and Quality of service (QoS). The total number of default credits available on each LPAR depends on CPU resources configured. But these credits can be shared or over-committed across LPARs in shared mode which can result in paste command

[PATCH v6 10/17] powerpc/pseries/vas: Add hcall wrappers for VAS handling

2021-06-17 Thread Haren Myneni
This patch adds the following hcall wrapper functions to allocate, modify and deallocate VAS windows, and retrieve VAS capabilities. H_ALLOCATE_VAS_WINDOW: Allocate VAS window H_DEALLOCATE_VAS_WINDOW: Close VAS window H_MODIFY_VAS_WINDOW: Setup window before using H_QUERY_VAS_CAPABILITIES: Get V

[PATCH v6 11/17] powerpc/pseries/vas: Implement getting capabilities from hypervisor

2021-06-17 Thread Haren Myneni
The hypervisor provides VAS capabilities for GZIP default and QoS features. These capabilities gives information for the specific features such as total number of credits available in LPAR, maximum credits allowed per window, maximum credits allowed in LPAR, whether usermode copy/paste is support

[PATCH v6 12/17] powerpc/pseries/vas: Integrate API with open/close windows

2021-06-17 Thread Haren Myneni
This patch adds VAS window allocatioa/close with the corresponding hcalls. Also changes to integrate with the existing user space VAS API and provide register/unregister functions to NX pseries driver. The driver register function is used to create the user space interface (/dev/crypto/nx-gzip)

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