tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
next-test
head: 103bf32b0d2dd8b8a4d3d9ebdded5ba4e8263e6a
commit: 5592c877d21b6ca201aafca349663c5a41f134f0 [113/124] powerpc/64: move
interrupt return asm to interrupt_64.S
compiler: gcc-9 (Debian 9.3.0-22) 9.3.0
If you f
arch/powerpc/kernel/interrupt_64.S: asm/head-64.h is included more than once.
Generated by: scripts/checkincludes.pl
Reported-by: kernel test robot
Signed-off-by: kernel test robot
---
interrupt_64.S |1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/kernel/interrupt_64.S
b/ar
On Wed, Jun 16, 2021 at 02:21:51PM +0800, Claire Chang wrote:
> Propagate the swiotlb_force into io_tlb_default_mem->force_bounce and
> use it to determine whether to bounce the data or not. This will be
> useful later to allow for different pools.
>
> Signed-off-by: Claire Chang
Looks good,
Re
On Wed, Jun 16, 2021 at 02:21:54PM +0800, Claire Chang wrote:
> Add the functions, swiotlb_{alloc,free} and is_swiotlb_for_alloc to
> support the memory allocation from restricted DMA pool.
>
> The restricted DMA pool is preferred if available.
>
> Note that since coherent allocation needs remapp
Building on the work of Christophe, Aneesh and Balbir, I've ported
KASAN to 64-bit Book3S kernels running on the Radix MMU. I've been
trying this for a while, but we keep having collisions between the
kasan code in the mm tree and the code I want to put in to the ppc
tree.
So this series just cont
For annoying architectural reasons, it's very difficult to support inline
instrumentation on powerpc64.*
Add a Kconfig flag to allow an arch to disable inline. (It's a bit
annoying to be 'backwards', but I'm not aware of any way to have
an arch force a symbol to be 'n', rather than 'y'.)
We also
Allow architectures to define a kasan_arch_is_ready() hook that bails
out of any function that's about to touch the shadow unless the arch
says that it is ready for the memory to be accessed. This is fairly
uninvasive and should have a negligible performance penalty.
This will only work in outline
powerpc has a variable number of PTRS_PER_*, set at runtime based
on the MMU that the kernel is booted under.
This means the PTRS_PER_* are no longer constants, and therefore
breaks the build.
Define default MAX_PTRS_PER_*s in the same style as MAX_PTRS_PER_P4D.
As KASAN is the only user at the m
Commit 59438b46471a ("security,lockdown,selinux: implement SELinux
lockdown") added an implementation of the locked_down LSM hook to
SELinux, with the aim to restrict which domains are allowed to perform
operations that would breach lockdown.
However, in several places the security_locked_down() h
Excerpts from Haren Myneni's message of June 15, 2021 4:37 pm:
> On Mon, 2021-06-14 at 12:24 +1000, Nicholas Piggin wrote:
>> Excerpts from Haren Myneni's message of June 13, 2021 8:57 pm:
>> > PowerNV uses registers to open/close VAS windows, and getting the
>> > paste address. Whereas the hypervi
Excerpts from Haren Myneni's message of June 15, 2021 5:26 pm:
> On Mon, 2021-06-14 at 12:55 +1000, Nicholas Piggin wrote:
>> Excerpts from Haren Myneni's message of June 13, 2021 9:02 pm:
>> > This patch adds VAS window allocatioa/close with the corresponding
>> > hcalls. Also changes to integrate
Excerpts from Haren Myneni's message of June 15, 2021 7:01 pm:
> On Mon, 2021-06-14 at 13:07 +1000, Nicholas Piggin wrote:
>> Excerpts from Haren Myneni's message of June 13, 2021 9:02 pm:
>> > NX generates an interrupt when sees a fault on the user space
>> > buffer and the hypervisor forwards tha
On Tue, Jun 15, 2021 at 08:21:13PM -0700, Andy Lutomirski wrote:
> The old sync_core_before_usermode() comments suggested that a
> non-icache-syncing
> return-to-usermode instruction is x86-specific and that all other
> architectures automatically notice cross-modified code on return to
> userspac
> On 14-Jun-2021, at 10:53 AM, Kajol Jain wrote:
>
> Patchset adds performance stats reporting support for nvdimm.
> Added interface includes support for pmu register/unregister
> functions. A structure is added called nvdimm_pmu to be used for
> adding arch/platform specific data such as supp
Hi Claire,
On Wed, Jun 16, 2021 at 02:21:45PM +0800, Claire Chang wrote:
> This series implements mitigations for lack of DMA access control on
> systems without an IOMMU, which could result in the DMA accessing the
> system memory at unexpected times and/or unexpected addresses, possibly
> leadin
+++ Nicholas Piggin [16/06/21 11:18 +1000]:
Excerpts from Jessica Yu's message of June 15, 2021 10:17 pm:
+++ Nicholas Piggin [15/06/21 12:05 +1000]:
Excerpts from Jessica Yu's message of June 14, 2021 10:06 pm:
+++ Nicholas Piggin [11/06/21 19:39 +1000]:
The elf_check_arch() function is used
On Wed, 16 Jun 2021 at 10:02, Daniel Axtens wrote:
> Allow architectures to define a kasan_arch_is_ready() hook that bails
> out of any function that's about to touch the shadow unless the arch
> says that it is ready for the memory to be accessed. This is fairly
> uninvasive and should have a neg
Christophe Leroy writes:
> Le 15/06/2021 à 09:18, Michael Ellerman a écrit :
>> Christophe Leroy writes:
>>> This series is a cleanup of the use of 'struct ppc_inst'.
>>>
>>> A confusion is made between internal representation of powerpc
>>> instructions with 'struct ppc_inst' and in-memory code
On Wed, 16 Jun 2021 at 10:03, Daniel Axtens wrote:
[...]
> diff --git a/include/linux/kasan.h b/include/linux/kasan.h
> index 768d7d342757..fd65f477ac92 100644
> --- a/include/linux/kasan.h
> +++ b/include/linux/kasan.h
> @@ -40,10 +40,22 @@ struct kunit_kasan_expectation {
> #define PTE_HWTABLE_
On Wed, 16 Jun 2021 at 10:02, Daniel Axtens wrote:
>
> For annoying architectural reasons, it's very difficult to support inline
> instrumentation on powerpc64.*
>
> Add a Kconfig flag to allow an arch to disable inline. (It's a bit
> annoying to be 'backwards', but I'm not aware of any way to hav
Nicholas Piggin writes:
> Excerpts from Paul Mackerras's message of June 15, 2021 9:02 am:
>> This is accessed using the DARN instruction and should probably be
>> done more generically.
>>
>> Signed-off-by: Paul Mackerras
>> ---
>> arch/powerpc/include/asm/archrandom.h | 12 +-
>> arch
On Fri, Apr 16, 2021 at 03:05:31PM +0530, Aneesh Kumar K.V wrote:
> On 4/16/21 2:39 PM, Andy Shevchenko wrote:
> > On Fri, Apr 16, 2021 at 01:28:21PM +0530, Aneesh Kumar K.V wrote:
> > > On 4/15/21 7:16 PM, Andy Shevchenko wrote:
> > > > Parse to and export from UUID own type, before dereferencing.
Parse to and export from UUID own type, before dereferencing.
This also fixes wrong comment (Little Endian UUID is something else)
and should eliminate the direct strict types assignments.
Fixes: 43001c52b603 ("powerpc/papr_scm: Use ibm,unit-guid as the iset cookie")
Fixes: 259a948c4ba1 ("powerpc/
RFC --> v1
RFC: https://lkml.org/lkml/2021/6/4/791
Changelog:
Overhaul in interface design to the following:
/sys/firmware/papr/energy_scale_info/
|-- /
|-- desc
|-- value
|-- value_desc (if exists)
|-- /
|-- desc
|-- value
|-- value_desc (if exists)
Also imple
Adds a generic interface to represent the energy and frequency related
PAPR attributes on the system using the new H_CALL
"H_GET_ENERGY_SCALE_INFO".
H_GET_EM_PARMS H_CALL was previously responsible for exporting this
information in the lparcfg, however the H_GET_EM_PARMS H_CALL
will be deprecated
On 6/16/21 7:13 PM, Andy Shevchenko wrote:
Parse to and export from UUID own type, before dereferencing.
This also fixes wrong comment (Little Endian UUID is something else)
and should eliminate the direct strict types assignments.
Fixes: 43001c52b603 ("powerpc/papr_scm: Use ibm,unit-guid as the
+++ Michael Ellerman [16/06/21 12:37 +1000]:
Jessica Yu writes:
+++ Nicholas Piggin [15/06/21 12:05 +1000]:
Excerpts from Jessica Yu's message of June 14, 2021 10:06 pm:
+++ Nicholas Piggin [11/06/21 19:39 +1000]:
The elf_check_arch() function is used to test usermode binaries, but
kernel mo
On Mon, Jun 14, 2021 at 10:12:28AM +0100, Lee Jones wrote:
> On Mon, 07 Jun 2021, Christoph Hellwig wrote:
>
> > Please don't touch this code as it is about to be removed entirely.
>
> Do you have an ETA for this work?
I just resent the series.
On Wed, Jun 16, 2021 at 07:17:03PM +0530, Aneesh Kumar K.V wrote:
> On 6/16/21 7:13 PM, Andy Shevchenko wrote:
> > Parse to and export from UUID own type, before dereferencing.
> > This also fixes wrong comment (Little Endian UUID is something else)
> > and should eliminate the direct strict types
On Tue, Jun 15, 2021 at 9:53 PM Aneesh Kumar K.V
wrote:
>
> This patch series is split out series from [PATCH v7 00/11] Speedup mremap on
> ppc64
> (https://lore.kernel.org/linux-mm/20210607055131.156184-1-aneesh.ku...@linux.ibm.com)
> dropping ppc64 specific changes.
Both this and the followup
Fix coccicheck warning:
./arch/powerpc/platforms/ps3/system-bus.c:607:2-3: Unneeded semicolon
./arch/powerpc/platforms/ps3/system-bus.c:766:2-3: Unneeded semicolon
Signed-off-by: Wan Jiabing
---
arch/powerpc/platforms/ps3/system-bus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
d
On Tue, Jun 15, 2021 at 8:23 PM Michael Ellerman wrote:
>
> Rob Herring writes:
> > On Tue, Jun 15, 2021 at 10:13 AM nramas wrote:
> >>
> >> On Tue, 2021-06-15 at 08:01 -0600, Rob Herring wrote:
> >> > On Tue, Jun 15, 2021 at 6:18 AM Geert Uytterhoeven <
> >> > ge...@linux-m68k.org> wrote:
> >>
Hi Christoph,
On 6/15/21 6:24 AM, Christoph Hellwig wrote:
> Use the bvec helpers instead of open coding the copy.
>
> Signed-off-by: Christoph Hellwig
> ---
> drivers/block/ps3disk.c | 19 +++
> 1 file changed, 3 insertions(+), 16 deletions(-)
I tested your patch set applied t
Christoph,
> this series switches the core block layer code and all users of the
> existing bvec kmap helpers to use kmap_local_page. Drivers that
> currently use open coded kmap_atomic calls will converted in a follow
> on series.
Looks OK to me.
Reviewed-by: Martin K. Petersen
--
Martin
On 6/15/21 6:24 AM, Christoph Hellwig wrote:
> +/**
> + * bvec_kmap_local - map a bvec into the kernel virtual address space
> + * @bvec: bvec to map
> + *
> + * Must be called on single-page bvecs only. Call kunmap_local on the
> returned
> + * address to unmap.
> + */
> +static inline void *bve
Le 16/06/2021 à 11:07, Marco Elver a écrit :
On Wed, 16 Jun 2021 at 10:03, Daniel Axtens wrote:
[...]
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index 768d7d342757..fd65f477ac92 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -40,10 +40,22 @@ struct kunit_ka
Hi Paul,
On Tue, Jun 15, 2021 at 08:57:43AM +1000, Paul Mackerras wrote:
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -422,7 +422,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
>
> config MATH_EMULATION
> bool "Math emulation"
> - depends on 4xx || PPC_8xx || PPC_MPC832x ||
On 6/15/21 9:45 PM, Nicholas Piggin wrote:
> Excerpts from Andy Lutomirski's message of June 16, 2021 1:21 pm:
>> The old sync_core_before_usermode() comments suggested that a
>> non-icache-syncing
>> return-to-usermode instruction is x86-specific and that all other
>> architectures automatically
Fix typo in memcpy() where size should be CTR_RFC3686_NONCE_SIZE.
Fixes: 030f4e968741 ("crypto: nx - Fix reentrancy bugs")
Cc: sta...@vger.kernel.org
Signed-off-by: Kees Cook
---
drivers/crypto/nx/nx-aes-ctr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/nx/
On Tue, Jun 15, 2021 at 09:01:27AM +1000, Paul Mackerras wrote:
> This adds support to the Microwatt platform to use the standard
> 1655-style UART which available in the standalone Microwatt FPGA.
16550... 1655 is a DAC apparently :-)
Segher
On Wed, Jun 16, 2021 at 11:16:02PM +1000, Michael Ellerman wrote:
> Nicholas Piggin writes:
> > I would be happier if you didn't change this (or at least put it in its
> > own patch explaining why it's not going to slow down other platforms).
>
> It would essentially be a revert of 01c9348c7620
The patch titled
Subject: mm: rename pud_page_vaddr to pud_pgtable and make it return pmd_t
*
has been removed from the -mm tree. Its filename was
mm-rename-pud_page_vaddr-to-pud_pgtable-and-make-it-return-pmd_t.patch
This patch was dropped because an updated version will be merged
The patch titled
Subject: mm: rename p4d_page_vaddr to p4d_pgtable and make it return pud_t
*
has been removed from the -mm tree. Its filename was
mm-rename-p4d_page_vaddr-to-p4d_pgtable-and-make-it-return-pud_t.patch
This patch was dropped because an updated version will be merged
On Wed, Jun 16, 2021 at 01:40:07PM -0500, Segher Boessenkool wrote:
> Hi Paul,
>
> On Tue, Jun 15, 2021 at 08:57:43AM +1000, Paul Mackerras wrote:
> > --- a/arch/powerpc/Kconfig
> > +++ b/arch/powerpc/Kconfig
> > @@ -422,7 +422,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
> >
> > config MATH_EMULATIO
On Tue, Jun 15, 2021 at 09:05:27AM +1000, Paul Mackerras wrote:
> This ensures that we don't get a decrementer interrupt arriving before
> we have set up a handler for it.
Maybe add a comment saying this is setting MSR[EE]=0 for that? Or do
other bits here matter as well?
Segher
On Wed, Jun 16, 2021, at 11:52 AM, Andy Lutomirski wrote:
> On 6/15/21 9:45 PM, Nicholas Piggin wrote:
> > Excerpts from Andy Lutomirski's message of June 16, 2021 1:21 pm:
> >> The old sync_core_before_usermode() comments suggested that a
> >> non-icache-syncing
> >> return-to-usermode instructio
On Wed, Jun 16, 2021, at 3:20 AM, Will Deacon wrote:
>
> For the arm64 bits (docs and asm/sync_core.h):
>
> Acked-by: Will Deacon
>
Thanks.
Per Nick's suggestion, I renamed the header to membarrier.h. Unless I hear
otherwise, I'll keep the ack.
> Will
>
On Wed, 16 Jun 2021, Claire Chang wrote:
> Introduce the new compatible string, restricted-dma-pool, for restricted
> DMA. One can specify the address and length of the restricted DMA memory
> region by restricted-dma-pool in the reserved-memory node.
>
> Signed-off-by: Claire Chang
> ---
> .../
Excerpts from Nicholas Piggin's message of June 16, 2021 11:02 am:
> Excerpts from Andy Lutomirski's message of June 16, 2021 10:14 am:
>> akpm, please drop this series until it's fixed. It's a core change to
>> better support arch usecases, but it's unnecessarily fragile, and there
>> is already
On Wed, 16 Jun 2021, Claire Chang wrote:
> Propagate the swiotlb_force into io_tlb_default_mem->force_bounce and
> use it to determine whether to bounce the data or not. This will be
> useful later to allow for different pools.
>
> Signed-off-by: Claire Chang
> ---
> include/linux/swiotlb.h | 11
On Wed, 16 Jun 2021 10:22:33 +0530 "Aneesh Kumar K.V"
wrote:
> This patch series is split out series from [PATCH v7 00/11] Speedup mremap on
> ppc64
> (https://lore.kernel.org/linux-mm/20210607055131.156184-1-aneesh.ku...@linux.ibm.com)
> dropping ppc64 specific changes.
>
> This patchset is d
Excerpts from Segher Boessenkool's message of June 17, 2021 9:37 am:
> On Tue, Jun 15, 2021 at 09:05:27AM +1000, Paul Mackerras wrote:
>> This ensures that we don't get a decrementer interrupt arriving before
>> we have set up a handler for it.
>
> Maybe add a comment saying this is setting MSR[EE
On Wed, 16 Jun 2021 10:22:39 +0530 "Aneesh Kumar K.V"
wrote:
> To avoid a race between rmap walk and mremap, mremap does take_rmap_locks().
> The lock was taken to ensure that rmap walk don't miss a page table entry due
> to
> PTE moves via move_pagetables(). The kernel does further optimizatio
Excerpts from Nicholas Piggin's message of June 11, 2021 9:10 pm:
> Add --orphan-handling=warn for vdsos, and adjust vdso linker scripts to
> deal with orphan sections.
>
> Signed-off-by: Nicholas Piggin
Okay it looks like modules should discard .PPC.EMB.apuinfo. Not entirely
sure about .rela.o
> -Original Message-
> From: Aneesh Kumar K.V
> Sent: Tuesday, June 15, 2021 12:09 AM
> To: Sang, Oliver
> Cc: lkp ; LKML ;
> l...@lists.01.org; linux...@kvack.org; a...@linux-foundation.org;
> m...@ellerman.id.au; linuxppc-dev@lists.ozlabs.org; kaleshsi...@google.com;
> npig...@gmail.c
-a002-20210617
x86_64 randconfig-a003-20210617
x86_64 randconfig-a006-20210617
x86_64 randconfig-a005-20210617
x86_64 randconfig-a015-20210616
x86_64 randconfig-a011-20210616
x86_64 randconfig-a014-20210616
x86_64
Excerpts from Christophe Leroy's message of June 15, 2021 6:37 pm:
>
>
> Le 11/06/2021 à 04:30, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of June 5, 2021 12:56 am:
>>> prep_irq_for_user_exit() is a superset of
>>> prep_irq_for_kernel_enabled_exit().
>>>
>>> Refactor it
Nicholas Piggin writes:
> Excerpts from Segher Boessenkool's message of June 17, 2021 9:37 am:
>> On Tue, Jun 15, 2021 at 09:05:27AM +1000, Paul Mackerras wrote:
>>> This ensures that we don't get a decrementer interrupt arriving before
>>> we have set up a handler for it.
>>
>> Maybe add a comme
Paul Mackerras writes:
>
Little bit of change log never hurts :)
> Signed-off-by: Paul Mackerras
> ---
> arch/powerpc/boot/dts/microwatt.dts | 105
> 1 file changed, 105 insertions(+)
> create mode 100644 arch/powerpc/boot/dts/microwatt.dts
>
> diff --git a/arch/p
Excerpts from Jessica Yu's message of June 16, 2021 10:54 pm:
> +++ Nicholas Piggin [16/06/21 11:18 +1000]:
>>Excerpts from Jessica Yu's message of June 15, 2021 10:17 pm:
>>> +++ Nicholas Piggin [15/06/21 12:05 +1000]:
Excerpts from Jessica Yu's message of June 14, 2021 10:06 pm:
> +++ Nic
Kees Cook writes:
> Fix typo in memcpy() where size should be CTR_RFC3686_NONCE_SIZE.
>
> Fixes: 030f4e968741 ("crypto: nx - Fix reentrancy bugs")
> Cc: sta...@vger.kernel.org
> Signed-off-by: Kees Cook
Thanks.
> ---
> drivers/crypto/nx/nx-aes-ctr.c | 2 +-
> 1 file changed, 1 insertion(+), 1
This series implements mitigations for lack of DMA access control on
systems without an IOMMU, which could result in the DMA accessing the
system memory at unexpected times and/or unexpected addresses, possibly
leading to data leakage or corruption.
For example, we plan to use the PCI-e bus for Wi
Add a new function, swiotlb_init_io_tlb_mem, for the io_tlb_mem struct
initialization to make the code reusable.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
kernel/dma/swiotlb.c | 50 ++
Split the debugfs creation to make the code reusable for supporting
different bounce buffer pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
kernel/dma/swiotlb.c | 21 ++---
1 file changed, 14 insertions
Always have the pointer to the swiotlb pool used in struct device. This
could help simplify the code for other pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
drivers/base/core.c| 4
include/linux/device.h | 4
Update is_swiotlb_buffer to add a struct device argument. This will be
useful later to allow for different pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
drivers/iommu/dma-iommu.c | 12 ++--
drivers/xen/swiotl
Update is_swiotlb_active to add a struct device argument. This will be
useful later to allow for different pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
drivers/gpu/drm/i915/gem/i915_gem_internal.c | 2 +-
drivers/gp
Propagate the swiotlb_force into io_tlb_default_mem->force_bounce and
use it to determine whether to bounce the data or not. This will be
useful later to allow for different pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
-
Rename find_slots to swiotlb_find_slots and move the maintenance of
alloc_size to it for better code reusability later.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
kernel/dma/swiotlb.c | 16
1 file change
Add a new function, swiotlb_release_slots, to make the code reusable for
supporting different bounce buffer pools.
Signed-off-by: Claire Chang
Reviewed-by: Christoph Hellwig
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
kernel/dma/swiotlb.c | 35 ---
Add the functions, swiotlb_{alloc,free} and is_swiotlb_for_alloc to
support the memory allocation from restricted DMA pool.
The restricted DMA pool is preferred if available.
Note that since coherent allocation needs remapping, one must set up
another device coherent pool by shared-dma-pool and u
Add the initialization function to create restricted DMA pools from
matching reserved-memory nodes.
Regardless of swiotlb setting, the restricted DMA pool is preferred if
available.
The restricted DMA pools provide a basic level of protection against the
DMA overwriting buffer contents at unexpec
Introduce the new compatible string, restricted-dma-pool, for restricted
DMA. One can specify the address and length of the restricted DMA memory
region by restricted-dma-pool in the reserved-memory node.
Signed-off-by: Claire Chang
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
.../
If a device is not behind an IOMMU, we look up the device node and set
up the restricted DMA when the restricted-dma-pool is presented.
Signed-off-by: Claire Chang
Tested-by: Stefano Stabellini
Tested-by: Will Deacon
---
drivers/of/address.c| 33 +
drivers/o
v13: https://lore.kernel.org/patchwork/cover/1448001/
On 6/16/21 4:25 PM, Nageswara Sastry wrote:
>
>
>> On 14-Jun-2021, at 10:53 AM, Kajol Jain wrote:
>>
>> Patchset adds performance stats reporting support for nvdimm.
>> Added interface includes support for pmu register/unregister
>> functions. A structure is added called nvdimm_pmu to be used
Building on the work of Christophe, Aneesh and Balbir, I've ported
KASAN to 64-bit Book3S kernels running on the Radix MMU. I've been
trying this for a while, but we keep having collisions between the
kasan code in the mm tree and the code I want to put in to the ppc
tree.
This series just contain
For annoying architectural reasons, it's very difficult to support inline
instrumentation on powerpc64.*
Add a Kconfig flag to allow an arch to disable inline. (It's a bit
annoying to be 'backwards', but I'm not aware of any way to have
an arch force a symbol to be 'n', rather than 'y'.)
We also
Allow architectures to define a kasan_arch_is_ready() hook that bails
out of any function that's about to touch the shadow unless the arch
says that it is ready for the memory to be accessed. This is fairly
uninvasive and should have a negligible performance penalty.
This will only work in outline
Commit c65e774fb3f6 ("x86/mm: Make PGDIR_SHIFT and PTRS_PER_P4D variable")
made PTRS_PER_P4D variable on x86 and introduced MAX_PTRS_PER_P4D as a
constant for cases which need a compile-time constant (e.g. fixed-size
arrays).
powerpc likewise has boot-time selectable MMU features which can cause
o
powerpc has a variable number of PTRS_PER_*, set at runtime based
on the MMU that the kernel is booted under.
This means the PTRS_PER_* are no longer constants, and therefore
breaks the build. Switch to using MAX_PTRS_PER_*, which are constant.
Suggested-by: Christophe Leroy
Suggested-by: Balbir
v13: https://lore.kernel.org/patchwork/cover/1448001/
On 16-Jun-2021, at 11:56 AM, Christophe Leroy wrote:Le 16/06/2021 à 05:40, Athira Rajeev a écrit :On 16-Jun-2021, at 8:53 AM, Madhavan Srinivasan wrote:On 6/15/21 8:35 PM, Christophe Leroy wrote:For your information, I'm getting the following Oops. Detected with 5.13-rc6, it also oopses on 5.12 a
Le 17/06/2021 à 08:39, Daniel Axtens a écrit :
Allow architectures to define a kasan_arch_is_ready() hook that bails
out of any function that's about to touch the shadow unless the arch
says that it is ready for the memory to be accessed. This is fairly
uninvasive and should have a negligible
Le 17/06/2021 à 08:39, Daniel Axtens a écrit :
Allow architectures to define a kasan_arch_is_ready() hook that bails
out of any function that's about to touch the shadow unless the arch
says that it is ready for the memory to be accessed. This is fairly
uninvasive and should have a negligible
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