Re: [PATCH] powerpc/pseries: export LPAR security flavor in lparcfg

Le 05/03/2021 à 07:23, Michael Ellerman a écrit : Laurent Dufour writes: This is helpful to read the security flavor from inside the LPAR. We already have /sys/kernel/debug/powerpc/security_features. Is that not sufficient? Not really, it only reports that security mitigation are on or off

[PATCH v3] powerpc/32: remove bogus ppc_select syscall

From: Arnd Bergmann The ppc_select function was introduced in linux-2.3.48 in order to support code confusing the legacy select() calling convention with the standard one. Even 24 years ago, all correctly built code should not have done this and could have easily been phased out. Nothing that was

[PATCH v1] ibmvnic: remove excessive irqsave

From: Junlin Yang ibmvnic_remove locks multiple spinlocks while disabling interrupts: spin_lock_irqsave(&adapter->state_lock, flags); spin_lock_irqsave(&adapter->rwi_lock, flags); As reported by coccinelle, the second _irqsave() overwrites the value saved in 'flags' by the first _irqsave(), th

Re: [PATCH v5 05/22] powerpc/irq: Add helper to set regs->softe

Le 09/02/2021 à 08:49, Nicholas Piggin a écrit : Excerpts from Christophe Leroy's message of February 9, 2021 4:18 pm: Le 09/02/2021 à 02:11, Nicholas Piggin a écrit : Excerpts from Christophe Leroy's message of February 9, 2021 1:10 am: regs->softe doesn't exist on PPC32. Add irq_soft_m

[PATCH] powerpc/ptrace: Remove duplicate check from pt_regs_check()

"offsetof(struct pt_regs, msr) == offsetof(struct user_pt_regs, msr)" checked in pt_regs_check() twice in a row. Remove the second check. Signed-off-by: Denis Efremov --- arch/powerpc/kernel/ptrace/ptrace.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/powerpc/kernel/ptrace/ptrace.c

Re: [PATCH v3] powerpc/32: remove bogus ppc_select syscall

On Fri, Mar 5, 2021 at 9:40 AM Christophe Leroy wrote: > > From: Arnd Bergmann > > The ppc_select function was introduced in linux-2.3.48 in order to support > code confusing the legacy select() calling convention with the standard one. > Even 24 years ago, all correctly built code should not hav

Re: [PATCH v2 1/3] powerpc: sstep: Fix load and update emulation

On 2021/03/04 09:45AM, Segher Boessenkool wrote: > On Wed, Mar 03, 2021 at 10:01:27PM +0530, Naveen N. Rao wrote: > > On 2021/03/01 08:37PM, Segher Boessenkool wrote: > > > > And, r6 always ends up with 0xaea. It changes with the value I put into > > > > r6 though. > > > > > > That is exactly the

Re: [PATCH v3] powerpc/32: remove bogus ppc_select syscall

Le 05/03/2021 à 11:06, Arnd Bergmann a écrit : On Fri, Mar 5, 2021 at 9:40 AM Christophe Leroy wrote: From: Arnd Bergmann The ppc_select function was introduced in linux-2.3.48 in order to support code confusing the legacy select() calling convention with the standard one. Even 24 years a

Re: [PATCH] powerpc: Fix instruction encoding for lis in ppc_function_entry()

Le 04/03/2021 à 03:04, Naveen N. Rao a écrit : 'lis r2,N' is 'addis r2,0,N' and the instruction encoding in the macro LIS_R2 is incorrect (it currently maps to 'addis 0,r2,N'). Fix the same. Fixes: c71b7eff426fa7 ("powerpc: Add ABIv2 support to ppc_function_entry") Reported-by: Jiri Olsa Sig

Re: [PATCH] powerpc/pseries: export LPAR security flavor in lparcfg

Laurent Dufour writes: > Le 05/03/2021 à 07:23, Michael Ellerman a écrit : >> Laurent Dufour writes: >>> This is helpful to read the security flavor from inside the LPAR. >> >> We already have /sys/kernel/debug/powerpc/security_features. >> >> Is that not sufficient? > > Not really, it only rep

Re: [PATCH] powerpc/pseries: export LPAR security flavor in lparcfg

Le 05/03/2021 à 12:43, Michael Ellerman a écrit : Laurent Dufour writes: Le 05/03/2021 à 07:23, Michael Ellerman a écrit : Laurent Dufour writes: This is helpful to read the security flavor from inside the LPAR. We already have /sys/kernel/debug/powerpc/security_features. Is that not suff

Re: [RFC PATCH v1] powerpc: Enable KFENCE for PPC32

Marco Elver writes: ... > > The choice is between: > > 1. ARCH_FUNC_PREFIX (as a matter of fact, the ARCH_FUNC_PREFIX patch > is already in -mm). Perhaps we could optimize it further, by checking > ARCH_FUNC_PREFIX in buf, and advancing buf like you propose, but I'm > not sure it's worth worrying

[PATCH v4] powerpc/uprobes: Validation for prefixed instruction

As per ISA 3.1, prefixed instruction should not cross 64-byte boundary. So don't allow Uprobe on such prefixed instruction. There are two ways probed instruction is changed in mapped pages. First, when Uprobe is activated, it searches for all the relevant pages and replace instruction in them. In

Re: [PATCH v2 1/7] cmdline: Add generic function to build command line.

Will Deacon writes: > On Wed, Mar 03, 2021 at 06:57:09PM +0100, Christophe Leroy wrote: >> Le 03/03/2021 à 18:46, Will Deacon a écrit : >> > On Wed, Mar 03, 2021 at 06:38:16PM +0100, Christophe Leroy wrote: >> > > Le 03/03/2021 à 18:28, Will Deacon a écrit : >> > > > On Tue, Mar 02, 2021 at 05:25:

Re: [PATCH v1] powerpc: Include running function as first entry in save_stack_trace() and friends

On Thu, Mar 04, 2021 at 08:01:29PM +0100, Marco Elver wrote: > On Thu, 4 Mar 2021 at 19:51, Mark Rutland wrote: > > On Thu, Mar 04, 2021 at 07:22:53PM +0100, Marco Elver wrote: > > > I was having this problem with KCSAN, where the compiler would > > > tail-call-optimize __tsan_X instrumentation.

Re: [PATCH V3] mm: Generalize HUGETLB_PAGE_SIZE_VARIABLE

Anshuman Khandual writes: > HUGETLB_PAGE_SIZE_VARIABLE need not be defined for each individual > platform subscribing it. Instead just make it generic. > > Cc: Michael Ellerman > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc: Andrew Morton > Cc: Christoph Hellwig > Cc: Christophe Leroy

Re: [PATCH v2 1/7] cmdline: Add generic function to build command line.

Le 05/03/2021 à 12:58, Michael Ellerman a écrit : Will Deacon writes: On Wed, Mar 03, 2021 at 06:57:09PM +0100, Christophe Leroy wrote: Le 03/03/2021 à 18:46, Will Deacon a écrit : On Wed, Mar 03, 2021 at 06:38:16PM +0100, Christophe Leroy wrote: Le 03/03/2021 à 18:28, Will Deacon a écrit

Re: [PATCH] powerpc: Fix instruction encoding for lis in ppc_function_entry()

On Thu, Mar 04, 2021 at 07:34:11AM +0530, Naveen N. Rao wrote: > 'lis r2,N' is 'addis r2,0,N' and the instruction encoding in the macro > LIS_R2 is incorrect (it currently maps to 'addis 0,r2,N'). Fix the same. > > Fixes: c71b7eff426fa7 ("powerpc: Add ABIv2 support to ppc_function_entry") > Report

[PATCH] ethernet: ucc_geth: Use kmemdup instead of kmalloc and memcpy

From: Junlin Yang Fixes coccicheck warnings: ./drivers/net/ethernet/freescale/ucc_geth.c:3594:11-18: WARNING opportunity for kmemdup Signed-off-by: Junlin Yang --- drivers/net/ethernet/freescale/ucc_geth.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ethern

[PATCH v3 01/41] KVM: PPC: Book3S HV: Disallow LPCR[AIL] to be set to 1 or 2

These are already disallowed by H_SET_MODE from the guest, also disallow these by updating LPCR directly. AIL modes can affect the host interrupt behaviour while the guest LPCR value is set, so filter it here too. Suggested-by: Fabiano Rosas Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/

[PATCH v3 00/41] KVM: PPC: Book3S: C-ify the P9 entry/exit code

This tidies up things, and fixes a few corner cases and unfinished "XXX:" bits. The major one being "bad host interrupt" detection and handling (taking a MCE/SRESET while switching into guest regs) which was missing previously from the new P9 path. Adds a few new patches and makes some changes for

[PATCH v3 03/41] KVM: PPC: Book3S HV: Remove redundant mtspr PSPB

This SPR is set to 0 twice when exiting the guest. Suggested-by: Fabiano Rosas Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 2e29b96ef775..0542d7f17dc3 100644 -

[PATCH v3 04/41] KVM: PPC: Book3S HV: remove unused kvmppc_h_protect argument

The va argument is not used in the function or set by its asm caller, so remove it to be safe. Reviewed-by: Daniel Axtens Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/kvm_ppc.h | 3 +-- arch/powerpc/kvm/book3s_hv_rm_mmu.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-)

[PATCH v3 08/41] KVM: PPC: Book3S HV: Ensure MSR[ME] is always set in guest MSR

Rather than add the ME bit to the MSR when the guest is entered, make it clear that the hypervisor does not allow the guest to clear the bit. The ME addition is kept in the code for now, but a future patch will warn if it's not present. Reviewed-by: Daniel Axtens Reviewed-by: Fabiano Rosas Sign

[PATCH v3 09/41] KVM: PPC: Book3S 64: move KVM interrupt entry to a common entry point

Rather than bifurcate the call depending on whether or not HV is possible, and have the HV entry test for PR, just make a single common point which does the demultiplexing. This makes it simpler to add another type of exit handler. Reviewed-by: Daniel Axtens Reviewed-by: Fabiano Rosas Signed-off

[PATCH v3 10/41] KVM: PPC: Book3S 64: Move GUEST_MODE_SKIP test into KVM

Move the GUEST_MODE_SKIP logic into KVM code. This is quite a KVM internal detail that has no real need to be in common handlers. Also add a comment explaining why this thing exists. Reviewed-by: Daniel Axtens Reviewed-by: Fabiano Rosas Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/e

[PATCH v3 12/41] KVM: PPC: Book3S 64: Move hcall early register setup to KVM

System calls / hcalls have a different calling convention than other interrupts, so there is code in the KVMTEST to massage these into the same form as other interrupt handlers. Move this work into the KVM hcall handler. This means teaching KVM a little more about the low level interrupt handler s

[PATCH v3 14/41] KVM: PPC: Book3S 64: move bad_host_intr check to HV handler

This is not used by PR KVM. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_64_entry.S | 3 --- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 +++- arch/powerpc/kvm/book3s_segment.S | 7 +++ 3 files changed, 10 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/kvm/

[PATCH v3 15/41] KVM: PPC: Book3S 64: Minimise hcall handler calling convention differences

This sets up the same calling convention from interrupt entry to KVM interrupt handler for system calls as exists for other interrupt types. This is a better API, it uses a save area rather than SPR, and it has more registers free to use. Using a single common API helps maintain it, and it becomes

[PATCH v3 17/41] KVM: PPC: Book3S HV P9: implement kvmppc_xive_pull_vcpu in C

This is more symmetric with kvmppc_xive_push_vcpu. The extra test in the asm will go away in a later change. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/kvm_ppc.h | 2 ++ arch/powerpc/kvm/book3s_hv.c| 2 ++ arch/powerpc/kvm/book3s_hv_rmhandlers.S | 5 arc

[PATCH v3 18/41] KVM: PPC: Book3S HV P9: Move xive vcpu context management into kvmhv_p9_guest_entry

Move the xive management up so the low level register switching can be pushed further down in a later patch. XIVE MMIO CI operations can run in higher level code with machine checks, tracing, etc., available. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 7 +++ 1 file cha

[PATCH v3 19/41] KVM: PPC: Book3S HV P9: Stop handling hcalls in real-mode in the P9 path

In the interest of minimising the amount of code that is run in "real-mode", don't handle hcalls in real mode in the P9 path. POWER8 and earlier are much more expensive to exit from HV real mode and switch to host mode, because on those processors HV interrupts get to the hypervisor with the MMU o

[PATCH v3 20/41] KVM: PPC: Book3S HV P9: Move setting HDEC after switching to guest LPCR

LPCR[HDICE]=0 suppresses hypervisor decrementer exceptions on some processors, so it must be enabled before HDEC is set. Rather than set it in the host LPCR then setting HDEC, move the HDEC update to after the guest MMU context (including LPCR) is loaded. There shouldn't be much concern with delay

[PATCH v3 21/41] KVM: PPC: Book3S HV P9: Use large decrementer for HDEC

On processors that don't suppress the HDEC exceptions when LPCR[HDICE]=0, this could help reduce needless guest exits due to leftover exceptions on entering the guest. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/time.h | 2 ++ arch/powerpc/kvm/book3s_hv.c| 3 ++- 2 files chan

[PATCH v3 22/41] KVM: PPC: Book3S HV P9: Use host timer accounting to avoid decrementer read

There is no need to save away the host DEC value, as it is derived from the host timer subsystem, which maintains the next timer time. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/time.h | 5 + arch/powerpc/kernel/time.c | 1 + arch/powerpc/kvm/book3s_hv.c| 12 +

[PATCH v3 25/41] KVM: PPC: Book3S HV P9: Reduce irq_work vs guest decrementer races

irq_work's use of the DEC SPR is racy with guest<->host switch and guest entry which flips the DEC interrupt to guest, which could lose a host work interrupt. This patch closes one race, and attempts to comment another class of races. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_h

[PATCH v3 26/41] KVM: PPC: Book3S HV P9: Implement the rest of the P9 path in C

Almost all logic is moved to C, by introducing a new in_guest mode that selects and branches very early in the interrupt handler to the P9 exit code. The remaining assembly is only about 160 lines of low level stack setup, with VCPU vs host register save and restore, plus a small shim to the legac

[PATCH v3 28/41] KVM: PPC: Book3S HV P9: Read machine check registers while MSR[RI] is 0

SRR0/1, DAR, DSISR must all be protected from machine check which can clobber them. Ensure MSR[RI] is clear while they are live. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 11 +++-- arch/powerpc/kvm/book3s_hv_interrupt.c | 33 +++--- arch/

[PATCH v3 34/41] KVM: PPC: Book3S HV: Remove support for dependent threads mode on P9

Radix guest support will be removed from the P7/8 path, so disallow dependent threads mode on P9. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/kvm_host.h | 1 - arch/powerpc/kvm/book3s_hv.c| 27 +-- 2 files changed, 5 insertions(+), 23 deletions(-)

[PATCH v3 35/41] KVM: PPC: Book3S HV: Remove radix guest support from P7/8 path

The P9 path now runs all supported radix guest combinations, so remove radix guest support from the P7/8 path. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 65 ++--- 1 file changed, 3 insertions(+), 62 deletions(-) diff --git a/arch/powerpc/kv

[PATCH v3 37/41] KVM: PPC: Book3S HV: small pseries_do_hcall cleanup

Functionality should not be changed. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 29 +++-- 1 file changed, 15 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c index 5debe7652928..df8a05eb4f76 10

[PATCH v3 36/41] KVM: PPC: Book3S HV P9: Allow all P9 processors to enable nested HV

All radix guests go via the P9 path now, so there is no need to limit nested HV to processors that support "mixed mode" MMU. Remove the restriction. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/kv

[PATCH v3 39/41] KVM: PPC: Book3S HV P9: implement hash guest support

Guest entry/exit has to restore and save/clear the SLB, plus several other bits to accommodate hash guests in the P9 path. Radix host, hash guest support is removed from the P7/8 path. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c| 20 +++- arch/powerpc/kvm/book3s

[PATCH v3 40/41] KVM: PPC: Book3S HV P9: implement hash host / hash guest support

This additionally has to save and restore the host SLB, and also ensure that the MMU is off while switching into the guest SLB. P9 and later CPUs now always go via the P9 path. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_64_entry.S | 6 + arch/powerpc/kvm/book3s_hv.c

[PATCH v3 41/41] KVM: PPC: Book3S HV: remove ISA v3.0 and v3.1 support from P7/8 path

POWER9 and later processors always go via the P9 guest entry path now. Remove the remaining support from the P7/8 path. Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv.c| 62 ++-- arch/powerpc/kvm/book3s_hv_interrupts.S | 9 +- arch/powerpc/kvm/book3s_hv_rmhandlers.S

[PATCH 1/1] hotplug-cpu.c: show 'last online CPU' error in dlpar_cpu_remove()

Of all the reasons that dlpar_cpu_remove() can fail, the 'last online CPU' is one that can be caused directly by the user offlining CPUs in a partition/virtual machine that has hotplugged CPUs. Trying to reclaim a hotplugged CPU can fail if the CPU is now the last online in the system. This is easi

Re: [RFC PATCH v1] powerpc: Enable KFENCE for PPC32

On Fri, 5 Mar 2021 at 12:49, Michael Ellerman wrote: > Marco Elver writes: > ... > > > > The choice is between: > > > > 1. ARCH_FUNC_PREFIX (as a matter of fact, the ARCH_FUNC_PREFIX patch > > is already in -mm). Perhaps we could optimize it further, by checking > > ARCH_FUNC_PREFIX in buf, and a

Re: [PATCH v1] powerpc: Include running function as first entry in save_stack_trace() and friends

On Fri, Mar 05, 2021 at 07:38:25AM +0100, Christophe Leroy wrote: > Le 04/03/2021 à 20:24, Segher Boessenkool a écrit : > https://github.com/linuxppc/linux/commit/a9a3ed1eff36 > > > > >That is much heavier than needed (an mb()). You can just put an empty > >inline asm after a call before a return

Re: [PATCH v2 1/7] cmdline: Add generic function to build command line.

On Fri, Mar 05, 2021 at 10:58:02PM +1100, Michael Ellerman wrote: > Will Deacon writes: > > That's very similar to us; we're not relocated, although we are at least > > in control of the MMU (which is using a temporary set of page-tables). > > prom_init runs as an OF client, with the MMU off (exc

Re: [PATCH] arch/powerpc/include/asm/book3s/64/: remove duplicate include in mmu-hash.h

On 3/4/21 3:42 AM, menglong8.d...@gmail.com wrote: > From: Zhang Yunkai > > 'asm/bug.h' included in 'arch/powerpc/include/asm/book3s/64/mmu-hash.h' > is duplicated.It is also included in the 12th line. > > Signed-off-by: Zhang Yunkai Reviewed-by: Cédric Le Goater > --- > arch/powerpc/includ

Re: [PATCH v2 1/7] cmdline: Add generic function to build command line.

On Fri, Mar 05, 2021 at 01:49:03PM +0100, Christophe Leroy wrote: > Le 05/03/2021 à 12:58, Michael Ellerman a écrit : > >prom_init runs as an OF client, with the MMU off (except on some Apple > >machines), and we don't own the MMU. So there's really nothing we can do :) > > > >Though now that I loo

Re: [PATCH] powerpc: Fix instruction encoding for lis in ppc_function_entry()

On Thu, Mar 04, 2021 at 07:34:11AM +0530, Naveen N. Rao wrote: > 'lis r2,N' is 'addis r2,0,N' and the instruction encoding in the macro > LIS_R2 is incorrect (it currently maps to 'addis 0,r2,N'). Fix the same. That is written "addis r0,r2,N" even. Your patch looks fine otherwise, so with that fi

Re: [PATCH v1] ibmvnic: remove excessive irqsave

Hello: This patch was applied to netdev/net.git (refs/heads/master): On Fri, 5 Mar 2021 16:48:39 +0800 you wrote: > From: Junlin Yang > > ibmvnic_remove locks multiple spinlocks while disabling interrupts: > spin_lock_irqsave(&adapter->state_lock, flags); > spin_lock_irqsave(&adapter->rwi_lock

Re: [PATCH v1] ibmvnic: remove excessive irqsave

On Mar 5, 2021, at 2:48 AM, angkery wrote:From: Junlin Yang ibmvnic_remove locks multiple spinlocks while disabling interrupts:spin_lock_irqsave(&adapter->state_lock, flags);spin_lock_irqsave(&adapter->rwi_lock, flags);As reported by coccinelle, the second _