[PATCH v2 3/3] powerpc: sstep: Fix darn emulation

2021-02-02 Thread Sandipan Das
Commit 8813ff49607e ("powerpc/sstep: Check instruction validity against ISA version before emulation") introduced a proper way to skip unknown instructions. This makes sure that the same is used for the darn instruction when the range selection bits have a reserved value. Fixes: a23987ef267a ("pow

[PATCH] scsi: ibmvfc: convert sysfs sprintf/snprintf family to sysfs_emit

2021-02-02 Thread Jiapeng Chong
Fix the following coccicheck warning: ./drivers/scsi/ibmvscsi/ibmvfc.c: WARNING: use scnprintf or sprintf. Reported-by: Abaci Robot Signed-off-by: Jiapeng Chong --- drivers/scsi/ibmvscsi/ibmvfc.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/scs

[PATCH 0/3] powerpc/perf: Add Performance Monitor Counters to extended regs

2021-02-02 Thread Athira Rajeev
Patch set to add Performance Monitor Counter SPR's as part of extended regs in powerpc. Patch 1/3 saves the PMC values in the perf interrupt handler as part of per-cpu array. Patch 2/3 adds PMC1 to PMC6 as part of the extended regs mask. Patch 3/3 includes perf tools side changes to add PMC1 to PM

[PATCH 1/3] powerpc/perf: Include PMCs as part of per-cpu cpuhw_events struct

2021-02-02 Thread Athira Rajeev
To support capturing of PMC's as part of extended registers, the value of SPR's PMC1 to PMC6 has to be saved in the starting of PMI interrupt handler. This is needed since we are resetting the overflown PMC before creating sample and hence directly reading SPRN_PMCx in 'perf_reg_value' will be capt

[PATCH 2/3] powerpc/perf: Expose Performance Monitor Counter SPR's as part of extended regs

2021-02-02 Thread Athira Rajeev
Currently Monitor Mode Control Registers and Sampling registers are part of extended regs. Patch adds support to include Performance Monitor Counter Registers (PMC1 to PMC6 ) as part of extended registers. PMCs are saved in the perf interrupt handler as part of per-cpu array 'pmcs' in struct cpu_h

[PATCH 3/3] tools/perf: Add perf tools support to expose Performance Monitor Counter SPRs as part of extended regs

2021-02-02 Thread Athira Rajeev
To enable presenting of Performance Monitor Counter Registers (PMC1 to PMC6) as part of extended regsiters, patch adds these to sample_reg_mask in the tool side (to use with -I? option). Simplified the PERF_REG_PMU_MASK_300/31 definition. Excluded the unsupported SPRs (MMCR3, SIER2, SIER3) from ex

[powerpc:fixes-test] BUILD SUCCESS 24321ac668e452a4942598533d267805f291fdc9

2021-02-02 Thread kernel test robot
allnoconfig i386 randconfig-a001-20210202 i386 randconfig-a005-20210202 i386 randconfig-a003-20210202 i386 randconfig-a006-20210202 i386 randconfig-a002-20210202 i386 randconfig-a004-20210202 x86_64

[powerpc:next-test] BUILD REGRESSION a4d002e384ba1909c1c03799603f00c5909d6097

2021-02-02 Thread kernel test robot
or: non-void function does not return a value [-Werror,-Wreturn-type] Error/Warning ids grouped by kconfigs: clang_recent_errors |-- powerpc-randconfig-r003-20210202 | |-- arch-powerpc-kernel-tau_6xx.c:error:non-void-function-does-not-return-a-value-Werror-Wreturn-type | |-- arch-powerpc-k

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