__get_datapage() is only a few instructions to retrieve the
address of the page where the kernel stores data to the VDSO.
By inlining this function into its users, a bl/blr pair and
a mflr/mtlr pair is avoided, plus a few reg moves.
The improvement is noticeable (about 55 nsec/call on an 8xx)
vd
This is copied and adapted from commit 5c929885f1bb ("powerpc/vdso64:
Add support for CLOCK_{REALTIME/MONOTONIC}_COARSE")
from Santosh Sivaraj
Benchmark from vdsotest-all:
clock-gettime-realtime: syscall: 3601 nsec/call
clock-gettime-realtime:libc: 1072 nsec/call
clock-gettime-realtime:vd
Commit 18ad51dd342a ("powerpc: Add VDSO version of getcpu") added
getcpu() for PPC64 only, by making use of a user readable general
purpose SPR.
PPC32 doesn't have any such SPR.
For non SMP, just return CPU id 0 from the VDSO directly.
PPC32 doesn't support CONFIG_NUMA so NUMA node is always 0.
From: Vincenzo Frascino
clock_getres in the vDSO library has to preserve the same behaviour
of posix_get_hrtimer_res().
In particular, posix_get_hrtimer_res() does:
sec = 0;
ns = hrtimer_resolution;
and hrtimer_resolution depends on the enablement of the high
resolution timers that can h
Use LOAD_REG_IMMEDIATE() to load registers with immediate value.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/vdso32/gettimeofday.S | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/vdso32/gettimeofday.S
b/arch/powerpc/kernel/vdso32/gettime
clock_getres returns hrtimer_res for all clocks but coarse ones
for which it returns KTIME_LOW_RES.
return EINVAL for unknown clocks.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/asm-offsets.c | 3 +++
arch/powerpc/kernel/vdso32/gettimeofday.S | 19 +++
2 fil
Various optimisations by inverting branches and removing
redundant instructions.
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/vdso32/datapage.S | 3 +--
arch/powerpc/kernel/vdso32/getcpu.S | 6 +++---
arch/powerpc/kernel/vdso32/gettimeofday.S | 18 +-
3 fil
On PPC32, the cache lines have a fixed size known at build time.
Don't read it from the datapage.
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/vdso_datapage.h | 4
arch/powerpc/kernel/asm-offsets.c| 2 +-
arch/powerpc/kernel/vdso.c | 5 -
arch/p
On 11/28/2019 05:31 AM, Michael Ellerman wrote:
Christophe Leroy writes:
Le 22/11/2019 à 07:38, Michael Ellerman a écrit :
Michael Ellerman writes:
Christophe Leroy writes:
__get_datapage() is only a few instructions to retrieve the
address of the page where the kernel stores data to th
Le 31/10/2019 à 10:39, Daniel Axtens a écrit :
Currently, vmalloc space is backed by the early shadow page. This
means that kasan is incompatible with VMAP_STACK.
This series provides a mechanism to back vmalloc space with real,
dynamically allocated memory. I have only wired up x86, because
On 01/12/2019 17.10, Timur Tabi wrote:
> On 11/28/19 8:55 AM, Rasmus Villemoes wrote:
>> There have been several attempts in the past few years to allow
>> building the QUICC engine drivers for platforms other than PPC32. This
>> is yet another attempt.
>>
>> v5 can be found
>> here:https://lore.ke
On 06.10.19 10:56, David Hildenbrand wrote:
> This series fixes the access of uninitialized memmaps when shrinking
> zones/nodes and when removing memory. Also, it contains all fixes for
> crashes that can be triggered when removing certain namespace using
> memunmap_pages() - ZONE_DEVICE, reported
On Mon, Dec 02, 2019 at 04:53:26PM +1100, Michael Ellerman wrote:
> Aurelien Jarno writes:
> > On powerpc with recent versions of binutils, readelf outputs an extra
> > field when dumping the symbols of an object file. For example:
> >
> > 35: 083896 FUNCLOCAL DEFAULT [: 8
On 14.11.19 14:19, David Hildenbrand wrote:
> This is the MM part of
> https://lkml.org/lkml/2019/10/31/487
>
> "We can get rid of the memory isolate notifier by switching to balloon
> compaction in powerpc's CMM (Collaborative Memory Management). The memory
> isolate notifier was only neces
On 2019-11-29 20:14:47 [-0600], Frank Rowand wrote:
> The hash used is based on the assumptions you noted, and as stated in the
> code, that phandle property values are in a contiguous range of 1..n
> (not starting from zero), which is what dtc generates.
>
> We knew that for systems that do not m
Add compatible string "fsl,imx8qm-asrc" for imx8qm platform,
"fsl,imx8qxp-asrc" for imx8qxp platform.
There are two asrc modules in imx8qm & imx8qxp, the clock mapping is
different for each other, so add new property "fsl,asrc-clk-map"
to distinguish them.
Signed-off-by: Shengjiu Wang
---
change
There are two asrc module in imx8qm & imx8qxp, each module has
different clock configuration, and the DMA type is EDMA.
So in this patch, we define the new clocks, refine the clock map,
and include struct fsl_asrc_soc_data for different soc usage.
The EDMA channel is fixed with each dma request,
On Sat, 2019-11-30 at 14:42 -0800, Linus Torvalds wrote:
> [ Only tangentially related to the power parts ]
>
> On Sat, Nov 30, 2019 at 2:41 AM Michael Ellerman wrote:
> >
> > There's some changes in security/integrity as part of the secure boot work.
> > They
> > were all either written by or a
Le 27/11/2019 à 12:03, Arnd Bergmann a écrit :
On Thu, Nov 21, 2019 at 5:25 PM Christophe Leroy
wrote:
Arnd Bergmann a écrit :
On Wed, Nov 20, 2019 at 11:43 PM Ben Hutchings
wrote:
On Fri, 2019-11-08 at 22:07 +0100, Arnd Bergmann wrote:
@@ -192,7 +190,7 @@ V_FUNCTION_BEGIN(__kernel_tim
On Mon, Dec 2, 2019 at 8:56 AM Shengjiu Wang wrote:
> - - compatible : Contains "fsl,imx35-asrc" or "fsl,imx53-asrc".
> + - compatible : Contains "fsl,imx35-asrc", "fsl,imx53-asrc",
> + "fsl,imx8qm-asrc", "fsl,imx8qxp-asrc"
You missed the word "or" as in
On Mon, Dec 2, 2019 at 1:55 PM Christophe Leroy wrote:
> Le 27/11/2019 à 12:03, Arnd Bergmann a écrit :
> > On Thu, Nov 21, 2019 at 5:25 PM Christophe Leroy
> > wrote:
> >> Arnd Bergmann a écrit :
> >>> On Wed, Nov 20, 2019 at 11:43 PM Ben Hutchings
> >>> wrote:
>
> On Fri, 2019-11-08
- Original Message -
> Hi Jan,
>
> Jan Stancek writes:
> > - Original Message -
> >>
> >> Hello,
> >>
> >> We ran automated tests on a recent commit from this kernel tree:
> >>
> >>Kernel repo:
> >>
> >> git://git.kernel.org/pub/scm/linux/kernel/git/stable/st
> -Original Message-
> From: Rasmus Villemoes
> Sent: Thursday, November 28, 2019 8:56 AM
> To: Qiang Zhao ; Leo Li ;
> Christophe Leroy
> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org;
> linux-ker...@vger.kernel.org; Scott Wood ; Timur Tabi
> ; Rasmus Villemo
On Mon, Dec 2, 2019 at 2:14 AM Rasmus Villemoes
wrote:
>
> On 01/12/2019 17.10, Timur Tabi wrote:
> > On 11/28/19 8:55 AM, Rasmus Villemoes wrote:
> >> There have been several attempts in the past few years to allow
> >> building the QUICC engine drivers for platforms other than PPC32. This
> >> i
From: Leo Li
Date: Mon, 2 Dec 2019 22:51:57 +
>
>
>> -Original Message-
>> From: Rasmus Villemoes
>> Sent: Thursday, November 28, 2019 8:56 AM
>> To: Qiang Zhao ; Leo Li ;
>> Christophe Leroy
>> Cc: linuxppc-dev@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org;
>> linux-ker.
From: Li Yang
Date: Mon, 2 Dec 2019 16:56:39 -0600
> On Mon, Dec 2, 2019 at 2:14 AM Rasmus Villemoes
> wrote:
>>
>> On 01/12/2019 17.10, Timur Tabi wrote:
>> > On 11/28/19 8:55 AM, Rasmus Villemoes wrote:
>> >> There have been several attempts in the past few years to allow
>> >> building the QU
On 02/12/2019 17:45, Ram Pai wrote:
> H_PUT_TCE_INDIRECT hcall uses a page filled with TCE entries, as one of
> its parameters. One page is dedicated per cpu, for the lifetime of the
> kernel for this purpose. On secure VMs, contents of this page, when
> accessed by the hypervisor, retrieves enc
On 02/12/2019 17:45, Ram Pai wrote:
> Commit edea902c1c1e ("powerpc/pseries/iommu: Don't use dma_iommu_ops on
> secure guests")
> disabled dma_iommu_ops path, for secure VMs. The rationale for disabling
> the dma_iommu_ops path, was to use the dma_direct path, since it had
> inbuilt
On Tue, Dec 03, 2019 at 11:56:43AM +1100, Alexey Kardashevskiy wrote:
>
>
> On 02/12/2019 17:45, Ram Pai wrote:
> > H_PUT_TCE_INDIRECT hcall uses a page filled with TCE entries, as one of
> > its parameters. One page is dedicated per cpu, for the lifetime of the
> > kernel for this purpose. On se
On 03/12/2019 13:08, Ram Pai wrote:
> On Tue, Dec 03, 2019 at 11:56:43AM +1100, Alexey Kardashevskiy wrote:
>>
>>
>> On 02/12/2019 17:45, Ram Pai wrote:
>>> H_PUT_TCE_INDIRECT hcall uses a page filled with TCE entries, as one of
>>> its parameters. One page is dedicated per cpu, for the lifetime
From: Alastair D'Silva
These functions don't exist, so remove the prototypes for them.
Signed-off-by: Alastair D'Silva
Reviewed-by: Frederic Barrat
---
drivers/nvdimm/nd-core.h | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/nvdimm/nd-core.h b/drivers/nvdimm/nd-core.h
index 25f
From: Alastair D'Silva
This series adds support for OpenCAPI SCM devices, exposing
them as nvdimms so that we can make use of the existing
infrastructure.
V2:
- "powerpc: Map & release OpenCAPI LPC memory"
- Fix #if -> #ifdef
- use pci_dev_id to get the bdfn
- use __be64 to h
From: Alastair D'Silva
When setting up OpenCAPI connected persistent memory, the range check may
not be performed until quite late (or perhaps not at all, if the user does
not establish a DAX device).
This patch makes the range check callable so we can perform the check while
probing the OpenCAP
From: Alastair D'Silva
On PowerPC, the address ranges allocated to OpenCAPI LPC memory
are allocated from firmware. These address ranges may be higher
than what older kernels permit, as we increased the maximum
permissable address in commit 4ffe713b7587
("powerpc/mm: Increase the max addressable
From: Alastair D'Silva
This patch reads timeouts & firmware version from the controller, and
uses those timeouts to wait for the controller to report that it is ready
before handing the memory over to libnvdimm.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/Makefile | 2 +-
dr
From: Alastair D'Silva
Add OPAL calls for LPC memory alloc/release
Signed-off-by: Alastair D'Silva
Acked-by: Andrew Donnellan
Acked-by: Frederic Barrat
---
arch/powerpc/include/asm/opal-api.h| 2 ++
arch/powerpc/include/asm/opal.h| 3 +++
arch/powerpc/platforms/powernv/op
From: Alastair D'Silva
This patch retrieves the serial number of the card and makes it available
to consumers of the ocxl driver via the ocxl_fn struct.
Signed-off-by: Alastair D'Silva
Acked-by: Frederic Barrat
Acked-by: Andrew Donnellan
---
drivers/misc/ocxl/config.c | 46 ++
From: Alastair D'Silva
ocxl_context_detach_all() is called from ocxl_function_close(), so
there is no reason to leave the contexts allocated, as the caller
can do nothing useful with them at that point.
This also has the side-effect of freeing any allocated IRQs
within the context.
Signed-off-b
From: Alastair D'Silva
The nvdimm/ocxl driver will be maintained as part of the ppc tree.
I'm also adding myself as an author of the driver & contributor to
the generic ocxl driver.
Signed-off-by: Alastair D'Silva
---
MAINTAINERS | 3 +++
1 file changed, 3 insertions(+)
diff --git a/MAINTAIN
From: Alastair D'Silva
This patch requests the metadata required to issue admin commands, as well
as some helper functions to construct and check the completion of the
commands.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 67 +
drivers/nvdimm/ocxl/scm_
From: Alastair D'Silva
Similar to the previous patch, this adds support for near storage commands.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 6 +
drivers/nvdimm/ocxl/scm_internal.c | 41 ++
drivers/nvdimm/ocxl/scm_internal.h | 38
From: Alastair D'Silva
These IOCTLs provide low level access to the card to aid in debugging
controller/FPGA firmware.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/Kconfig| 6 +
drivers/nvdimm/ocxl/scm.c | 249 +
include/uapi/nvdimm/ocxl-sc
From: Alastair D'Silva
These values have been taken from the device specifications.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm_internal.h | 72 ++
1 file changed, 72 insertions(+)
diff --git a/drivers/nvdimm/ocxl/scm_internal.h
b/drivers/nvdimm/oc
From: Alastair D'Silva
Tally up the LPC memory on an OpenCAPI link & allow it to be mapped
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/core.c | 10 ++
drivers/misc/ocxl/link.c | 60 +++
drivers/misc/ocxl/ocxl_internal.h | 33 +
From: Alastair D'Silva
The heartbeat admin command is a simple admin command that exercises
the communication mechanisms within the controller.
This patch issues a heartbeat command to the card during init to ensure
we can communicate with the card's crontroller.
Signed-off-by: Alastair D'Silva
From: Alastair D'Silva
Add functions to map/unmap LPC memory
Signed-off-by: Alastair D'Silva
---
drivers/misc/ocxl/config.c| 4 +++
drivers/misc/ocxl/core.c | 50 +++
drivers/misc/ocxl/ocxl_internal.h | 3 ++
include/misc/ocxl.h | 18
From: Alastair D'Silva
This driver exposes LPC memory on OpenCAPI SCM cards
as an NVDIMM, allowing the existing nvram infrastructure
to be used.
Namespace metadata is stored on the media itself, so
scm_reserve_metadata() maps 1 section's worth of PMEM storage
at the start to hold this. The rest
From: Alastair D'Silva
Enable OpenCAPI Storage Class Memory driver on bare metal
Signed-off-by: Alastair D'Silva
---
arch/powerpc/configs/powernv_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/configs/powernv_defconfig
b/arch/powerpc/configs/powernv_defconfig
i
From: Alastair D'Silva
This patch allows the firmware of an OpenCAPI SCM card to be update by
writing a firmware file to a file in sysfs.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/Makefile | 2 +-
drivers/nvdimm/ocxl/scm.c | 5 +
drivers/nvdimm/ocxl/scm_interna
From: Alastair D'Silva
This patch adds IOCTLs to allow userspace to request & fetch dumps
of the internal controller state.
This is useful during debugging or when a fatal error on the controller
has occurred.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 132 ++
From: Alastair D'Silva
This patch retrieves proprietary formatted SMART data and makes it
available via ndctl. A later contribution will be made to ndctl to
parse this data.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 156 +
drivers/nvdi
From: Alastair D'Silva
The controller can report a number of statistics that are useful
in evaluating the performance and reliability of the card.
This patch exposes this information via an IOCTL.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 185 +++
From: Alastair D'Silva
This patch adds platform support to map & release LPC memory.
Signed-off-by: Alastair D'Silva
---
arch/powerpc/include/asm/pnv-ocxl.h | 2 ++
arch/powerpc/platforms/powernv/ocxl.c | 42 +++
2 files changed, 44 insertions(+)
diff --git a/arch/p
From: Alastair D'Silva
This patch introduces a character device (/dev/ocxl-scmX) which further
patches will use to interact with userspace.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 114 -
drivers/nvdimm/ocxl/scm_internal.h | 2 +
2
From: Alastair D'Silva
The near storage command 'Secure Erase' overwrites all data on the
media.
This patch hooks it up to the security function 'overwrite'.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 164 -
drivers/nvdimm/ocxl/scm_int
From: Alastair D'Silva
Some of the interrupts that the card generates are better handled
by the userspace daemon, in particular:
Controller Hardware/Firmware Fatal
Controller Dump Available
Error Log available
This patch allows a userspace application to register an eventfd with
the driver via S
From: Alastair D'Silva
When health & performance data is requested from the controller,
it responds with an error log containing the requested information.
This patch allows the request to me issued via an IOCTL.
Signed-off-by: Alastair D'Silva
---
drivers/nvdimm/ocxl/scm.c | 16
From: Alastair D'Silva
The read error log command extracts information from the controller's
internal error log.
This patch exposes this information in 2 ways:
- During probe, if an error occurs & a log is available, print it to the
console
- After probe, make the error log available to usersp
On Tue, Dec 03, 2019 at 02:46:28PM +1100, Alastair D'Silva wrote:
> This series adds support for OpenCAPI SCM devices, exposing
Could we _not_ introduce yet another term for persistent memory?
On Mon, 2019-12-02 at 19:50 -0800, Matthew Wilcox wrote:
> On Tue, Dec 03, 2019 at 02:46:28PM +1100, Alastair D'Silva wrote:
> > This series adds support for OpenCAPI SCM devices, exposing
>
> Could we _not_ introduce yet another term for persistent memory?
>
"Storage Class Memory" is an industr
Sebastian Andrzej Siewior writes:
> I've been looking at phandle_cache and noticed the following: The raw
> phandle value as generated by dtc starts at zero and is incremented by
> one for each phandle entry. The qemu pSeries model is using Slof (which
> is probably the same thing as used on real
On Tue, Dec 03, 2019 at 01:15:04PM +1100, Alexey Kardashevskiy wrote:
>
>
> On 03/12/2019 13:08, Ram Pai wrote:
> > On Tue, Dec 03, 2019 at 11:56:43AM +1100, Alexey Kardashevskiy wrote:
> >>
> >>
> >> On 02/12/2019 17:45, Ram Pai wrote:
> >>> H_PUT_TCE_INDIRECT hcall uses a page filled with TCE e
On Tue, Dec 03, 2019 at 11:58:18AM +1100, Alexey Kardashevskiy wrote:
>
>
> On 02/12/2019 17:45, Ram Pai wrote:
> > Commit edea902c1c1e ("powerpc/pseries/iommu: Don't use dma_iommu_ops on
> >secure guests")
> > disabled dma_iommu_ops path, for secure VMs. The rationale for disabling
>
Frank Rowand writes:
> On 11/29/19 9:10 AM, Sebastian Andrzej Siewior wrote:
>> I've been looking at phandle_cache and noticed the following: The raw
>> phandle value as generated by dtc starts at zero and is incremented by
>> one for each phandle entry. The qemu pSeries model is using Slof (which
On 03/12/2019 15:05, Ram Pai wrote:
> On Tue, Dec 03, 2019 at 01:15:04PM +1100, Alexey Kardashevskiy wrote:
>>
>>
>> On 03/12/2019 13:08, Ram Pai wrote:
>>> On Tue, Dec 03, 2019 at 11:56:43AM +1100, Alexey Kardashevskiy wrote:
On 02/12/2019 17:45, Ram Pai wrote:
> H_PUT_TCE_IN
On 12/2/19 10:12 PM, Michael Ellerman wrote:
> Frank Rowand writes:
>> On 11/29/19 9:10 AM, Sebastian Andrzej Siewior wrote:
>>> I've been looking at phandle_cache and noticed the following: The raw
>>> phandle value as generated by dtc starts at zero and is incremented by
>>> one for each phandle
On 26/11/19 4:21 pm, Jordan Niethe wrote:
A future revision of the ISA will introduce prefixed instructions. A
prefixed instruction is composed of a 4-byte prefix followed by a
4-byte suffix.
All prefixes have the major opcode 1. A prefix will never be a valid
word instruction. A suffix may be a
On 3/12/19 2:46 pm, Alastair D'Silva wrote:
From: Alastair D'Silva
These functions don't exist, so remove the prototypes for them.
Signed-off-by: Alastair D'Silva
Reviewed-by: Frederic Barrat
Reviewed-by: Andrew Donnellan
--
Andrew Donnellan OzLabs, ADL Canberra
a...@linux.i
On 3/12/19 2:46 pm, Alastair D'Silva wrote:
From: Alastair D'Silva
Enable OpenCAPI Storage Class Memory driver on bare metal
Signed-off-by: Alastair D'Silva
I'd suggest a summary line more like
powerpc/configs: Enable OpenCAPI SCM driver in powernv_defconfig
and a commit message to match.
On Tue, 2019-12-03 at 15:54 +1100, Andrew Donnellan wrote:
> On 3/12/19 2:46 pm, Alastair D'Silva wrote:
> > From: Alastair D'Silva
> >
> > Enable OpenCAPI Storage Class Memory driver on bare metal
> >
> > Signed-off-by: Alastair D'Silva
>
> I'd suggest a summary line more like
>
> powerpc/co
On Tue, 2019-12-03 at 14:46 +1100, Alastair D'Silva wrote:
> From: Alastair D'Silva
>
> This driver exposes LPC memory on OpenCAPI SCM cards
> as an NVDIMM, allowing the existing nvram infrastructure
> to be used.
>
> Namespace metadata is stored on the media itself, so
> scm_reserve_metadata()
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