Le 10/06/2019 à 05:08, Nicholas Piggin a écrit :
Radix can use ioremap_page_range for ioremap, after slab is available.
This makes it possible to enable huge ioremap mapping support.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/book3s/64/radix.h | 3 +++
arch/powerpc/mm/bo
On 11/06/2019 08:44, Michael Neuling wrote:
>
>>> 2:
>>> -BEGIN_FTR_SECTION
>>> - /* POWER9 with disabled DAWR */
>>> + LOAD_REG_ADDR(r11, dawr_force_enable)
>>> + lbz r11, 0(r11)
>>> + cmpdi r11, 0
>>> li r3, H_HARDWARE
>>> - blr
>>> -END_FTR_SECTION_IFCLR(CPU_FTR_DAWR)
On Tue, 2019-06-11 at 08:08 +0200, Christoph Hellwig wrote:
> On Tue, Jun 11, 2019 at 03:56:33PM +1000, Benjamin Herrenschmidt
> wrote:
> > The reason I think it sort-of-mostly-worked is that to get more
> > than
> > 1GB of RAM, those machines use CONFIG_HIGHMEM. And *most* network
> > buffers aren
On 06/11/2019 05:46 AM, Nicholas Piggin wrote:
> Anshuman Khandual's on June 10, 2019 6:53 pm:
>> On 06/10/2019 10:08 AM, Nicholas Piggin wrote:
>>> For platforms that define HAVE_ARCH_HUGE_VMAP, have vmap allow vmalloc to
>>> allocate huge pages and map them.
>>
>> IIUC that extends HAVE_ARCH_HUGE
On Tue, 2019-06-11 at 16:58 +1000, Benjamin Herrenschmidt wrote:
> On Tue, 2019-06-11 at 08:08 +0200, Christoph Hellwig wrote:
> > On Tue, Jun 11, 2019 at 03:56:33PM +1000, Benjamin Herrenschmidt
> > wrote:
> > > The reason I think it sort-of-mostly-worked is that to get more
> > > than
> > > 1GB o
On Tue, 2019-06-11 at 08:48 +0200, Cédric Le Goater wrote:
> On 11/06/2019 08:44, Michael Neuling wrote:
> > > > 2:
> > > > -BEGIN_FTR_SECTION
> > > > - /* POWER9 with disabled DAWR */
> > > > + LOAD_REG_ADDR(r11, dawr_force_enable)
> > > > + lbz r11, 0(r11)
> > > > + c
https://bugzilla.kernel.org/show_bug.cgi?id=203839
--- Comment #8 from Christophe Leroy (christophe.le...@c-s.fr) ---
Argh !
CONFIG_SMP must (again) be the reason we missed it.
Can you please try the change below ?
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index
Le 11/06/2019 à 09:24, Michael Neuling a écrit :
On Tue, 2019-06-11 at 08:48 +0200, Cédric Le Goater wrote:
On 11/06/2019 08:44, Michael Neuling wrote:
2:
-BEGIN_FTR_SECTION
- /* POWER9 with disabled DAWR */
+ LOAD_REG_ADDR(r11, dawr_force_enable)
+ lbz r11, 0(r11)
+
On Tue, Jun 11, 2019 at 04:58:12PM +1000, Benjamin Herrenschmidt wrote:
> ... which b43legacy doesn't set to the best of my knowledge ...
>
> Which makes me wonder how come it didn't work even with your patches ?
> AFAIK, we have less than 1GB of lowmem unless the config has been
> tweaked
I
On Tue, Jun 11, 2019 at 04:59:54PM +1000, Benjamin Herrenschmidt wrote:
> Ah stupid me ... it's dma_set_mask that failed, since it has no idea
> that the calling driver is limited to lowmem.
>
> That's also why the "wrong" patch worked.
>
> So yes, a ZONE_DMA at 30-bits will work, though it's som
On Tue, 11 Jun 2019 at 07:51, Naoya Horiguchi wrote:
>
> On Wed, May 29, 2019 at 04:31:01PM -0700, Mike Kravetz wrote:
> > On 5/28/19 2:49 AM, Wanpeng Li wrote:
> > > Cc Paolo,
> > > Hi all,
> > > On Wed, 14 Feb 2018 at 06:34, Mike Kravetz
> > > wrote:
> > >>
> > >> On 02/12/2018 06:48 PM, Micha
On Tue, 2019-06-11 at 09:54 +0200, Christoph Hellwig wrote:
> On Tue, Jun 11, 2019 at 04:59:54PM +1000, Benjamin Herrenschmidt
> wrote:
> > Ah stupid me ... it's dma_set_mask that failed, since it has no
> > idea
> > that the calling driver is limited to lowmem.
> >
> > That's also why the "wrong"
Hi Dan,
Any feedback on this?
A change I would like to get done on top of this series is
+ if (__le16_to_cpu(pfn_sb->version_minor) < 3) {
+ /*
+* For a large part we use PAGE_SIZE. But we
+* do have some accounting code using SZ_4K.
+
On Tue, 2019-06-11 at 09:51 +0200, Christophe Leroy wrote:
>
> Le 11/06/2019 à 09:24, Michael Neuling a écrit :
> > On Tue, 2019-06-11 at 08:48 +0200, Cédric Le Goater wrote:
> > > On 11/06/2019 08:44, Michael Neuling wrote:
> > > > > > 2:
> > > > > > -BEGIN_FTR_SECTION
> > > > > > - /* POWER9
https://bugzilla.kernel.org/show_bug.cgi?id=203839
--- Comment #9 from Erhard F. (erhar...@mailbox.org) ---
(In reply to Christophe Leroy from comment #8)
> Argh !
>
> CONFIG_SMP must (again) be the reason we missed it.
>
> Can you please try the change below ?
Applied your change on top of 5.2-
On Tue 04-06-19 14:43:54, Aneesh Kumar K.V wrote:
> This is needed so that we don't wrongly initialize a namespace
> which doesn't have enough space reserved for holding struct pages
> with the current kernel.
>
> We also increment PFN_MIN_VERSION to make sure that older kernel
> won't initialize
On 6/6/2019 2:31 PM, Christophe Leroy wrote:
> commit d84cc9c9524e ("crypto: talitos - fix ECB algs ivsize")
> wrongly modified CBC algs ivsize instead of ECB aggs ivsize.
>
> This restore the CBC algs original ivsize of removes ECB's ones.
>
> Signed-off-by: Christophe Leroy
> Fixes: d84cc9c952
On 6/6/2019 2:31 PM, Christophe Leroy wrote:
> Next patch will require struct talitos_edesc to be defined
> earlier in talitos.c
>
> This patch moves it into talitos.h so that it can be used
> from any place in talitos.c
>
> Fixes: 37b5e8897eb5 ("crypto: talitos - chain in buffered data for ahash
On 6/6/2019 2:31 PM, Christophe Leroy wrote:
> This series is the last set of fixes for the Talitos driver.
>
> We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
> SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
>
I get failures, probably due to patch 1/5:
alg:
Hello POWER developers,
I'm trying to find out if there is an internal kernel API so that a
PCI driver can call it to check if its PCI device is running inside a
POWER9 machine. Alternatively, if that's not available, if it is
running on a machine with powerpc architecture.
I need this informatio
Le 11/06/2019 à 13:57, Horia Geanta a écrit :
On 6/6/2019 2:31 PM, Christophe Leroy wrote:
Next patch will require struct talitos_edesc to be defined
earlier in talitos.c
This patch moves it into talitos.h so that it can be used
from any place in talitos.c
Fixes: 37b5e8897eb5 ("crypto: tali
On 6/11/2019 3:38 PM, Christophe Leroy wrote:
>
>
> Le 11/06/2019 à 13:57, Horia Geanta a écrit :
>> On 6/6/2019 2:31 PM, Christophe Leroy wrote:
>>> Next patch will require struct talitos_edesc to be defined
>>> earlier in talitos.c
>>>
>>> This patch moves it into talitos.h so that it can be us
Le 11/06/2019 à 13:52, Horia Geanta a écrit :
On 6/6/2019 2:31 PM, Christophe Leroy wrote:
commit d84cc9c9524e ("crypto: talitos - fix ECB algs ivsize")
wrongly modified CBC algs ivsize instead of ECB aggs ivsize.
This restore the CBC algs original ivsize of removes ECB's ones.
Signed-off-b
On Tue, Jun 11, 2019 at 03:30:08PM +0300, Oded Gabbay wrote:
> Hello POWER developers,
>
> I'm trying to find out if there is an internal kernel API so that a
> PCI driver can call it to check if its PCI device is running inside a
> POWER9 machine. Alternatively, if that's not available, if it is
By convention, all lines should be separated by a semicolons. Last line
should have neither semicolon or line wrap.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 36 ++---
arch/powerpc/include/asm/head-64.h | 68 +++
This is another revision of the previous series rebased to upstream,
fixes, additions, and more testing.
Code changes were tested mostly with ppc64le_defconfig config, diffing
head_64.o from each build.
Most patches cause no changes to generated code, though a few at the
end make significant chan
Replace all instances of this with gas macros that test the hsrr
parameter and use the appropriate register names / labels.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 333 +--
arch/powerpc/include/asm/head-64.h
- Re-name the macros to _REAL and _VIRT suffixes rather than no and
_RELON suffix.
- Move the macro definitions together in the file.
- Move RELOCATABLE ifdef inside the _VIRT macro.
Further consolidation between variants does not buy much here.
No generated code change.
Signed-off-by: Nicho
Rather than pass in the soft-masking and KVM tests via macro that is
passed to another macro to expand it, switch to usig gas macros and
conditionally expand the soft-masking and KVM tests.
The system reset with its idle test is open coded as it is a one-off.
No generated code change.
Signed-off
Switch to a gas macro that conditionally expands the RI clearing
instruction.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 43 ++--
arch/powerpc/kernel/exceptions-64s.S | 12 +++
2 files changed, 17 insertion
The sreset handler KVM test theoretically should not depend on P7.
In practice KVM now only supports P7 and up so no real bug fix, but
this change is made now so the quirk is not propagated through
cleanup patches.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 6 +++--
Conditionally expand the soft-masking test if a mask is passed in.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 113 +--
arch/powerpc/kernel/exceptions-64s.S | 20 ++--
2 files changed, 55 insertions(+), 78 dele
Conditionally expand the skip case if it is specified.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 28 +---
arch/powerpc/include/asm/head-64.h | 8 +++
arch/powerpc/kernel/exceptions-64s.S | 2 +-
3
Move the KVM trap HSRR bit into the KVM handler, which can be
conditionally applied when hsrr parameter is set.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 5 +
arch/powerpc/include/asm/head-64.h | 7 ++-
2 files changed,
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 25
arch/powerpc/kernel/exceptions-64s.S | 24 +++
2 files changed, 25 insertions(+), 24 deletions(-)
diff --git a/arch/powerpc/include/asm/ex
More cases of code insertion via macros that does not add a great
deal. All the additions have to be specified in the macro arguments,
so they can just as well go after the macro.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 42 +++-
The aim is to reduce the amount of indirection it takes to get through
the exception handler macros, particularly where it provides little
code sharing.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 26
arch/powe
Many of these macros just specify 1-4 lines which are only called a
few times each at most, and often just once. Remove this indirection.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 101 ---
arch/powerpc/include/asm
After the previous cleanup, it becomes possible to consolidate some
common code outside the runtime alternate patching. Also remove
unused labels.
This results in some code change, but unchanged runtime instruction
sequence.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 113 ---
1 file changed, 57 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h
b/arch/powerpc/include/asm/exception-64s.h
index 0bb0310b
These are only called in one place each.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 22 --
arch/powerpc/include/asm/head-64.h | 19 +--
2 files changed, 17 insertions(+), 24 deletions(-)
diff
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 40 +---
1 file changed, 21 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h
b/arch/powerpc/include/asm/exception-64s.h
index 73705421
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 430 --
arch/powerpc/kernel/exceptions-64s.S | 431 +++
2 files changed, 431 insertions(+), 430 deletions(-)
diff --git a/arch/powerpc/include/asm/
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 1 -
arch/powerpc/include/asm/head-64.h | 252 ---
arch/powerpc/kernel/exceptions-64s.S | 251 ++
3 files changed, 251 insertions(+), 253 de
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 43
1 file changed, 18 insertions(+), 25 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index 013abf3ea6f6..8a
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 127 ---
1 file changed, 55 insertions(+), 72 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index 8a65ae64ed54..1c
Generally, macros that result in instructions being expanded are
indented by a tab, and those that don't have no indent. Fix the
obvious cases that go contrary to style.
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 92 ++
No generated code change.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 29 +++-
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index a0721c3fc097..ce
The bad stack test in interrupt handlers has a few problems. For
performance it is taken in the common case, which is a fetch bubble
and a waste of i-cache.
For code development and maintainence, it requires yet another stack
frame setup routine, and that constrains all exception handlers to
follo
No generated code change. File is change is in bug table line numbers.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 97 +---
1 file changed, 45 insertions(+), 52 deletions(-)
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/k
No generated code change. File is change is in bug table line numbers.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 17 +++--
arch/powerpc/kernel/exceptions-64s.S | 22 ++
2 files changed, 25 insertions(+), 14 deletions(-)
dif
syscall / hcall entry unnecessarily differs between KVM and non-KVM
builds. Move the SMT priority instruction to the same location
(after INTERRUPT_TO_KERNEL).
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 25 +++--
1 file changed, 7 insertions(+),
Move SPR reads ahead of writes. Real mode entry that is not a KVM
guest is rare these days, but bad practice propagates.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/exceptions-64s.S | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
[3.385197] bus: 'platform': really_probe: probing driver talitos with
device ff02.crypto
[3
Next patch will require struct talitos_edesc to be defined
earlier in talitos.c
This patch moves it into talitos.h so that it can be used
from any place in talitos.c
Fixes: 37b5e8897eb5 ("crypto: talitos - chain in buffered data for ahash on
SEC1")
Cc: sta...@vger.kernel.org
Signed-off-by: Chris
On SEC1, hash provides wrong result when performing hashing in several
steps with input data SG list has more than one element. This was
detected with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
[ 44.185947] alg: hash: md5-talitos test failed (wrong result) on test vector
6, cfg="random: may_sleep use_f
icv_ool is not used anymore, drop it.
Fixes: 9cc87bc3613b ("crypto: talitos - fix AEAD processing")
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 3 ---
drivers/crypto/talitos.h | 2 --
2 files changed, 5 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talit
When building for SEC1 only, talitos2_done functions are unneeded
and should go away.
For this, use has_ftr_sec1() which will always return true when only
SEC1 support is being built, allowing GCC to drop TALITOS2 functions.
Signed-off-by: Christophe Leroy
---
drivers/crypto/talitos.c | 2 +-
1
This will allow sparc64 to override its ADI tags for
get_user_pages and get_user_pages_fast.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/mm/gup.c b/mm/gup.c
index ddde097cf9e4..6bb521db67ec 100644
--- a/mm/gup.c
+++ b/mm/g
Hi Linus and maintainers,
below is a series to switch mips, sh and sparc64 to use the generic
GUP code so that we only have one codebase to touch for further
improvements to this code. I don't have hardware for any of these
architectures, and generally no clue about their page table
management, s
Pass in the already calculated end value instead of recomputing it, and
leave the end > start check in the callers instead of duplicating them
in the arch code.
Signed-off-by: Christoph Hellwig
---
arch/s390/include/asm/pgtable.h | 8 +---
arch/x86/include/asm/pgtable_64.h | 8 +---
The mips code is mostly equivalent to the generic one, minus various
bugfixes and an arch override for gup_fast_permitted.
Note that this defines ARCH_HAS_PTE_SPECIAL for mips as mips has
pte_special and pte_mkspecial implemented and used in the existing
gup code. They are no-op stubs, though whi
The split low/high access is the only non-READ_ONCE version of
gup_get_pte that did show up in the various arch implemenations.
Lift it to common code and drop the ifdef based arch override.
Signed-off-by: Christoph Hellwig
---
arch/x86/Kconfig | 1 +
arch/x86/include/asm/p
sh only had pud_page_vaddr, but not pud_page.
Signed-off-by: Christoph Hellwig
---
arch/sh/include/asm/pgtable-3level.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sh/include/asm/pgtable-3level.h
b/arch/sh/include/asm/pgtable-3level.h
index 7d8587eb65ff..3c7ff20f3f94 100644
--- a/a
The sh code is mostly equivalent to the generic one, minus various
bugfixes and two arch overrides that this patch adds to pgtable.h.
Signed-off-by: Christoph Hellwig
---
arch/sh/Kconfig | 2 +
arch/sh/include/asm/pgtable.h | 37 +
arch/sh/mm/Makefile | 2 +-
arc
sparc64 only had pgd_page_vaddr, but not pgd_page.
Signed-off-by: Christoph Hellwig
---
arch/sparc/include/asm/pgtable_64.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/sparc/include/asm/pgtable_64.h
b/arch/sparc/include/asm/pgtable_64.h
index 22500c3be7a9..f0dcf991d27f 100644
--- a
Add a helper to untag a user pointer. This is needed for ADI support
in get_user_pages_fast.
Signed-off-by: Christoph Hellwig
---
arch/sparc/include/asm/pgtable_64.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/sparc/include/asm/pgtable_64.h
b/arch/sparc/inc
The sparc64 code is mostly equivalent to the generic one, minus various
bugfixes and two arch overrides that this patch adds to pgtable.h.
Signed-off-by: Christoph Hellwig
---
arch/sparc/Kconfig | 1 +
arch/sparc/include/asm/pgtable_64.h | 18 ++
arch/sparc/mm/Makefile
We only support the generic GUP now, so rename the config option to
be more clear, and always use the mm/Kconfig definition of the
symbol and select it from the arch Kconfigs.
Signed-off-by: Christoph Hellwig
---
arch/arm/Kconfig | 5 +
arch/arm64/Kconfig | 4 +---
arch/mips/Kconfig
We can only deal with FOLL_WRITE and/or FOLL_LONGTERM in
get_user_pages_fast, so reject all other flags.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/mm/gup.c b/mm/gup.c
index fe4f205651fd..78dc1871b3d4 100644
--- a/mm/gup.c
+++ b/mm/gup.c
Always build mm/gup.c, and move the nommu versions and replace the
separate stubs for various functions by the default ones, with the _fast
version always falling back to the slow path because gup_fast_permitted
always returns false now if HAVE_FAST_GUP is not set, and we use the
nommu version of _
This applies the overflow fixes from 8fde12ca79aff
("mm: prevent get_user_pages() from overflowing page refcount")
to the powerpc hugepd code and brings it back in sync with the
other GUP cases.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
While only powerpc supports the hugepd case, the code is pretty
generic and I'd like to keep all GUP internals in one place.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/Kconfig | 1 +
arch/powerpc/mm/hugetlbpage.c | 72 --
include/linux/hugetlb.h
All other get_user_page_fast cases mark the page referenced, so do
this here as well.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/mm/gup.c b/mm/gup.c
index 0733674b539d..8bcc042f933a 100644
--- a/mm/gup.c
+++ b/mm/gup.c
@@ -2021,6 +2021,7 @@
Instead of passing a set of always repeated arguments down the
get_user_pages_fast iterators, create a struct gup_args to hold them and
pass that by reference. This leads to an over 100 byte .text size
reduction for x86-64.
Signed-off-by: Christoph Hellwig
---
mm/gup.c | 338 +++
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
> This series is the last set of fixes for the Talitos driver.
>
> We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
> SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
>
I am getting below failures on a sec 3.3.2 (p102
Le 11/06/2019 à 17:37, Horia Geanta a écrit :
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
SEC2 (SEC2.2 on mpc8321E) with CONFIG_CRYPTO_MANAGER_EXTRA_TESTS:
I am
The patch referenced below moved the loading of segment registers
out of load_up_mmu() in order to do it earlier in the boot sequence.
However, the secondary CPU still needs it to be done when loading up
the MMU.
Reported-by: Erhard F.
Fixes: 215b823707ce ("powerpc/32s: set up an early static has
On 6/11/2019 6:40 PM, Christophe Leroy wrote:
>
>
> Le 11/06/2019 à 17:37, Horia Geanta a écrit :
>> On 6/11/2019 5:39 PM, Christophe Leroy wrote:
>>> This series is the last set of fixes for the Talitos driver.
>>>
>>> We now get a fully clean boot on both SEC1 (SEC1.2 on mpc885) and
>>> SEC2 (S
Le 11/06/2019 à 17:47, Christophe Leroy a écrit :
The patch referenced below moved the loading of segment registers
out of load_up_mmu() in order to do it earlier in the boot sequence.
However, the secondary CPU still needs it to be done when loading up
the MMU.
Reported-by: Erhard F.
Fixes:
On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
wrote:
> Sphinx doesn't like orphan documents:
> Documentation/laptops/lg-laptop.rst: WARNING: document isn't included in
> any toctree
> Documentation/laptops/lg-laptop.rst | 2 ++
> diff --git a/Documentation/laptops/lg-la
Em Tue, 11 Jun 2019 19:52:04 +0300
Andy Shevchenko escreveu:
> On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
> wrote:
> > Sphinx doesn't like orphan documents:
>
> > Documentation/laptops/lg-laptop.rst: WARNING: document isn't included
> > in any toctree
>
> > Documentation/l
This patch set, previously named "powerpc: Enabling secure boot on powernv
systems - Part 1", is part of a series that implements secure boot on
PowerNV systems.
In order to verify the OS kernel on PowerNV, secure boot requires X.509
certificates trusted by the platform, the secure boot modes, and
From: Claudio Carvalho
The X.509 certificates trusted by the platform and other information
required to secure boot the OS kernel are wrapped in secure variables,
which are controlled by OPAL.
This patch adds support to read OPAL secure variables through
OPAL_SECVAR_GET call. It returns the meta
PowerNV secure boot relies on the kernel IMA security subsystem to
perform the OS kernel image signature verification. Since each secure
boot mode has different IMA policy requirements, dynamic definition of
the policy rules based on the runtime secure boot mode of the system is
required. On system
PowerNV secure boot defines different IMA policies based on the secure
boot state of the system.
This patch defines a function to detect the secure boot state of the
system.
Signed-off-by: Nayna Jain
---
arch/powerpc/include/asm/secboot.h | 21
arch/powerpc/platforms/powernv/Make
On 06/11/2019 01:19 AM, Satheesh Rajendran wrote:
On Mon, Jun 10, 2019 at 04:33:57PM -0400, Nayna Jain wrote:
PowerNV secure boot relies on the kernel IMA security subsystem to
perform the OS kernel image signature verification. Since each secure
boot mode has different IMA policy requirement
Le 11/06/2019 à 18:30, Horia Geanta a écrit :
On 6/11/2019 6:40 PM, Christophe Leroy wrote:
Le 11/06/2019 à 17:37, Horia Geanta a écrit :
On 6/11/2019 5:39 PM, Christophe Leroy wrote:
This series is the last set of fixes for the Talitos driver.
We now get a fully clean boot on both SEC1
On Tue, Jun 11, 2019 at 5:07 PM Christoph Hellwig wrote:
>
> On Tue, Jun 11, 2019 at 03:30:08PM +0300, Oded Gabbay wrote:
> > Hello POWER developers,
> >
> > I'm trying to find out if there is an internal kernel API so that a
> > PCI driver can call it to check if its PCI device is running inside
On Tue, Jun 11, 2019 at 8:03 PM Oded Gabbay wrote:
>
> On Tue, Jun 11, 2019 at 6:26 PM Greg KH wrote:
> >
> > On Tue, Jun 11, 2019 at 08:17:53AM -0700, Christoph Hellwig wrote:
> > > On Tue, Jun 11, 2019 at 11:58:57AM +0200, Greg KH wrote:
> > > > That feels like a big hack. ppc doesn't have any
On Tue, 2019-06-11 at 10:44 +0530, Anshuman Khandual wrote:
>
> On 06/10/2019 08:57 PM, Leonardo Bras wrote:
> > On Mon, 2019-06-10 at 08:09 +0530, Anshuman Khandual wrote:
> > > > > +/*
> > > > > + * To be potentially processing a kprobe fault and to be allowed
> > > > > + * to call k
On Jun 10 2019, Larry Finger wrote:
> I do not understand why the if statement returns true as neither of the
> values is zero.
That's because the format string does not make any sense. You are
printing garbage.
> diff --git a/kernel/dma/mapping.c b/kernel/dma/mapping.c
> index f7afdad..ba2489
When calling debugfs functions, there is no need to ever check the
return value. The function can work or not, but the code logic should
never do something different based on this.
Because there's no need to check, also make the return value of the
local debugfs_create_io_x64() call void, as no o
On Tue, Jun 11, 2019 at 8:05 PM Mauro Carvalho Chehab
wrote:
>
> Em Tue, 11 Jun 2019 19:52:04 +0300
> Andy Shevchenko escreveu:
>
> > On Fri, Jun 7, 2019 at 10:04 PM Mauro Carvalho Chehab
> > wrote:
> > > Sphinx doesn't like orphan documents:
> >
> > > Documentation/laptops/lg-laptop.rst: WA
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> This will allow sparc64 to override its ADI tags for
> get_user_pages and get_user_pages_fast.
>
> Signed-off-by: Christoph Hellwig
> ---
Commit message is sparc64 specific but the goal here is to allow any
architecture with memory tagging to use th
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> Add a helper to untag a user pointer. This is needed for ADI support
> in get_user_pages_fast.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/sparc/include/asm/pgtable_64.h | 22 ++
> 1 file changed, 22 insertions(+)
Looks g
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> The sparc64 code is mostly equivalent to the generic one, minus various
> bugfixes and two arch overrides that this patch adds to pgtable.h.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/sparc/Kconfig | 1 +
> arch/sparc/inclu
On 6/11/19 8:40 AM, Christoph Hellwig wrote:
> We only support the generic GUP now, so rename the config option to
> be more clear, and always use the mm/Kconfig definition of the
> symbol and select it from the arch Kconfigs.
>
> Signed-off-by: Christoph Hellwig
> ---
> arch/arm/Kconfig | 5
https://bugzilla.kernel.org/show_bug.cgi?id=203837
--- Comment #4 from Shawn Anastasio (sh...@anastas.io) ---
I have applied Nick's patchset to 5.1.7 but the issue still occurs.
As for using pdbg, I'm aware of the tool's existence but I'm not sure how
I would effectively use it to diagnose this i
On 6/11/19 1:05 AM, Christoph Hellwig wrote:
On Mon, Jun 10, 2019 at 11:09:47AM -0500, Larry Finger wrote:
What might be confusing in your output is that dev->dma_mask is a pointer,
and we are setting it in dma_set_mask. That is before we only check
if the pointer is set, and later we override
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