Hi Dan,
"Aneesh Kumar K.V" writes:
> On 5/17/19 8:19 PM, Vaibhav Jain wrote:
>> Hi Aneesh,
>>
>>
>>> + /*
>>> +* Check whether the we support the alignment. For Dax if the
>>> +* superblock alignment is not matching, we won't initialize
>>> +* the device.
>>> +*/
>>>
On Sun, May 19, 2019 at 1:55 AM Aneesh Kumar K.V
wrote:
>
>
> Hi Dan,
>
> "Aneesh Kumar K.V" writes:
>
> > On 5/17/19 8:19 PM, Vaibhav Jain wrote:
> >> Hi Aneesh,
> >>
>
>
>
> >>
> >>> + /*
> >>> +* Check whether the we support the alignment. For Dax if the
> >>> +* superblock alig
The pull request you sent on Sat, 18 May 2019 21:12:54 +1000:
> https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
> tags/powerpc-5.2-2
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/86a78a8b8d0414455c2174852968ce54205add82
Thank you!
--
Deet-doot-do
https://bugzilla.kernel.org/show_bug.cgi?id=203647
Bug ID: 203647
Summary: Locking API testsuite fails "mixed
read-lock/lock-write ABBA" rlock on kernels >=4.14.x
Product: Platform Specific/Hardware
Version: 2.5
Kernel Version: 5
https://bugzilla.kernel.org/show_bug.cgi?id=203647
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https://bugzilla.kernel.org/show_bug.cgi?id=203597
Erhard F. (erhar...@mailbox.org) changed:
What|Removed |Added
Status|NEW |RESOLVED
Resol
Hi!
> +
> +struct rcpm {
> + unsigned int wakeup_cells;
> + void __iomem *ippdexpcr_base;
> + boollittle_endian;
> +};
Inconsistent whitespace
> +static int rcpm_pm_prepare(struct device *dev)
> +{
> + struct device_node *np = dev->of_node;
> + struct wakeup_source *ws;
> --- a/include/linux/pm_wakeup.h
> @@ -70,6 +71,7 @@ struct wakeup_source {
> unsigned long wakeup_count;
> boolactive:1;
> boolautosleep_enabled:1;
> + struct device *attached_dev;
> };
>
> #ifdef CONFIG_PM_SLEEP
You
On 18/5/19 12:20 am, Frederic Barrat wrote:
If we couldn't fully init a context, we were leaking memory.
Fixes: b9721d275cc2 ("ocxl: Allow external drivers to use OpenCAPI contexts")
Signed-off-by: Frederic Barrat
Acked-by: Andrew Donnellan
---
drivers/misc/ocxl/context.c | 1 +
1 file
https://bugzilla.kernel.org/show_bug.cgi?id=203597
Michael Ellerman (mich...@ellerman.id.au) changed:
What|Removed |Added
Status|RESOLVED|CLOSED
Daniel Axtens writes:
> The kernel self-tests picked up an issue with CTR mode:
> alg: skcipher: p8_aes_ctr encryption test failed (wrong result) on test
> vector 3, cfg="uneven misaligned splits, may sleep"
>
> Test vector 3 has an IV of FFFD, so
> after 3 increments
Bharata B Rao writes:
> On Thu, May 16, 2019 at 07:44:20PM +0530, srikanth wrote:
>> Hello,
>>
>> On power9 host, performing memory hotunplug from ppc64le guest results in
>> kernel oops.
>>
>> Kernel used : https://github.com/torvalds/linux/tree/v5.1 built using
>> ppc64le_defconfig for host an
Hi Pavel,
On Monday, May 20, 2019 05:35, Pavel Machek wrote:
>
> > --- a/include/linux/pm_wakeup.h
>
> > @@ -70,6 +71,7 @@ struct wakeup_source {
> > unsigned long wakeup_count;
> > boolactive:1;
> > boolautosleep_enabled:1;
> > + s
I just thought it was a good idea to scan builtin.modules in the name
uniqueness checking, but Stephen reported a false positive.
ppc64_defconfig produces:
warning: same basename if the following are built as modules:
arch/powerpc/platforms/powermac/nvram.ko
drivers/char/nvram.ko
...,
On Mon, May 20, 2019 at 12:02:23PM +1000, Michael Ellerman wrote:
> Bharata B Rao writes:
> > On Thu, May 16, 2019 at 07:44:20PM +0530, srikanth wrote:
> >> Hello,
> >>
> >> On power9 host, performing memory hotunplug from ppc64le guest results in
> >> kernel oops.
> >>
> >> Kernel used : https:
Bharata B Rao's on May 20, 2019 2:25 pm:
> On Mon, May 20, 2019 at 12:02:23PM +1000, Michael Ellerman wrote:
>> Bharata B Rao writes:
>> > On Thu, May 16, 2019 at 07:44:20PM +0530, srikanth wrote:
>> >> Hello,
>> >>
>> >> On power9 host, performing memory hotunplug from ppc64le guest results in
>
On Mon, May 20, 2019 at 02:48:35PM +1000, Nicholas Piggin wrote:
> >> > git bisect points to
> >> >
> >> > commit 4231aba000f5a4583dd9f67057aadb68c3eca99d
> >> > Author: Nicholas Piggin
> >> > Date: Fri Jul 27 21:48:17 2018 +1000
> >> >
> >> > powerpc/64s: Fix page table fragment refcount ra
Hi all,
asm-generic/ptrace.h is a little weird in that it doesn't actually
implement any functionality, but it provided multiple layers of macros
that just implement trivial inline functions. We implement those
directly in the few architectures and be off with a much simpler
design.
Changes sinc
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.
Note that only the helpers actually used are implemented now.
Signed-off-by: Christoph Hellwig
Acked-by: Catalin Marinas
---
arch/arm64/include/asm/ptrace.h | 31 +
Due to the INTA is shared with the active-low PHY2 interrupt on P1010RDB-PA
board, so configure P1010RDB-PA's INTA with polarity as active-low, the
P1010RDB-PB board is used separately, so configure P1010RDB-PB's INTA with
polarity as active-high.
The INTX in P1010RDB-PB do not work because of the
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.
Note that only the helpers actually used are implemented now.
Signed-off-by: Christoph Hellwig
---
arch/powerpc/include/asm/ptrace.h | 29 ++---
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.
Note that only the helpers actually used are implemented now.
Signed-off-by: Christoph Hellwig
---
arch/sh/include/asm/ptrace.h | 29 +
1 fi
Doing the indirection through macros for the regs accessors just
makes them harder to read, so implement the helpers directly.
Note that only the helpers actually used are implemented now.
Signed-off-by: Christoph Hellwig
Acked-by: Ingo Molnar
---
arch/x86/include/asm/ptrace.h | 30 +++
No one is using this header anymore.
Signed-off-by: Christoph Hellwig
Acked-by: Arnd Bergmann
---
MAINTAINERS| 1 -
arch/mips/include/asm/ptrace.h | 5 ---
include/asm-generic/ptrace.h | 74 --
3 files changed, 80 deletions(-)
delete mode
On 04/05/2019 06:16, Daniel Jordan wrote:
> locked_vm accounting is done roughly the same way in five places, so
> unify them in a helper. Standardize the debug prints, which vary
> slightly.
And I rather liked that prints were different and tell precisely which
one of three each printk is.
I
Hi all,
As PowerNV moves towards secure boot, we need a place to put secure
variables. One option that has been canvassed is to make our secure
variables look like EFI variables. This is an early sketch of another
approach where we create a generic firmware variable file system,
fwvarfs, and an OP
I'm building a generic firmware variable filesystem on top of kernfs
and I'd like to be able to create and unlink files.
The hooks are fairly straightforward. create() returns a kernfs_node*,
which is safe with regards to cleanup on error paths, because there
is no way that things can fail after t
Sometimes it is helpful to be able to access firmware variables as
file, like efivarfs, but not all firmware is EFI. Create a framework
that allows generic access to firmware variables exposed by a
implementations of a simple backend API.
Add a demonstration memory-based backend.
Signed-off-by: D
Add a read-only EFI backend. This does not rely on efivarfs at all
(although it does borrow heavily from the code).
It only supports reading the variables, but it supports the same
format as efivarfs so tools like efivar continue to work if you
mount this filesystem in the same place.
Two small q
From: Claudio Carvalho
[dja: this is a WIP version - a new version is coming that changes
the interface. I also had to renumber the opal calls to get this
to apply. Basically, this is an illustration of the concept: more
work would be required to get this to actually function.]
The X.509 certifi
Replace it with a generic API.
Compile tested only.
Signed-off-by: Daniel Axtens
---
arch/powerpc/include/asm/opal-secvar.h | 58 +++
arch/powerpc/platforms/Kconfig | 3 -
arch/powerpc/platforms/powernv/Kconfig | 5 +-
arch/powerpc/platforms/powernv/opal-s
COMPILE TESTED ONLY.
mount -t fwvarfs opal_secvar /fw
Signed-off-by: Daniel Axtens
---
Documentation/filesystems/fwvarfs.txt | 3 +
fs/fwvarfs/Kconfig| 11 ++
fs/fwvarfs/Makefile | 1 +
fs/fwvarfs/fwvarfs.c | 3 +
fs/fwvarfs/fwvarfs.
On Sat, May 18, 2019 at 11:25:21AM -0300, Claudio Carvalho wrote:
> From: Ram Pai
>
> When the ultravisor firmware is available, it takes control over the
> LDBAR register. In this case, thread-imc updates and save/restore
> operations on the LDBAR register are handled by ultravisor.
>
> Signed-
On Sat, May 18, 2019 at 11:25:22AM -0300, Claudio Carvalho wrote:
> From: Sukadev Bhattiprolu
>
> All hcalls from a secure VM go to the ultravisor from where they are
> reflected into the HV. When we (HV) complete processing such hcalls,
> we should return to the UV rather than to the guest kerne
On Sat, May 18, 2019 at 11:25:23AM -0300, Claudio Carvalho wrote:
> From: Paul Mackerras
>
> - Pass SRR1 in r11 for UV_RETURN because SRR0 and SRR1 get set by
> the sc 2 instruction. (Note r3 - r10 potentially have hcall return
> values in them.)
>
> - Fix kvmppc_msr_interrupt to preserve th
Hi Pavel,
On Monday, May 20, 2019 05:39, Pavel Machek wrote:
>
> Hi!
>
>
> > +
> > +struct rcpm {
> > + unsigned int wakeup_cells;
> > + void __iomem *ippdexpcr_base;
> > + boollittle_endian;
> > +};
>
> Inconsistent whitespace
OK, will make them aligned.
>
> > +static int rcpm_pm
Le 20/05/2019 à 03:45, Andrew Donnellan a écrit :
On 18/5/19 12:20 am, Frederic Barrat wrote:
If we couldn't fully init a context, we were leaking memory.
Fixes: b9721d275cc2 ("ocxl: Allow external drivers to use OpenCAPI
contexts")
Signed-off-by: Frederic Barrat
Acked-by: Andrew Donnel
By default, QorIQ SoC's RCPM register block is Big Endian. But
there are some exceptions, such as LS1088A and LS2088A, are Little
Endian. So add this optional property to help identify them.
Actually LS2021A and other Layerscapes won't totally follow Chassis
2.1, so separate them from powerpc SoC.
Some user might want to go through all registered wakeup sources
and doing things accordingly. For example, SoC PM driver might need to
do HW programming to prevent powering down specific IP which wakeup
source depending on. And is user's responsibility to identify if this
wakeup source he is inter
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