When running the rfi_flush test, if the system is loaded, we see two
issues:
1. The L1d misses when rfi_flush is disabled increase significantly due
to other workloads interfering with the cache.
2. The L1d misses when rfi_flush is enabled sometimes goes slightly
below the expected number of misses
This patch provides support to disable and enable platform specific
sensor groups like performance, utilization and frequency which are
currently not supported in hwmon.
Signed-off-by: Shilpasri G Bhat
---
Changes from V1:
- As per Michael Ellerman's suggestion, adding the "enable" files to debug
Extract error information from rx and tx buffer descriptors,
and update error counters.
Signed-off-by: Mathias Thore
---
drivers/net/wan/fsl_ucc_hdlc.c | 51 +-
include/soc/fsl/qe/ucc_fast.h | 8 +-
2 files changed, 51 insertions(+), 8 deletions(-)
diff --g
Remove managed_page_count_lock spinlock and instead use atomic
variables.
Suggested-by: Michal Hocko
Suggested-by: Vlastimil Babka
Signed-off-by: Arun KS
---
As discussed here,
https://patchwork.kernel.org/patch/10627521/#22261253
---
---
arch/csky/mm/init.c | 4 +-
On Mon 22-10-18 22:53:22, Arun KS wrote:
> Remove managed_page_count_lock spinlock and instead use atomic
> variables.
I assume this has been auto-generated. If yes, it would be better to
mention the script so that people can review it and regenerate for
comparision. Such a large change is hard to
On Mon, 2018-10-22 at 22:53 +0530, Arun KS wrote:
> Remove managed_page_count_lock spinlock and instead use atomic
> variables.
Perhaps better to define and use macros for the accesses
instead of specific uses of atomic_long_
Something like:
#define totalram_pages()(unsigned
long)atomic
On Mon, Oct 22, 2018 at 11:41 PM Michal Hocko wrote:
>
> On Mon 22-10-18 22:53:22, Arun KS wrote:
> > Remove managed_page_count_lock spinlock and instead use atomic
> > variables.
>
Hello Michal,
> I assume this has been auto-generated. If yes, it would be better to
> mention the script so that p
Arun KS writes:
> Remove managed_page_count_lock spinlock and instead use atomic
> variables.
>
> Suggested-by: Michal Hocko
> Suggested-by: Vlastimil Babka
> Signed-off-by: Arun KS
>
> ---
> As discussed here,
> https://patchwork.kernel.org/patch/10627521/#22261253
My 2 cents. I think you s
On 2018-10-23 09:45, Joe Perches wrote:
On Mon, 2018-10-22 at 22:53 +0530, Arun KS wrote:
Remove managed_page_count_lock spinlock and instead use atomic
variables.
Hello Joe,
Perhaps better to define and use macros for the accesses
instead of specific uses of atomic_long_
Something like:
Add byte queue limits support in the fsl_ucc_hdlc driver.
Signed-off-by: Mathias Thore
---
Note that this patch is created relative to another patch that was
applied recently: net/wan/fsl_ucc_hdlc: error counters
drivers/net/wan/fsl_ucc_hdlc.c | 8
1 file changed, 8 insertions(+)
dif
On Mon, Oct 8, 2018 at 9:01 PM Maksym Kokhan
wrote:
>
> Hi, Daniel
>
> On Sat, Sep 29, 2018 at 9:17 PM wrote:
> >
> > On Thu, Sep 27, 2018 at 07:55:08PM +0300, Maksym Kokhan wrote:
> > > Daniel Walker (7):
> > > add generic builtin command line
> > > drivers: of: ifdef out cmdline section
> >
On Tue, Oct 23, 2018 at 05:43:18PM +0300, Maksym Kokhan wrote:
> We still have no response to patches for x86, arm, arm64 and powerpc.
> Is current generic command line implementation appropriate for these
> architectures?
> Is it possible to merge these patches in the current form (for x86,
> arm,
Breno Leitao a écrit :
Function huge_ptep_set_access_flags() has the 'extern' keyword in the
function definition and also in the function declaration. This causes a
warning in 'sparse' since the 'extern' storage class should be used only on
symbol declarations.
arch/powerpc/mm/pgtable.c:232:1
SPI (and others) has a way to define bus number in a aliases:
aliases {
ethernet4 = &enet4;
ethernet0 = &enet0;
ethernet1 = &enet1;
ethernet2 = &enet2;
ethernet3 = &enet3;
spi0 = &spi0
};
On Mon, Oct 22, 2018 at 06:16:26PM -0300, Breno Leitao wrote:
> Test ptrace-tm-spd-gpr fails on current kernel (4.19) due to a segmentation
> fault that happens on the child process prior to setting cptr[2] = 1. This
> causes the parent process to wait forever at 'while (!pptr[2])' and the test
>
On 10/23/18 9:49 AM, Joakim Tjernlund wrote:
> SPI (and others) has a way to define bus number in a aliases:
> aliases {
> ethernet4 = &enet4;
> ethernet0 = &enet0;
> ethernet1 = &enet1;
> ethernet2 = &enet2;
> ethernet3 =
On Tue, Oct 23, 2018 at 04:49:59PM +, Joakim Tjernlund wrote:
> SPI (and others) has a way to define bus number in a aliases:
> aliases {
> ethernet4 = &enet4;
> ethernet0 = &enet0;
> ethernet1 = &enet1;
> ethernet2 = &enet2;
>
From: Mathias Thore
Date: Tue, 23 Oct 2018 13:48:32 +0200
> Add byte queue limits support in the fsl_ucc_hdlc driver.
>
> Signed-off-by: Mathias Thore
> ---
>
> Note that this patch is created relative to another patch that was
> applied recently: net/wan/fsl_ucc_hdlc: error counters
net-next
On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> CAUTION: This email originated from outside of the organization. Do not click
> links or open attachments unless you recognize the sender and know the
> content is safe.
>
>
> On 10/23/18 9:49 AM, Joakim Tjernlund wrote:
> > SPI (and
On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
>> CAUTION: This email originated from outside of the organization. Do not
>> click links or open attachments unless you recognize the sender and know the
>> content is safe.
>>
>>
>> On 10/
On Tue, 2018-10-23 at 11:20 -0700, Florian Fainelli wrote:
>
> On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> > On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> > >
> > >
> > > On 10/23/18 9:49 AM, Joakim Tjernlund wrote:
> > > > SPI (and others) has a way to define bus number in a
On 10/23/18 1:02 PM, Joakim Tjernlund wrote:
> On Tue, 2018-10-23 at 11:20 -0700, Florian Fainelli wrote:
>>
>> On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
>>> On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
On 10/23/18 9:49 AM, Joakim Tjernlund wrote:
> SPI (and oth
Some ptrace selftests are passing input operands using a constraint that
can allocate any register for the operand, and using these registers on
load/store operations.
If the register allocated by the compiler happens to be zero (r0), it might
cause an invalid memory address access, since load and
Current core-pkey selftest fails if the test runs without privileges to
write into the core pattern file (/proc/sys/kernel/core_pattern). This
causes the test to fail and give the impression that the subsystem being
tested is broken, when, in fact, the test is being executed without the
proper priv
On 10/23/2018 01:23 PM, Breno Leitao wrote:
> Current core-pkey selftest fails if the test runs without privileges to
> write into the core pattern file (/proc/sys/kernel/core_pattern). This
> causes the test to fail and give the impression that the subsystem being
> tested is broken, when, in fact
On Tue, Oct 23, 2018 at 05:23:16PM -0300, Breno Leitao wrote:
> Some ptrace selftests are passing input operands using a constraint that
> can allocate any register for the operand, and using these registers on
> load/store operations.
>
> If the register allocated by the compiler happens to be ze
On Tue, 2018-10-23 at 13:07 -0700, Florian Fainelli wrote:
>
> On 10/23/18 1:02 PM, Joakim Tjernlund wrote:
> > On Tue, 2018-10-23 at 11:20 -0700, Florian Fainelli wrote:
> > > On 10/23/18 11:02 AM, Joakim Tjernlund wrote:
> > > > On Tue, 2018-10-23 at 10:03 -0700, Florian Fainelli wrote:
> > > >
Add mem-loads/mem-stores events to sysfs.
The event is formed based on raw event encoding.
Primary PMU event used here is PM_MRK_INST_CMPL
along with MMCRA[SM] modes and Thresholding bits
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/perf/power9-events-list.h | 8
arch/powerpc/per
From: Yuantian Tang
Legacy bindings are deleted. So the legacy support in driver
can be deleted safely.
Add more chip-specific compatible as well to support more Socs.
Signed-off-by: Tang Yuantian
---
v2:
- remove all legacy code
drivers/clk/clk-qoriq.c | 159 +++---
From: Yuantian Tang
The new bindings will be used, so delete the old bindings.
Add more SOC compatibles as needed as well.
Signed-off-by: Tang Yuantian
---
v2:
- involve more chips
.../devicetree/bindings/clock/qoriq-clock.txt | 112 +--
1 files changed, 6 insertions(+
From: Scott Wood
The driver retains compatibility with old device trees, but we don't
want the old nodes lying around to be copied, or used as a reference
(some of the mux options are incorrect), or even just being clutter.
We will also need the #clock-cells in the clockgen node in order to
add
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