On 04/07/2018 05:23, Song, HaiyanX wrote:
> Hi Laurent,
>
>
> For the test result on Intel 4s skylake platform (192 CPUs, 768G Memory), the
> below test cases all were run 3 times.
> I check the test results, only page_fault3_thread/enable THP have 6% stddev
> for head commit, other tests have
--
Problem found by experimental coccinelle script
Patch was compiletested with: ppc64_defconfig (implies
CONFIG_PPC_ICP_HV=y)
with sparse warnings though not related to the proposed change
Patch is against 4.18-rc3 (localversion-next is next-20180704)
arch/powerpc/sysdev/xics/icp-hv.c | 1
Hi Murilo,
Thanks for the review.
On Tue, Jul 03, 2018 at 02:53:46PM -0300, Murilo Opsfelder Araujo wrote:
[..snip..]
> > -/* Initialize CPU <=> thread mapping/
> > + if (has_interleaved_big_core) {
> > + int key = __builtin_ctzl(CPU_FTR_ASYM_SMT);
> > +
> > + cur_c
This adds support for emitting special sections such as initcall arrays,
PCI fixups and tracepoints as relative references rather than absolute
references. This reduces the size by 50% on 64-bit architectures, but
more importantly, it removes the need for carrying relocation metadata
for these sect
Before updating certain subsystems to use place relative 32-bit
relocations in special sections, to save space and reduce the
number of absolute relocations that need to be processed at runtime
by relocatable kernels, introduce the Kconfig symbol and define it
for some architectures that should be
To allow existing C code to be incorporated into the decompressor or
the UEFI stub, introduce a CPP macro that turns all EXPORT_SYMBOL_xxx
declarations into nops, and #define it in places where such exports
are undesirable. Note that this gets rid of a rather dodgy redefine
of linux/export.h's head
An ordinary arm64 defconfig build has ~64 KB worth of __ksymtab
entries, each consisting of two 64-bit fields containing absolute
references, to the symbol itself and to a char array containing
its name, respectively.
When we build the same configuration with KASLR enabled, we end
up with an addit
Allow the initcall tables to be emitted using relative references that
are only half the size on 64-bit architectures and don't require fixups
at runtime on relocatable kernels.
Acked-by: James Morris
Acked-by: Sergey Senozhatsky
Acked-by: Petr Mladek
Acked-by: Michael Ellerman
Acked-by: Ingo
Allow the PCI quirk tables to be emitted in a way that avoids absolute
references to the hook functions. This reduces the size of the entries,
and, more importantly, makes them invariant under runtime relocation
(e.g., for KASLR)
Acked-by: Bjorn Helgaas
Acked-by: Michael Ellerman
Acked-by: Ingo
To avoid the need for relocating absolute references to tracepoint
structures at boot time when running relocatable kernels (which may
take a disproportionate amount of space), add the option to emit
these tables as relative references instead.
Acked-by: Michael Ellerman
Acked-by: Ingo Molnar
Ac
This patch series adds new attribute to enable or disable a sensor in
runtime.
v1 : https://lkml.org/lkml/2018/3/22/214
Shilpasri G Bhat (2):
powernv:opal-sensor-groups: Add support to enable sensor groups
hwmon: ibmpowernv: Add attributes to enable/disable sensor groups
Documentation/hwmon
Adds support to enable/disable a sensor group at runtime. This
can be used to select the sensor groups that needs to be copied to
main memory by OCC. Sensor groups like power, temperature, current,
voltage, frequency, utilization can be enabled/disabled at runtime.
Signed-off-by: Shilpasri G Bhat
On-Chip-Controller(OCC) is an embedded micro-processor in POWER9 chip
which measures various system and chip level sensors. These sensors
comprises of environmental sensors (like power, temperature, current
and voltage) and performance sensors (like utilization, frequency).
All these sensors are co
Hello Murilo,
Thanks for reviewing the patch. Replies inline.
On Tue, Jul 03, 2018 at 02:16:55PM -0300, Murilo Opsfelder Araujo wrote:
> On Tue, Jul 03, 2018 at 04:33:50PM +0530, Gautham R. Shenoy wrote:
> > From: "Gautham R. Shenoy"
> >
> > On IBM POWER9, the device tree exposes a property arr
On Wednesday, July 4, 2018 6:40:09 AM CEST Pingfan Liu wrote:
> On Tue, Jul 3, 2018 at 10:28 PM Rafael J. Wysocki wrote:
> >
> > On Tuesday, July 3, 2018 8:50:41 AM CEST Pingfan Liu wrote:
> > > Clean up the referring to the code in commit 52cdbdd49853 ("driver core:
> > > correct device's shutdow
On Wednesday, July 4, 2018 4:47:07 AM CEST Pingfan Liu wrote:
> On Tue, Jul 3, 2018 at 10:36 PM Rafael J. Wysocki wrote:
> >
> > On Tuesday, July 3, 2018 8:50:38 AM CEST Pingfan Liu wrote:
> > > commit 52cdbdd49853 ("driver core: correct device's shutdown order")
> > > places an assumption of supp
asm-generic/hugetlb.h proposes generic implementations of hugetlb
related functions: use __HAVE_ARCH_HUGE* defines in order to make arch
specific implementations of hugetlb functions consistent with pgtable.h
scheme.
Signed-off-by: Alexandre Ghiti
---
arch/arm64/include/asm/hugetlb.h | 2 +-
inc
arm, ia64, sh, x86 architectures use the
same version of huge_ptep_get_and_clear, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/as
arm, arm64, mips, parisc, sh, x86 architectures use the
same version of hugetlb_free_pgd_range, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 12 ++--
arch/arm64/include/asm/hugetlb.h | 10 ---
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/asm/hugetlb.h
In order to reduce copy/paste of functions across architectures and then
make riscv hugetlb port simpler and smaller, this patchset intends to
factorize the numerous hugetlb primitives that are defined across all the
architectures.
Except for prepare_hugepage_range, this patchset moves the version
arm, ia64, mips, powerpc, sh, x86 architectures use the
same version of set_huge_pte_at, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/inc
Just discovered my email provider limit of mails per minute, please drop
this serie, I'll send a v2 using --batch-size option of git send-email.
Sorry about that.
On 07/04/2018 07:52 AM, Alexandre Ghiti wrote:
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this
On Tuesday, July 3, 2018 11:20:54 AM CEST Akshay Adiga wrote:
>
> Device-tree parsed multiple time in powernv cpuidle and powernv
> hotplug code.
>
> First to identify supported flags. Second time, to identify deepest_state
> and first deep state. Third time, during cpuidle init to find the avai
Christophe LEROY writes:
> Kernel Oops at 0xc0334d5c for reading at address 0xc2236450 which
> corresponds to r30 + 80
>
> But r30 should contain what's at r3 + 16 that is at 0xc619ec10 so r30
> should be c6236400 as shown below (print_hex_dump(regs->gpr[3]) added at
> end of __die() )
>
> So
Michal Suchánek writes:
> On Tue, 3 Jul 2018 08:08:14 +1000
> Nicholas Piggin wrote:
>> On Mon, 02 Jul 2018 11:17:06 +0530
>> Mahesh J Salgaonkar wrote:
>> > From: Mahesh Salgaonkar
>> >
>> > On pseries, as of today system crashes if we get a machine check
>> > exceptions due to SLB errors. Th
Bharat Bhushan writes:
> Available vector space accounts ipis and timer interrupts
> while spurious vector was not accounted.
OK. What is the symptom of that? Nothing? Total system crash?
Looks like this can be tagged:
Fixes: 0a4081641d72 ("powerpc/mpic: FSL MPIC error interrupt support.")
Wh
On Wed, Jul 04, 2018 at 11:11:59PM +1000, Michael Ellerman wrote:
> Christophe LEROY writes:
>
> > Kernel Oops at 0xc0334d5c for reading at address 0xc2236450 which
> > corresponds to r30 + 80
> >
> > But r30 should contain what's at r3 + 16 that is at 0xc619ec10 so r30
> > should be c6236400 a
Le 04/07/2018 à 15:45, Segher Boessenkool a écrit :
On Wed, Jul 04, 2018 at 11:11:59PM +1000, Michael Ellerman wrote:
Christophe LEROY writes:
Kernel Oops at 0xc0334d5c for reading at address 0xc2236450 which
corresponds to r30 + 80
But r30 should contain what's at r3 + 16 that is at 0xc6
Add suffix ULL to constant 64 in order to give the compiler complete
information about the proper arithmetic to use.
Notice that such constant is used in a context that expects an
expression of type u64 (64 bits, unsigned) and the following
expression is currently being evaluated using 32-bit arit
Hello Vaibhav Jain,
The patch 70b565bbdb91: "cxl: Prevent adapter reset if an active
context exists" from Oct 14, 2016, leads to the following static
checker warning:
drivers/misc/cxl/main.c:290 cxl_adapter_context_get()
warn: 'atomic_inc_unless_negative(&adapter->contexts_num)' i
Function atomic_inc_unless_negative() returns a bool to indicate
success/failure. However cxl_adapter_context_get() wrongly compares
the return value against '>=0' which will always be true. The patch
fixes this comparison to '==0' there by also fixing this compile time
warning:
drivers/mi
Dan Carpenter writes:
> The patch 70b565bbdb91: "cxl: Prevent adapter reset if an active
> context exists" from Oct 14, 2016, leads to the following static
> checker warning:
>
> drivers/misc/cxl/main.c:290 cxl_adapter_context_get()
> warn: 'atomic_inc_unless_negative(&adapter->cont
On 07/04/2018 02:16 AM, Shilpasri G Bhat wrote:
On-Chip-Controller(OCC) is an embedded micro-processor in POWER9 chip
which measures various system and chip level sensors. These sensors
comprises of environmental sensors (like power, temperature, current
and voltage) and performance sensors (like
On Wed, Jul 4, 2018 at 7:10 AM, Baoquan He wrote:
> reparent_resources() is duplicated in arch/microblaze/pci/pci-common.c
> and arch/powerpc/kernel/pci-common.c, so move it to kernel/resource.c
> so that it's shared.
With couple of comments below,
Reviewed-by: Andy Shevchenko
P.S. In some com
Hi Guenter,
Thanks for reviewing the patch.
On 07/04/2018 08:16 PM, Guenter Roeck wrote:
>> +/* Disable if last sensor in the group */
>> +send_command = true;
>> +for (i = 0; i < sg->nr_sensor; i++) {
>> +struct sensor_data *sd = sg->sensors[i];
>> +
>> +
Hi Baoquan,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc3 next-20180704]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
Hi Baoquan,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.18-rc3 next-20180704]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux
Hi Pingfan,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on driver-core/driver-core-testing]
[also build test WARNING on v4.18-rc3 next-20180704]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
On Tue, Jul 03, 2018 at 04:34:30PM -0700, Laura Abbott wrote:
>
> The vDSO needs to have a unique build id in a similar manner
> to the kernel and modules. Use the build salt macro.
>
> Signed-off-by: Laura Abbott
> ---
> v5: I was previously focused on x86 only but since powerpc gave a patch,
>
On Wed, Jul 04, 2018 at 01:45:05PM +0530, Gautham R Shenoy wrote:
> Hi Murilo,
>
> Thanks for the review.
>
> On Tue, Jul 03, 2018 at 02:53:46PM -0300, Murilo Opsfelder Araujo wrote:
> [..snip..]
>
> > > -/* Initialize CPU <=> thread mapping/
> > > + if (has_interleaved_big_core) {
> > >
Arch-specific implementions for dma_set_{coherent_,}mask() currently
rely on an inconsistent mix of arch-defined Kconfig symbols and macro
overrides. Now that we have a nice centralised home for DMA API gubbins,
let's consolidate these loose ends under consistent config options.
Signed-off-by: Rob
As for the other mask-related hooks, standardise the arch override into
a Kconfig option, and also pull the generic implementation into the DMA
mapping code rather than having it hide away in the platform bus code.
Signed-off-by: Robin Murphy
---
arch/ia64/Kconfig | 1 +
arch/
This patch series includes some improvement to Machine check handler
for pSeries. Patch 1 fixes a buffer overrun issue if rtas extended error
log size is greater than RTAS_ERROR_LOG_MAX.
Patch 2 fixes an issue where machine check handler crashes
kernel while accessing vmalloc-ed buffer while in nmi
From: Mahesh Salgaonkar
The global mce data buffer that used to copy rtas error log is of 2048
(RTAS_ERROR_LOG_MAX) bytes in size. Before the copy we read
extended_log_length from rtas error log header, then use max of
extended_log_length and RTAS_ERROR_LOG_MAX as a size of data to be copied.
Ide
From: Mahesh Salgaonkar
rtas_log_buf is a buffer to hold RTAS event data that are communicated
to kernel by hypervisor. This buffer is then used to pass RTAS event
data to user through proc fs. This buffer is allocated from vmalloc
(non-linear mapping) area.
On Machine check interrupt, register
From: Mahesh Salgaonkar
During Machine Check interrupt on pseries platform, register r3 points
RTAS extended event log passed by hypervisor. Since hypervisor uses r3
to pass pointer to rtas log, it stores the original r3 value at the
start of the memory (first 8 bytes) pointed by r3. Since hyperv
From: Mahesh Salgaonkar
On pseries, the machine check error details are part of RTAS extended
event log passed under Machine check exception section. This patch adds
the definition of rtas MCE event section and related helper
functions.
Signed-off-by: Mahesh Salgaonkar
---
arch/powerpc/include
From: Mahesh Salgaonkar
On pseries, as of today system crashes if we get a machine check
exceptions due to SLB errors. These are soft errors and can be fixed by
flushing the SLBs so the kernel can continue to function instead of
system crash. We do this in real mode before turning on MMU. Otherwi
From: Mahesh Salgaonkar
Extract the MCE error details from RTAS extended log and display it to
console.
With this patch you should now see mce logs like below:
[ 142.371818] Severe Machine check interrupt [Recovered]
[ 142.371822] NIP [dca301b8]: init_module+0x1b8/0x338 [bork_kernel
From: Mahesh Salgaonkar
Now that other platforms also implements real mode mce handler,
lets consolidate the code by sharing existing powernv machine check
early code. Rename machine_check_powernv_early to
machine_check_common_early and reuse the code.
Signed-off-by: Mahesh Salgaonkar
---
arch
From: Mahesh Salgaonkar
If we get a machine check exceptions due to SLB errors then dump the
current SLB contents which will be very much helpful in debugging the
root cause of SLB errors. Introduce an exclusive buffer per cpu to hold
faulty SLB entries. In real mode mce handler saves the old SLB
On Wed, Jul 04, 2018 at 09:18:33AM -0500, Gustavo A. R. Silva wrote:
> Add suffix ULL to constant 64 in order to give the compiler complete
> information about the proper arithmetic to use.
>
> Notice that such constant is used in a context that expects an
> expression of type u64 (64 bits, unsign
On 07/04/2018 09:53 AM, Shilpasri G Bhat wrote:
Hi Guenter,
Thanks for reviewing the patch.
On 07/04/2018 08:16 PM, Guenter Roeck wrote:
+/* Disable if last sensor in the group */
+send_command = true;
+for (i = 0; i < sg->nr_sensor; i++) {
+struct sensor_dat
On 05/07/18 01:28, Vaibhav Jain wrote:
Function atomic_inc_unless_negative() returns a bool to indicate
success/failure. However cxl_adapter_context_get() wrongly compares
the return value against '>=0' which will always be true. The patch
fixes this comparison to '==0' there by also fixing this
On Wed, Jul 4, 2018 at 6:18 PM Rafael J. Wysocki wrote:
>
> On Wednesday, July 4, 2018 6:40:09 AM CEST Pingfan Liu wrote:
> > On Tue, Jul 3, 2018 at 10:28 PM Rafael J. Wysocki
> > wrote:
> > >
> > > On Tuesday, July 3, 2018 8:50:41 AM CEST Pingfan Liu wrote:
> > > > Clean up the referring to the
On Wed, Jul 4, 2018 at 6:23 PM Rafael J. Wysocki wrote:
>
> On Wednesday, July 4, 2018 4:47:07 AM CEST Pingfan Liu wrote:
> > On Tue, Jul 3, 2018 at 10:36 PM Rafael J. Wysocki
> > wrote:
> > >
> > > On Tuesday, July 3, 2018 8:50:38 AM CEST Pingfan Liu wrote:
> > > > commit 52cdbdd49853 ("driver
On Wed, Jul 04, 2018 at 03:00:52PM +1000, Alexey Kardashevskiy wrote:
> A VM which has:
> - a DMA capable device passed through to it (eg. network card);
> - running a malicious kernel that ignores H_PUT_TCE failure;
> - capability of using IOMMU pages bigger that physical pages
> can create an
On Thu, 5 Jul 2018 12:42:20 +1000
David Gibson wrote:
> On Wed, Jul 04, 2018 at 03:00:52PM +1000, Alexey Kardashevskiy wrote:
> > A VM which has:
> > - a DMA capable device passed through to it (eg. network card);
> > - running a malicious kernel that ignores H_PUT_TCE failure;
> > - capabilit
In order to reduce copy/paste of functions across architectures and then
make riscv hugetlb port (and future ports) simpler and smaller, this patchset
intends to factorize the numerous hugetlb primitives that are defined across all
the architectures.
Except for prepare_hugepage_range, this patchse
asm-generic/hugetlb.h proposes generic implementations of hugetlb
related functions: use __HAVE_ARCH_HUGE* defines in order to make arch
specific implementations of hugetlb functions consistent with pgtable.h
scheme.
Signed-off-by: Alexandre Ghiti
---
arch/arm64/include/asm/hugetlb.h | 2 +-
inc
arm, arm64, mips, parisc, sh, x86 architectures use the
same version of hugetlb_free_pgd_range, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 12 ++--
arch/arm64/include/asm/hugetlb.h | 10 ---
arm, ia64, mips, powerpc, sh, x86 architectures use the
same version of set_huge_pte_at, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/inc
arm, ia64, sh, x86 architectures use the
same version of huge_ptep_get_and_clear, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/as
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/asm/hugetlb.h
In order to reduce copy/paste of functions across architectures and then
make riscv hugetlb port (and future ports) simpler and smaller, this
patchset intends to factorize the numerous hugetlb primitives that are defined
across all the architectures.
Except for prepare_hugepage_range, this patchse
asm-generic/hugetlb.h proposes generic implementations of hugetlb
related functions: use __HAVE_ARCH_HUGE* defines in order to make arch
specific implementations of hugetlb functions consistent with pgtable.h
scheme.
Signed-off-by: Alexandre Ghiti
---
arch/arm64/include/asm/hugetlb.h | 2 +-
inc
arm, arm64, mips, parisc, sh, x86 architectures use the
same version of hugetlb_free_pgd_range, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 12 ++--
arch/arm64/include/asm/hugetlb.h | 10 ---
arm, ia64, mips, powerpc, sh, x86 architectures use the
same version of set_huge_pte_at, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/inc
arm, ia64, sh, x86 architectures use the
same version of huge_ptep_get_and_clear, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/as
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/asm/hugetlb.h
arm, arm64, ia64, parisc, powerpc, sh, sparc, x86 architectures
use the same version of huge_pte_none, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 5 -
arch/arm64/include/asm/hugetlb.h | 5 -
ar
In order to reduce copy/paste of functions across architectures and then
make riscv hugetlb port (and future ports) simpler and smaller, this
patchset intends to factorize the numerous hugetlb primitives that are
defined across all the architectures.
Except for prepare_hugepage_range, this patchse
asm-generic/hugetlb.h proposes generic implementations of hugetlb
related functions: use __HAVE_ARCH_HUGE* defines in order to make arch
specific implementations of hugetlb functions consistent with pgtable.h
scheme.
Signed-off-by: Alexandre Ghiti
---
arch/arm64/include/asm/hugetlb.h | 2 +-
inc
arm, arm64, mips, parisc, sh, x86 architectures use the
same version of hugetlb_free_pgd_range, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 12 ++--
arch/arm64/include/asm/hugetlb.h | 10 ---
arm, ia64, mips, powerpc, sh, x86 architectures use the
same version of set_huge_pte_at, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/inc
arm, ia64, sh, x86 architectures use the
same version of huge_ptep_get_and_clear, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/as
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 6 --
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/include/asm/hugetlb.h
arm, arm64, ia64, parisc, powerpc, sh, sparc, x86 architectures
use the same version of huge_pte_none, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 5 -
arch/arm64/include/asm/hugetlb.h | 5 -
ar
arm, arm64, ia64, mips, parisc, powerpc, sh, sparc, x86
architectures use the same version of huge_pte_wrprotect, so move
this generic implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 5 -
arch/arm64/include/asm/hugetlb.h |
arm, arm64, powerpc, sparc, x86 architectures use the same version of
prepare_hugepage_range, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb.h | 11 ---
arch/arm64/include/asm/hugetlb.h | 11 --
arm, ia64, mips, sh, x86 architectures use the same version
of huge_ptep_set_wrprotect, so move this generic implementation into
asm-generic/hugetlb.h.
Note: powerpc uses twice for book3s/32 and nohash/32 the same version as
the above architectures, but the modification was not straightforward
and
arm, ia64, sh, x86 architectures use the same version
of huge_ptep_set_access_flags, so move this generic implementation
into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 7 ---
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/includ
ia64, mips, parisc, powerpc, sh, sparc, x86 architectures use the
same version of huge_ptep_get, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3level.h | 1 +
arch/arm64/include/asm/hugetlb.h | 1 +
arch/ia64/
Please drop this serie, sorry for the noise.
On 07/05/2018 05:12 AM, Alexandre Ghiti wrote:
arm, arm64, ia64, parisc, powerpc, sh, sparc, x86 architectures
use the same version of huge_pte_none, so move this generic
implementation into asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
Please drop this serie, sorry for the noise.
On 07/05/2018 04:58 AM, Alexandre Ghiti wrote:
arm, x86 architectures use the same version of
huge_ptep_clear_flush, so move this generic implementation into
asm-generic/hugetlb.h.
Signed-off-by: Alexandre Ghiti
---
arch/arm/include/asm/hugetlb-3
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