On 15/05/2018 07:30, Michael Ellerman wrote:
Philippe Bergheaud writes:
On 14/05/2018 12:51, Michael Ellerman wrote:
Philippe Bergheaud writes:
Skiboot used to set the default Tunnel BAR register value when capi mode
was enabled. This approach was ok for the cxl driver, but prevented other
On Tue, May 15, 2018 at 04:01:54PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:37:07AM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > In current days, many OS distributions have utilized transaction
> > memory functionality. In PowerPC, HV KVM supports TM. But PR
On Tue, May 15, 2018 at 04:05:48PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:37:14AM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > Currently _kvmppc_save/restore_tm() APIs can only be invoked from
> > assembly function. This patch adds C function wrappers for t
On Tue, May 15, 2018 at 04:07:03PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:52:25AM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > The mfspr/mtspr on TM SPRs(TEXASR/TFIAR/TFHAR) are non-privileged
> > instructions and can be executed at PR KVM guest without tra
On Tue, Apr 17, 2018 at 8:03 PM, Laurent Dufour
wrote:
>
> +#ifdef CONFIG_SPECULATIVE_PAGE_FAULT
> +
> +#ifndef __HAVE_ARCH_PTE_SPECIAL
> +/* This is required by vm_normal_page() */
> +#error "Speculative page fault handler requires __HAVE_ARCH_PTE_SPECIAL"
> +#endif
> +
> +/*
> + * vm_normal_page
On Fri, 2018-05-11 at 09:04 +0100, Gilad Ben-Yossef wrote:
> Due to a snafu "paes" testmgr tests were not ordered
> lexicographically, which led to boot time warnings.
> Reorder the tests as needed.
>
> Fixes: a794d8d ("crypto: ccree - enable support for hardware keys")
> Reported-by: Abdul Haleem
On 15/05/2018 15:09, vinayak menon wrote:
> On Tue, Apr 17, 2018 at 8:03 PM, Laurent Dufour
> wrote:
>>
>> +#ifdef CONFIG_SPECULATIVE_PAGE_FAULT
>> +
>> +#ifndef __HAVE_ARCH_PTE_SPECIAL
>> +/* This is required by vm_normal_page() */
>> +#error "Speculative page fault handler requires __HAVE_ARCH_P
On Tue, 15 May 2018 15:24:21 +1000
Michael Ellerman wrote:
> > Have you tried building all current archs with function tracing enabled
> > to make sure this doesn't break any of them? I can do it if you want.
>
> We shouldn't need to should we? This is only touching powerpc specific
> code (if
On Thu, Mar 22, 2018 at 04:24:32PM +0530, Shilpasri G Bhat wrote:
> This patch series adds support to enable/disable OCC based
> inband-sensor groups at runtime. The environmental sensor groups are
> managed in HWMON and the remaining platform specific sensor groups are
> managed in /sys/firmware/o
Hi Paul,
On Tue, May 15, 2018 at 04:07:55PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:52:26AM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > Currently kernel doesn't use transaction memory.
> > And there is an issue for privilege guest that:
> > tbegin/tsuspend/
Hi Paul,
On Tue, May 15, 2018 at 04:15:26PM +1000, Paul Mackerras wrote:
> On Wed, Feb 28, 2018 at 01:52:37AM +0800, wei.guo.si...@gmail.com wrote:
> > From: Simon Guo
> >
> > In both HV/PR KVM, the KVM_SET_ONE_REG/KVM_GET_ONE_REG ioctl should
> > be able to perform without load vcpu. This patch
Steven Rostedt writes:
> On Tue, 15 May 2018 15:24:21 +1000
> Michael Ellerman wrote:
>
>> > Have you tried building all current archs with function tracing enabled
>> > to make sure this doesn't break any of them? I can do it if you want.
>>
>> We shouldn't need to should we? This is only tou
2018-04-17 22:33 GMT+08:00 Laurent Dufour :
> Add speculative_pgfault vmstat counter to count successful speculative page
> fault handling.
>
> Also fixing a minor typo in include/linux/vm_event_item.h.
>
> Signed-off-by: Laurent Dufour
> ---
> include/linux/vm_event_item.h | 3 +++
> mm/memory.c
Hi Mikey,
On Mon, May 14, 2018 at 01:21:11PM +1000, Michael Neuling wrote:
> Thanks for posting this... A couple of comments below.
Thanks for the review. Replies below.
> > +/*
> > + * check_for_interleaved_big_core - Checks if the core represented by
> > + * dn is a big-core whose threads are
On Thu, May 10, 2018 at 8:35 PM, Souptick Joarder wrote:
> On Sat, Apr 21, 2018 at 3:04 AM, Matthew Wilcox wrote:
>> On Fri, Apr 20, 2018 at 11:02:39PM +0530, Souptick Joarder wrote:
>>> Use new return type vm_fault_t for fault handler. For
>>> now, this is just documenting that the function retu
On Thu, May 10, 2018 at 11:57 PM, Souptick Joarder wrote:
> Use new return type vm_fault_t for fault handler
> in struct vm_operations_struct. For now, this is
> just documenting that the function returns a
> VM_FAULT value rather than an errno. Once all
> instances are converted, vm_fault_t will
Hi all,
I have decided that any email sent to the linuxppc-dev mailing list
that contains an HTML attachment (or is just an HTML email) will be
rejected. The vast majority of such mail are spam (and I have to spend
time dropping them manually at the moment) and, I presume, anyone on
this list is
On Mon, May 14, 2018 at 01:22:07PM +1000, Michael Neuling wrote:
> On Fri, 2018-05-11 at 16:47 +0530, Gautham R. Shenoy wrote:
> > From: "Gautham R. Shenoy"
> >
> > Each of the SMT4 cores forming a fused-core are more or less
> > independent units. Thus when multiple tasks are scheduled to run on
emulate_step() is not checking runtime VSX feature flag before
emulating an instruction. This can cause kernel oops when kernel
is compiled with CONFIG_VSX=y but running on machine where VSX is
not supported or disabled. Ex, while running emulate_step tests on
P6 machine:
...
emulate_step_test
Currently memory is allocated for core-imc based on cpu_present_mask,
which has bit 'cpu' set iff cpu is populated. We use (cpu number / threads
per core) as the array index to access the memory.
Under some circumstances firmware marks a CPU as GUARDed CPU and boot the
system, until cleared of err
On 16/05/2018 04:50, Ganesh Mahendran wrote:
> 2018-04-17 22:33 GMT+08:00 Laurent Dufour :
>> Add speculative_pgfault vmstat counter to count successful speculative page
>> fault handling.
>>
>> Also fixing a minor typo in include/linux/vm_event_item.h.
>>
>> Signed-off-by: Laurent Dufour
>> ---
On 2018-05-16 12:05, Anju T Sudhakar wrote:
Currently memory is allocated for core-imc based on cpu_present_mask,
which has bit 'cpu' set iff cpu is populated. We use (cpu number /
threads
per core) as the array index to access the memory.
Under some circumstances firmware marks a CPU as GUARD
PMD_PAGE_SIZE() is nowhere used, this patch removes it
Signed-off-by: Christophe Leroy
---
arch/powerpc/include/asm/nohash/32/pte-40x.h | 2 --
arch/powerpc/include/asm/pte-common.h| 5 -
2 files changed, 7 deletions(-)
diff --git a/arch/powerpc/include/asm/nohash/32/pte-40x.h
b/ar
On Wednesday 16 May 2018 12:18 PM, ppaidipe wrote:
On 2018-05-16 12:05, Anju T Sudhakar wrote:
Currently memory is allocated for core-imc based on cpu_present_mask,
which has bit 'cpu' set iff cpu is populated. We use (cpu number /
threads
per core) as the array index to access the memory.
PMD_PAGE_SIZE() is nowhere used and _PMD_SIZE is only
used by PMD_PAGE_SIZE().
This patch removes them.
Signed-off-by: Christophe Leroy
---
Superseeds "powerpc: get rid of PMD_PAGE_SIZE()" sent a few minutes ago.
arch/powerpc/include/asm/nohash/32/pte-40x.h | 3 ---
arch/powerpc/include/asm/p
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