On 2/22/2018 9:08 AM, Christophe Leroy wrote:
> Upstream 87a81dce53b1ea61acaeefa5191a0376a2d1d721
>
> Performing the hash of an empty file leads to a kernel Oops
>
> [ 44.504600] Unable to handle kernel paging request for data at address
> 0x000c
> [ 44.512819] Faulting instruction addre
Le 22/02/2018 à 09:30, Horia Geantă a écrit :
On 2/22/2018 9:08 AM, Christophe Leroy wrote:
Upstream 87a81dce53b1ea61acaeefa5191a0376a2d1d721
Performing the hash of an empty file leads to a kernel Oops
[ 44.504600] Unable to handle kernel paging request for data at address
0x000c
[
On Tue, Feb 20, 2018 at 11:32:25AM +, Horia Geantă wrote:
>
> If final/finup is optional, how is the final hash supposed to be retrieved?
Sometimes the computation ends with a partial hash, that's what
export is for. Also it is completely legal to abandon the hash
state entirely.
> According
This patch puts a NULL check before branching to the address pointed
to by eeh_ops->notify_resume in eeh_report_resume(). The callback
is used to notify the arch EEH code that a pci device is back
online.
For PPC64 presently, only an implementation for pseries platform is
available and not for pow
Yeah, I think metadata will evolve for a while till it settle's down.
Since ocxl_ioctl_get_metadata is exposed via uapi, a newer program
calling an older kernel will never work, since the size of that
struct
will always be larger than what the OS supports and our
copy_to_user()
will fail. The ot
This patchset solves the same problem as my previous one[1] but follows
a rather different approach. Instead of implementing DISCONTIGMEM for
PowerPC32, I simply switched the "is this RAM" check in __ioremap_caller
to the existing page_is_ram function, and unified page_is_ram to search
memblock.mem
Instead of open-coding the search in page_is_ram, call memblock_is_memory.
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/mm/mem.c | 8 +---
1 file changed, 1 insertion(+), 7 deletions(-)
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index fe8c61149fb8..da4e1555d61d 100644
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/platforms/embedded6xx/wii.c | 14 +-
1 file changed, 1 insertion(+), 13 deletions(-)
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c
b/arch/powerpc/platforms/embedded6xx/wii.c
index 4682327f76a9..fc00d82691e1 100644
--- a/arc
To support accurate checking for different blocks of memory on PPC32,
use the same memblock-based approach that's already used on PPC64 also
on PPC32.
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/mm/mem.c | 4
1 file changed, 4 deletions(-)
diff --git a/arch/powerpc/mm/mem.c b/arch/
Le 22/02/2018 à 05:17, Alastair D'Silva a écrit :
From: Alastair D'Silva
Some required information is not exposed to userspace currently (eg. the
PASID), pass this information back, along with other information which
is currently communicated via sysfs, which saves some parsing effort in
user
Le 22/02/2018 à 05:17, Alastair D'Silva a écrit :
From: Alastair D'Silva
Signed-off-by: Alastair D'Silva
---
Acked-by: Frederic Barrat
Documentation/accelerators/ocxl.rst | 5 +
1 file changed, 5 insertions(+)
diff --git a/Documentation/accelerators/ocxl.rst
b/Documentation/
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/mm/pgtable_32.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index d35d9ad3c1cd..d54e1a9c1c99 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pg
Am Fri, 16 Feb 2018 21:20:09 +0530
schrieb "Naveen N. Rao" :
> Daniel Borkmann wrote:
> > On 02/15/2018 05:25 PM, Daniel Borkmann wrote:
> >> On 02/13/2018 05:05 AM, Sandipan Das wrote:
> >>> The imm field of a bpf_insn is a signed 32-bit integer. For
> >>> JIT-ed bpf-to-bpf function calls, it sto
Am Thu, 22 Feb 2018 13:06:40 +0100
schrieb Michael Holzheu :
> Am Fri, 16 Feb 2018 21:20:09 +0530
> schrieb "Naveen N. Rao" :
>
> > Daniel Borkmann wrote:
> > > On 02/15/2018 05:25 PM, Daniel Borkmann wrote:
> > >> On 02/13/2018 05:05 AM, Sandipan Das wrote:
> > >>> The imm field of a bpf_insn is
This hack, introduced in commit c5df7f775148 ("powerpc: allow ioremap
within reserved memory regions") is now unnecessary.
Signed-off-by: Jonathan Neuschäfer
---
arch/powerpc/mm/init_32.c| 5 -
arch/powerpc/mm/mmu_decl.h | 1 -
arch/powerpc/mm/pgtable_32.c | 3 +--
3 files changed, 1 i
On 2/22/2018 1:47 PM, Herbert Xu wrote:
> On Tue, Feb 20, 2018 at 11:32:25AM +, Horia Geantă wrote:
>>
>> If final/finup is optional, how is the final hash supposed to be retrieved?
>
> Sometimes the computation ends with a partial hash, that's what
> export is for. Also it is completely lega
There is already a patch for this issue applied to ppc-next viz commit
521ca5a9859a870e354d1a6b84a6ff ("powerpc/eeh: Add conditional check on
notify_resume"). So please ignore the patch.
--
Vaibhav Jain
Linux Technology Center, IBM India Pvt. Ltd.
The back port of commit c7305645eb0c ("powerpc/64s: Convert
slb_miss_common to use RFI_TO_USER/KERNEL") missed a hunk needed to
restore cr6.
Fixes: 48cc95d4e4d6 ("powerpc/64s: Convert slb_miss_common to use
RFI_TO_USER/KERNEL")
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/exceptions-
From: Nicholas Piggin
commit bdcb1aefc5b3f7d0f1dc8b02673602bca2ff7a4b upstream.
The fallback RFI flush is used when firmware does not provide a way
to flush the cache. It's a "displacement flush" that evicts useful
data by displacing it with an uninteresting buffer.
The flush has to take care t
From: Nicholas Piggin
commit 222f20f140623ef6033491d0103ee0875fe87d35 upstream.
This commit does simple conversions of rfi/rfid to the new macros that
include the expected destination context. By simple we mean cases
where there is a single well known destination context, and it's
simply a matte
On Fri, Feb 9, 2018 at 1:07 PM, Jonathan Neuschäfer
wrote:
> The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
> that supports a configurable number of pins (up to 32), interrupts, and
> some special mechanisms to share the controller between the system's
> security processor
On Wed 14-02-18 09:14:47, Kees Cook wrote:
[...]
> I can send it through my seccomp tree via James Morris.
Could you please do it?
> >
> > From 8d8457e96296538508e478f598d1c8b3406a8626 Mon Sep 17 00:00:00 2001
> > From: Michal Hocko
> > Date: Wed, 14 Feb 2018 10:15:12 +0100
> > Subject: [PATCH]
On Thu, Feb 22, 2018 at 01:57:07PM +0100, Linus Walleij wrote:
> On Fri, Feb 9, 2018 at 1:07 PM, Jonathan Neuschäfer
> wrote:
>
> > The Nintendo Wii's chipset (called "Hollywood") has a GPIO controller
> > that supports a configurable number of pins (up to 32), interrupts, and
> > some special me
The patch
ASoC: fsl_ssi: Use ssi->streams instead of reading register
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hour
The patch
ASoC: fsl_ssi: Add bool synchronous to mark synchronous mode
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hou
The patch
ASoC: fsl_ssi: Move DT related code to a separate probe()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours)
The patch
ASoC: fsl_ssi: Clean up _fsl_ssi_set_dai_fmt()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent t
The patch
ASoC: fsl_ssi: Use snd_soc_init_dma_data instead
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: fsl_ssi: Set xFEN0 and xFEN1 together
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to L
The patch
ASoC: fsl_ssi: Clean up fsl_ssi_setup_regvals()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: fsl_ssi: Add DAIFMT define for AC97
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Lin
The patch
ASoC: fsl_ssi: Clean up helper functions of trigger()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and
The patch
ASoC: fsl_ssi: Rename fsl_ssi_disable_val macro
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: fsl_ssi: Maintain a mask of active streams
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent
The patch
ASoC: fsl_ssi: Clean up set_dai_tdm_slot()
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Li
The patch
ASoC: fsl_ssi: Keep ssi->i2s_net updated
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linu
The patch
ASoC: fsl_ssi: Redefine RX and TX macros
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linu
Some versions of firmware will have a setting that can be configured
to disable the RFI flush, add support for it.
Fixes: 8989d56878a7 ("powerpc/pseries: Query hypervisor for RFI flush settings")
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/pseries/setup.c | 3 ++-
1 file changed,
Some versions of firmware will have a setting that can be configured
to disable the RFI flush, add support for it.
Fixes: 6e032b350cd1 ("powerpc/powernv: Check device-tree for RFI flush
settings")
Signed-off-by: Michael Ellerman
---
arch/powerpc/platforms/powernv/setup.c | 4
1 file change
On Thu, Feb 22, 2018 at 12:29:28PM +, Horia Geantă wrote:
>
> IIUC this means that there is no room for improvement.
> This patch needs to be reverted, to restore previous behaviour when the
> hw_context was mapped / unmapped for every request.
In general we should avoid trying to do batching
On 02/21/2018 04:36 AM, Bharata B Rao wrote:
> Memory addtion and removal by count and indexed-count methods
> temporarily mark the LMBs that are being added/removed by a special
> flag value DRMEM_LMB_RESERVED. Accessing flags value directly at
> a few places without proper accessor method is caus
On 02/21/2018 04:36 AM, Bharata B Rao wrote:
> Memory hotplug code uses a temporary LMB flags bit DRMEM_LMB_RESERVED
> to mark the LMB which is currently undergoing hotplug or unplug.
> It is easy to confuse DRMEM_LMB_RESERVED to mean the LMB is reserved
> for which a separate flag bit already exis
Le 12/02/2018 à 00:34, Nicholas Piggin a écrit :
On Sun, 11 Feb 2018 21:04:42 +0530
"Aneesh Kumar K.V" wrote:
On 02/11/2018 07:29 PM, Nicholas Piggin wrote:
On Sat, 10 Feb 2018 13:54:27 +0100 (CET)
Christophe Leroy wrote:
In preparation for the following patch which will fix an issue
On Thu, 22 Feb 2018 23:35:45 +1100
Michael Ellerman wrote:
> From: Nicholas Piggin
>
> commit bdcb1aefc5b3f7d0f1dc8b02673602bca2ff7a4b upstream.
>
> The fallback RFI flush is used when firmware does not provide a way
> to flush the cache. It's a "displacement flush" that evicts useful
> data b
bitmap_or() and bitmap_andnot() can work properly with dst identical
to src1 or src2. There is no need of an intermediate result bitmap
that is copied back to dst in a second step.
Signed-off-by: Christophe Leroy
Reviewed-by: Aneesh Kumar K.V
Reviewed-by: Nicholas Piggin
---
v2: New in v2
v3:
In preparation for the following patch which will enhance 'slices'
for supporting PPC32 in order to fix an issue on hugepages on 8xx,
this patch takes out of page*.h all bits related to 'slices' and put
them into newly created slice.h header files.
While common parts go into asm/slice.h, subarch sp
In preparation for the following patch which will fix an issue on
the 8xx by re-using the 'slices', this patch enhances the
'slices' implementation to support 32 bits CPUs.
On PPC32, the address space is limited to 4Gbytes, hence only the low
slices will be used.
The high slices use bitmaps. As b
On the 8xx, the page size is set in the PMD entry and applies to
all pages of the page table pointed by the said PMD entry.
When an app has some regular pages allocated (e.g. see below) and tries
to mmap() a huge page at a hint address covered by the same PMD entry,
the kernel accepts the hint all
While the implementation of the "slices" address space allows
a significant amount of high slices, it limits the number of
low slices to 16 due to the use of a single u64 low_slices_psize
element in struct mm_context_t
On the 8xx, the minimum slice size is the size of the area
covered by a single
On the 8xx, the minimum slice size is the size of the area
covered by a single PMD entry, ie 4M in 4K pages mode and 64M in
16K pages mode.
This patch increases the number of slices from 16 to 64 on the 8xx.
Signed-off-by: Christophe Leroy
---
v4: New
v5: No change
arch/powerpc/include/asm/n
On Wed, Feb 14, 2018 at 05:17:08PM +0100, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Wed, 14 Feb 2018 17:05:13 +0100
>
> Omit an extra message for a memory allocation failure in this function.
>
> This issue was detected by using the Coccinelle software.
>
> Signed-off-by: Markus E
On Thu, Feb 22, 2018 at 5:07 AM, Michal Hocko wrote:
> On Wed 14-02-18 09:14:47, Kees Cook wrote:
> [...]
>> I can send it through my seccomp tree via James Morris.
>
> Could you please do it?
Hi! Yes, sorry, this fell through the cracks. Now applied.
-Kees
--
Kees Cook
Pixel Security
On 2/22/18 5:58 AM, Vaibhav Jain wrote:
> This patch puts a NULL check before branching to the address pointed
> to by eeh_ops->notify_resume in eeh_report_resume(). The callback
> is used to notify the arch EEH code that a pci device is back
> online.
>
> For PPC64 presently, only an implementati
Hi Pavel,
On Sat, Feb 17, 2018 at 10:19:55PM +0100, Pavel Machek wrote:
...
> diff --git a/drivers/soc/imx/gpc.c b/drivers/soc/imx/gpc.c
> index 53f7275..cfb42f5 100644
> --- a/drivers/soc/imx/gpc.c
> +++ b/drivers/soc/imx/gpc.c
> @@ -348,7 +348,7 @@ static int imx_gpc_old_dt_init(struct device *d
Marcus Folkesson writes:
[...]
> drivers/watchdog/mena21_wdt.c | 4 +--
For mena21_wdt:
Acked-by: Johannes Thumshirn
--
Johannes Thumshirn Storage
jthumsh...@suse.de+49 911 74053 689
SUSE LINUX GmbH, Maxfeldstr.
Brian King writes:
> On 09/03/2017 06:19 PM, Stewart Smith wrote:
>> Michael Ellerman writes:
2. On a bare metal machine, if you set ipr.fast_reboot=1 on the skiboot
kernel, then we should also avoid resetting the ipr adapter, so ipr
init on the kernel being kexec booted from
This patch series adds OpenCXL support to the cxlflash driver. With
this support, new devices using the OpenCXL transport will be supported
by the cxlflash driver along with the existing CXL devices. An effort is
made to keep this transport specific function independent of the existing
core driver
The number of interrupts requested for user contexts are stored in the
context specific structures and utilized to manage the interrupts. For the
master contexts, this number is only used once and therefore not saved.
To prepare for future commits where the number of interrupts will be
required in
From: "Matthew R. Ochs"
The SISLite specification originally defined the context control
register with a single field of bits to represent the LISN and
also stipulated that the register reset value be 0. The cxlflash
driver took advantage of this when programming the LISN for the
master contexts
Checkpatch throws a warning when the argument identifier names are not
included in the function definitions.
To avoid these warnings, argument identifiers are added in the existing
function definitions.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/backend.h | 47 ++-
Add initial infrastructure to support a new cxlflash transport, OpenCXL.
Claim a dependency on OpenCXL (OCXL) and add a new file, ocxl_hw.c, which
will host the backend routines that are specific to OpenCXL.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/Kconfig | 2 +-
drivers/scsi/c
When an adapter is initialized, transport specific configuration and MMIO
mapping details need to be saved. For CXL, this data is managed by the
underlying kernel module. To maintain a separation between the cxlflash
core and underlying transports, introduce a new structure to store data
specific t
Per the OpenCXL specification, the underlying host can have multiple AFUs
per function with each function supporting its own configuration. The host
function configuration is read on the initialization path to evaluate the
number of functions present and identify the features and configuration of
t
The OpenCXL specification supports distributing acTags amongst different
AFUs and functions on the link. The platform-specific acTag range for the
link is obtained using the OCXL provider services and then assigned to the
host function based on implementation. For cxlflash devices only a single
fun
The host AFU configuration is read on the initialization path to identify
the features and configuration of the AFU. This data is cached for use in
later configuration steps.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 34 ++
drivers/scsi/cxl
The OpenCXL specification supports distributing acTags amongst different
AFUs and functions on the link. As cxlflash devices are expected to only
support a single AFU and function, the entire range that was assigned to
the function is also assigned to the AFU.
Signed-off-by: Uma Krishnan
---
dri
Per the OpenCXL specification, the maximum PASID supported by the AFU is
indicated by a field within the configuration space. Similar to acTags,
implementations can choose to use any sub-range of PASID within their
assigned range. For cxlflash, the entire range is used.
Signed-off-by: Uma Krishnan
Add support to create and release the adapter contexts for OpenCXL and
provide means to specify certain contexts as a master.
The existing cxlflash core has a design requirement that each host will
have a single host context available by default. To satisfy this
requirement, one host adapter conte
A range of PASIDs are used as identifiers for the adapter contexts. These
contexts may be destroyed and created randomly. Use an IDR to keep track
of contexts that are in use and assign a unique identifier to new ones.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 20
Allocate a file descriptor for an adapter context when requested. In order
to allocate inodes for the file descriptors, a pseudo filesystem is created
and used.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 200
drivers/scsi/cxlflash/o
Provide means to obtain the process element of an adapter context as well
as locate an adapter context by file.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/scsi/cxlflash/ocxl_hw.c b/driver
When the AFU is configured, the global and per process MMIO regions
are presented by the configuration space. Save these regions and
map the global MMIO region that is used to access all of the control
and provisioning data in the AFU.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_h
Once the adapter context is created, it needs to be started by assigning
the MMIO space for the context and by enabling the process element in the
link. This commit adds the skeleton for starting the context and assigns
the context specific MMIO space. Master contexts have access to the global
MMIO
Once the context is started, the assigned MMIO space can be mapped
and unmapped. Provide means to map and unmap the context MMIO space.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 24
1 file changed, 24 insertions(+)
diff --git a/drivers/scsi/cxlfl
The AFU should be enabled following a successful configuration and
disabled near the end of the cleanup path.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/drivers/scsi/cxlflash/ocxl_hw.c b/drivers/scsi/cxlflash/ocxl_
Use the PCI VPD services to support reading the VPD data of the
underlying adapter.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/drivers/scsi/cxlflash/ocxl_hw.c b/drivers/scsi/cxlflash/ocxl_hw.c
index 7279f67
After reading and modifying the function configuration, setup the OpenCXL
link using the OCXL provider services. The link is released when the
adapter is unconfigured.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 25 ++---
drivers/scsi/cxlflash/ocxl_hw.h
The first function of the link needs to configure the transaction layer
between the host and device. This is accomplished by a call to the OCXL
provider services.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drive
As part of the context lifecycle, the associated process element within
the Shared Process Area (SPA) of the link must be updated. Each process
is defined by various parameters (pid, tid, PASID mm) that are stored in
the SPA upon starting a context and invalidated when a context is stopped.
Use th
Add support to allocate and free AFU interrupts using the OCXL provider
services. The trigger page returned upon successful allocation will be
mapped and exposed to the cxlflash core in a future commit.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 104 +++
Add support to map and unmap the irq space and manage irq registrations
with the kernel for each allocated AFU interrupt. Also support mapping
the physical trigger page to obtain an effective address that will be
provided to the cxlflash core in a future commit.
Signed-off-by: Uma Krishnan
---
d
User contexts request interrupts and are started using the "start work"
interface. Populate the start_work() fop to allocate and map interrupts
before starting the user context. As part of starting the context, update
the user process identification logic to properly derive the data required
by the
The cxlflash userspace API requires that users be able to poll the adapter
context for any pending events or interrupts from the AFU. Support polling
on various events by implementing the AFU poll fop using a waitqueue.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 57 +++
The cxlflash userspace API requires that users be able to read the adapter
context for any pending events or interrupts from the AFU. Support reading
various events by implementing the AFU read fop to copy out event data.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 94 +
The cxlflash userspace API requires that users be able to mmap and release
the adapter context. Support mapping by implementing the AFU mmap fop to
map the context MMIO space and install the corresponding page table entry
upon page fault. Similarly, implement the AFU release fop to terminate and
cl
The cxlflash core fop API requires a way to invoke the fault and release
handlers of underlying transports using their native file-based APIs. This
provides the core with the ability to insert selectively itself into the
processing stream of these operations for cleanup. Implement these two
fops to
OpenCXL requires that AFUs use an opaque object handle to represent
an AFU interrupt. The specification does not provide a common means
to communicate the object handle to the AFU - each AFU must define
this within the AFU specification. To support this model, the object
handle must be passed back
The SISLite specification has been updated for OpenCXL to support
communicating data to generate AFU interrupts to the AFU. This includes
a new capability bit that is advertised for OpenCXL AFUs and new registers
to hold the object handle and translation PASID of each interrupt. For
Power, the obje
Similar to user contexts, master contexts also require that the per-context
LISN registers be programmed for certain AFUs. The mapped trigger page is
obtained from underlying transport and registered with AFU for each master
context.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/main.c |
The SISLite specification has been updated to define new synchronous
interrupt status bits. These bits are set by the AFU when a given PASID or
EA is bad and a synchronous interrupt is triggered.
The SISLite header file is updated to support these new bits. Note that
there are also some formatting
In order to protect the OCXL hardware contexts from getting clobbered,
a simple state machine is added to indicate when a context is in open,
close or start state. The expected states are validated throughout the
code to prevent illegal operations on a context. A mutex is added to
protect writes to
While enabling a context on the link, a predefined callback can be
registered with the OCXL provider services to be notified on translation
errors. These errors can in turn be passed back to the user on a read
operation.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 31 ++
The cxlflash core driver resets the AFU when the master contexts are
created in the initialization or recovery paths. Today, the OCXL
provider service to perform this operation is pending implementation.
To avoid a crash due to a missing fop, log an error once and return
success to continue with ex
This commit enables the OpenCXL operations for the OpenCXL devices.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/main.c | 9 +++--
drivers/scsi/cxlflash/main.h | 1 +
2 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/scsi/cxlflash/main.c b/drivers/scsi/cxlflash/
Yves-Alexis Perez writes:
> On Fri, 2018-02-23 at 00:16 +1100, Michael Ellerman wrote:
>> With the patches I just sent, for pseries and powernv, the mitigation
>> should be in place. On machines with updated firmware we'll use the
>> hardware-assisted L1 flush, otherwise we fallback to doing it in
Vaibhav Jain writes:
> This patch puts a NULL check before branching to the address pointed
> to by eeh_ops->notify_resume in eeh_report_resume(). The callback
> is used to notify the arch EEH code that a pci device is back
> online.
>
> For PPC64 presently, only an implementation for pseries plat
On a PERST, the AFU image can be reloaded or left intact. Provide means to
set this image reload policy.
Signed-off-by: Uma Krishnan
---
drivers/scsi/cxlflash/ocxl_hw.c | 13 +
drivers/scsi/cxlflash/ocxl_hw.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/scsi/cxlfla
On Thu, Feb 08, 2018 at 09:05:45AM -0600, Bryant G. Ly wrote:
>
> On 2/8/18 6:20 AM, Michael Ellerman wrote:
>
> > There's no reason pci_uevent_ers() needs to be inline in pci.h, so
> > move it out to a C file.
> >
> > Given it's used by AER the obvious location would be somewhere in
> > drivers/
On Thu, Feb 08, 2018 at 11:20:35PM +1100, Michael Ellerman wrote:
> There's no reason pci_uevent_ers() needs to be inline in pci.h, so
> move it out to a C file.
>
> Given it's used by AER the obvious location would be somewhere in
> drivers/pci/pcie/aer, but because it's also used by powerpc EEH
Marcus Folkesson writes:
> - Add SPDX identifier
> - Remove boiler plate license text
> - If MODULE_LICENSE and boiler plate does not match, go for boiler plate
> license
>
> Signed-off-by: Marcus Folkesson
> diff --git a/drivers/watchdog/wdrtas.c b/drivers/watchdog/wdrtas.c
> index 0240c60d
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