found on booting.
kvm bare metal host machine.
==
WARNING: possible circular locking dependency detected
4.13.0-next-20170904 #1 Tainted: GW
--
ppc64_cpu/4940 is trying to acquire lock
4.13-rc3 mainline at b1b6f83ac938d176742c85757960dec2cf10e468
Backtrace occurred for every CPU during boot.
its a kvm host machine.
[ 254.131688] new mount options do not match the existing superblock,
will be ignored
[ 255.654622] [ cut here ]
[ 255.654658] WARNING: CP
On 09/05/2017 07:06 AM, Nicolin Chen wrote:
On Sun, Sep 03, 2017 at 01:05:01PM +0200, Lukasz Majewski wrote:
The problem is visible in the following setup (on the imx6q):
"simple-audio-card" -> ssi2 -> I2S + I2C -> codec
The function call log (simple-card probe -> CONFIG_SND_SIMPLE_CARD):
asoc
On Tue, Sep 05, 2017 at 09:37:43AM +0200, Łukasz Majewski wrote:
> >>The last call is changing the bit clock (BCLK) frequency to SSI's IP
> >>block clock (ipg = 66 MHz) [1].
> >
> >I think a bigger question here is why the routine sets BCLK to 66MHz.
>
> Yes, exactly.
>
> In my case the bclk is
Le 05/09/2017 à 05:57, Alistair Popple a écrit :
The nest mmu required an explicit flush as a tlbi would not flush it in the
same way as the core. However an alternate firmware fix exists which should
eliminate the need for this flush, so instead add a device-tree property
(ibm,nmmu-flush) on t
On 09/05/2017 09:52 AM, Nicolin Chen wrote:
On Tue, Sep 05, 2017 at 09:37:43AM +0200, Łukasz Majewski wrote:
The last call is changing the bit clock (BCLK) frequency to SSI's IP
block clock (ipg = 66 MHz) [1].
I think a bigger question here is why the routine sets BCLK to 66MHz.
Yes, exactl
On 09/05/2017 07:20 AM, Nicolin Chen wrote:
On Sun, Sep 03, 2017 at 04:40:21PM +0200, Łukasz Majewski wrote:
/*
* Hardware limitation: The bclk rate must be
* never greater than 1/5 IPG clock rate
*/
if (freq * 5 > clk_get_rate(ssi_private->clk)) {
dev_err(cpu_dai->dev, "bitclk > ipgclk/5\n");
r
So after some debugging I found this bug:
@@ -996,7 +998,7 @@ int fsl_pci_mcheck_exception(struct pt_regs *regs)
if (is_in_pci_mem_space(addr)) {
if (user_mode(regs)) {
pagefault_disable();
- ret = get_user(regs->nip, &inst);
+
Le 04/09/2017 à 17:29, Christophe Lombard a écrit :
The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
The patch includes some changes to DD1 fix-ups as well.
Tests performed on some of the old/new hardware.
The functio
Hi,
On Tue, 5 Sep 2017 10:10:03 AM Frederic Barrat wrote:
> >
> > + if (!nphb->npu.nmmu_flush) {
> > + /*
> > +* If we're not explicitly flushing ourselves we need to mark
> > +* the thread for global flushes
> > +*/
> > + npu_context->nmm
> Applied to powerpc next, thanks.
>
> https://git.kernel.org/powerpc/c/6ab41161b44a3b4d504ac29c9dd997
Thanks that you picked another update suggestion up.
* It might matter to mention that only one patch hunk was accepted in this case.
* Can it be that the adjusted commit subject does contain
get_user() had it args reversed causing NIP to be NULL:ed instead
of fixing up the PCI access.
Note: This still hangs my P1020 Freescale CPU hard, but at least
I get a NIP now.
Signed-off-by: Joakim Tjernlund
---
arch/powerpc/sysdev/fsl_pci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
On Sun, Sep 3, 2017 at 5:43 AM, Robert P. J. Day wrote:
> On Sun, 3 Sep 2017, Benjamin Herrenschmidt wrote:
>
>> On Sat, 2017-09-02 at 04:43 -0400, Robert P. J. Day wrote:
>> > Since, according to a recent devicetree ML posting by Rob Herring,
>> > the node "/chosen@0" is most likely for real Open
On Sat, Sep 2, 2017 at 3:43 AM, Robert P. J. Day wrote:
>
> Since, according to a recent devicetree ML posting by Rob Herring,
> the node "/chosen@0" is most likely for real Open Firmware and does
> not apply to DTSpec, remove all remaining tests and references for
> that node, of which there are
On Tue, Sep 05, 2017 at 10:19:05AM +0200, Łukasz Majewski wrote:
> On 09/05/2017 09:52 AM, Nicolin Chen wrote:
> > Can you elaborate why you set ipg clock as bclk? I don't remember SSI could
> > derive bitclock from ipg clock.
> Just to be clear:
> What clock shall be set with:
> struct snd_soc
From: Markus Elfring
Date: Tue, 5 Sep 2017 18:47:02 +0200
The local variable "rc" will eventually be set only to an error code.
Thus omit the explicit initialisation at the beginning.
Signed-off-by: Markus Elfring
---
v2:
Three update steps were integrated for this software module on 2017-09-0
On Tue, Sep 05, 2017 at 04:15:50PM +0100, Mark Brown wrote:
> > Just to be clear:
>
> > What clock shall be set with:
>
> > struct snd_soc_dai_ops {
> > int (*set_sysclk)(struct snd_soc_dai *dai,
> > int clk_id, unsigned int freq, int dir);
> > }
>
> > callback?
>
> > The SSI
On Tue, Sep 05, 2017 at 10:35:34AM +0200, Łukasz Majewski wrote:
> >And apparently, we shouldn't set bitclk to 66MHz either. Can
> >you help to find where this 66MHz comes from?
> 2. int asoc_simple_card_init_dai() @ simple-card-utils.c
Oh, I just searched in the simple-card.c but missed this fi
Hi Lukasz,
On Tue, Sep 5, 2017 at 5:35 AM, Łukasz Majewski wrote:
> Note:
> [*] - I could workaround this problem by setting:
>
> system-clock-frequency = <0> in
>
> dailink_master: cpu {
> sound-dai = <&ssi2>;
> };
>
W
Hi Nicolin,
On Tue, Sep 05, 2017 at 10:35:34AM +0200, Łukasz Majewski wrote:
And apparently, we shouldn't set bitclk to 66MHz either. Can
you help to find where this 66MHz comes from?
2. int asoc_simple_card_init_dai() @ simple-card-utils.c
Oh, I just searched in the simple-card.c but mis
Hi Fabio,
Hi Lukasz,
On Tue, Sep 5, 2017 at 5:35 AM, Łukasz Majewski wrote:
Note:
[*] - I could workaround this problem by setting:
system-clock-frequency = <0> in
dailink_master: cpu {
sound-dai = <&ssi2>;
};
On Tue, 5 Sep 2017, Rob Herring wrote:
> On Sun, Sep 3, 2017 at 5:43 AM, Robert P. J. Day
> wrote:
> > On Sun, 3 Sep 2017, Benjamin Herrenschmidt wrote:
> >
> >> On Sat, 2017-09-02 at 04:43 -0400, Robert P. J. Day wrote:
> >> > Since, according to a recent devicetree ML posting by Rob Herring,
>
On Tue, Sep 05, 2017 at 11:13:40PM +0200, Łukasz Majewski wrote:
> They key point here is the asoc_simple_card_parse_clk() function
> from simple-card-utils.c
>
> Please look how the clock is assigned; It first checks for cpu
> clock, then for "system-clock-frequency" DTS node and _finally_
> loo
On Tue, Sep 5, 2017 at 6:13 PM, Łukasz Majewski wrote:
> &i2c1 {
> clock-frequency = <40>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c1>;
> status = "okay";
>
> codec: tfa9879@6C {
> #sound-dai-cells = <0>;
>
The last caller of __pci_reset_function() has been removed. Remove
the function as well.
Signed-off-by: Jan H. Schönherr
---
drivers/pci/pci.c | 35 +++
include/linux/pci.h | 1 -
2 files changed, 3 insertions(+), 33 deletions(-)
diff --git a/drivers/pci/pci.c
The reset argument passed to pci_iov_add_virtfn() and
pci_iov_remove_virtfn() is always zero since commit 46cb7b1bd86fc227a
("PCI: Remove unused SR-IOV VF Migration support").
Remove the argument together with the associated code.
Signed-off-by: Jan H. Schönherr
---
arch/powerpc/kernel/eeh_driv
On Tue, 5 Sep 2017 14:15:54 +1000
Balbir Singh wrote:
> Walk the page table for NIP and extract the instruction. Then
> use the instruction to find the effective address via analyse_instr().
>
> We might have page table walking races, but we expect them to
> be rare, the physical address extrac
With the optimisations introduced by commit a46cc7a908 ("powerpc/mm/radix:
Improve TLB/PWC flushes"), flush_tlb_mm() no longer flushes the page walk
cache with radix. Switch to using flush_all_mm() to ensure the pwc and tlb
are properly flushed on the nmmu.
Signed-off-by: Alistair Popple
---
arc
The nest mmu required an explicit flush as a tlbi would not flush it in the
same way as the core. However an alternate firmware fix exists which should
eliminate the need for this flush, so instead add a device-tree property
(ibm,nmmu-flush) on the NVLink2 PHB to enable it only if required.
Signed
On Wed, 2017-09-06 at 01:21 +0200, Jan H. Schönherr wrote:
> The reset argument passed to pci_iov_add_virtfn() and
> pci_iov_remove_virtfn() is always zero since commit 46cb7b1bd86fc227a
> ("PCI: Remove unused SR-IOV VF Migration support").
>
> Remove the argument together with the associated code
On Wed, Sep 6, 2017 at 10:36 AM, Nicholas Piggin wrote:
> On Tue, 5 Sep 2017 14:15:54 +1000
> Balbir Singh wrote:
>
>> Walk the page table for NIP and extract the instruction. Then
>> use the instruction to find the effective address via analyse_instr().
>>
>> We might have page table walking ra
The TIMA only supports byte stores to the CPPR, for everything else,
we need to do a 32-bit or 64-bit load.
Signed-off-by: Benjamin Herrenschmidt
Fixes: 2c4fb78f78b6e420604ee1b05bdfb5c1d637869f
---
arch/powerpc/kvm/book3s_hv_rm_xive.c| 1 -
arch/powerpc/kvm/book3s_xive.c | 1 -
arch
Le 06/09/2017 à 03:49, Alistair Popple a écrit :
The nest mmu required an explicit flush as a tlbi would not flush it in the
same way as the core. However an alternate firmware fix exists which should
eliminate the need for this flush, so instead add a device-tree property
(ibm,nmmu-flush) on t
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