On 23.08.2017 08:06, Paul Mackerras wrote:
> On Wed, Aug 23, 2017 at 01:43:08AM +, Nixiaoming wrote:
>>> On 22.08.2017 17:15, David Hildenbrand wrote:
On 22.08.2017 16:28, nixiaoming wrote:
> miss kfree(stt) when anon_inode_getfd return fail so add check
> anon_inode_getfd return
>>> + mutex_unlock(&kvm->lock);
>>> + kvm_put_kvm(kvm);
>>> + goto fail;
>>> + }
>>> + return ret;
>
> of simply
>
> if (!ret)
if (ret >= 0)
return ret;
is of course what I meant :)
> return 0;
>
> mutex_lock(&kvm->lock);
>
On Wed, 2017-08-23 at 09:47 +1000, Paul Mackerras wrote:
> The analyse_instr function currently doesn't just work out what an
> instruction does, it also executes those instructions whose effect
> is only to update CPU registers that are stored in struct pt_regs.
> This is undesirable because optpr
Paulus,
> This patch series extends the code in arch/powerpc/lib/sstep.c so that
> it handles almost all load and store instructions -- all except the
> atomic memory operations (lwat, stwat, etc.). It also makes sure that
> we use the largest possible aligned accesses to access memory and that
>On 23.08.2017 08:06, Paul Mackerras wrote:
>> On Wed, Aug 23, 2017 at 01:43:08AM +, Nixiaoming wrote:
On 22.08.2017 17:15, David Hildenbrand wrote:
> On 22.08.2017 16:28, nixiaoming wrote:
>> miss kfree(stt) when anon_inode_getfd return fail so add check
>> anon_inode_getfd r
Here are few patches to get rid of some cached pointers across EEH and
powernv code as I was struggling to figure out about lifetime of
structures and so on.
This is based on sha1
98b9f8a45499 Linus Torvalds Merge tag 'ext4_for_linus_stable' of
git://git.kernel.org/pub/scm/linux/kernel/git/tytso
arch/powerpc/kernel/eeh_dev.c:57 is the only legit place where edev
is allocated; other 2 places allocate it on stack and in the heap for
a very short period of time to use eeh_pe_get() as takes edev.
This changes eeh_pe_get() to receive required parameters explicitly.
This removes unnecessary te
The eeh_dev struct already holds a pointer to pci_dn which it does not
exist without and pci_dn itself holds the very same pointer so just
use it.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/eeh.h | 1 -
arch/powerpc/kernel/eeh.c| 7 +++---
The eeh_dev struct hold a config space address of an associated node
and the very same address is also stored in the pci_dn struct which
is always present during the eeh_dev lifetime.
This uses bus:devfn directly from pci_dn instead of cached and packed
config_addr.
Since config_addr is made from
The pci_dn struct caches a OF device node pointer in order to access
the "ibm,loc-code" property when EEH is recovering.
However, when this happens in eeh_dev_check_failure(), we also have
a pci_dev pointer which should have a valid pointer to the device node
when pci_dn has one (both pointers are
pdev is always NULL, remove it.
To make checkpatch.pl happy, this also removes the "out of memory"
message.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kernel/pci_dn.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/kernel/pci_dn.c b/arc
Hi Tejun,
Tejun Heo writes:
> Hello, Michael.
>
> On Tue, Aug 22, 2017 at 11:41:41AM +1000, Michael Ellerman wrote:
>> > This is something powerpc needs to fix.
>>
>> There is no way for us to fix it.
>
> I don't think that's true. The CPU id used in kernel doesn't have to
> match the physical
On 23/08/2017 13:00, Michael Ellerman wrote:
> Hi Tejun,
>
> Tejun Heo writes:
>> Hello, Michael.
>>
>> On Tue, Aug 22, 2017 at 11:41:41AM +1000, Michael Ellerman wrote:
This is something powerpc needs to fix.
>>>
>>> There is no way for us to fix it.
>>
>> I don't think that's true. The CP
Michael Bringmann writes:
> To: linuxppc-dev@lists.ozlabs.org
>
> From: Michael Bringmann
>
> To: linux-ker...@vger.kernel.org
> Cc: Michael Ellerman
> Cc: Michael Bringmann
> Cc: John Allen
> Cc: Nathan Fontenot
> Subject: [PATCH V9 2/2] powerpc/nodes: Ensure enough nodes avail for
> opera
Michael Bringmann writes:
> powerpc/numa: Correct the currently broken capability to set the
> topology for shared CPUs in LPARs. At boot time for shared CPU
> lpars, the topology for each shared CPU is set to node zero, however,
> this is now updated correctly using the Virtual Processor Home N
Michael Neuling writes:
> Paulus,
>
>> This patch series extends the code in arch/powerpc/lib/sstep.c so that
>> it handles almost all load and store instructions -- all except the
>> atomic memory operations (lwat, stwat, etc.). It also makes sure that
>> we use the largest possible aligned ac
On Mon, 2017-07-24 at 04:28:00 UTC, Benjamin Herrenschmidt wrote:
> There is no guarantee that the various isync's involved with
> the context switch will order the update of the CPU mask with
> the first TLB entry for the new context being loaded by the HW.
>
> Be safe here and add a memory barri
Hello, Michael.
On Wed, Aug 23, 2017 at 09:00:39PM +1000, Michael Ellerman wrote:
> > I don't think that's true. The CPU id used in kernel doesn't have to
> > match the physical one and arch code should be able to pre-map CPU IDs
> > to nodes and use the matching one when hotplugging CPUs. I'm n
On 22 August 2017 at 23:19, Bjorn Helgaas wrote:
> On Mon, Aug 21, 2017 at 11:53:01AM +0100, Lorenzo Pieralisi wrote:
>> On Thu, Aug 17, 2017 at 09:30:28PM +1000, Daniel Axtens wrote:
>> > A system without PCI legacy resources (e.g. ARM64) may find that no
>> > default/boot VGA device has been mar
When we oops we print a few markers for significant config options
such as PREEMPT, SMP etc. Currently these appear on separate lines
because we're not using pr_cont() properly. Fix it.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/traps.c | 10 +-
1 file changed, 5 insertions(
Although the MSR tells you what endian you're in it's possible that
isn't the same endian the kernel was built for, and if that happens
you're usually having a very bad day. So print a marker to make
it 100% clear which endian the kernel was built for.
Signed-off-by: Michael Ellerman
---
arch/po
Just because it looks less gross.
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/traps.c | 19 ++-
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 5a54a6f54f70..f77d954f6622 100644
--- a/arch/
This is purely cosmetic, but does look nicer IMHO:
Before:
task: c1453400 task.stack: c1c6c000
NIP: c0a0fbfc LR: c0a0fbf4 CTR: c0ba6220
REGS: c001fffef820 TRAP: 0300 Not tainted
(4.13.0-rc6-gcc-6.3.1-00234-g423af27f7d81)
MSR: 8000903
Somehow we missed this when the pr_cont() changes went in. Fix CR/XER
to go on the same line as MSR, as they have historically, eg:
MSR: 80009032 CR: 4804408a XER: 2000
Signed-off-by: Michael Ellerman
---
arch/powerpc/kernel/process.c | 2 +-
1 file changed, 1 insertion(+), 1 d
On Wed, Aug 23, 2017 at 02:48:42PM +0100, Ard Biesheuvel wrote:
> On 22 August 2017 at 23:19, Bjorn Helgaas wrote:
> > On Mon, Aug 21, 2017 at 11:53:01AM +0100, Lorenzo Pieralisi wrote:
> >> On Thu, Aug 17, 2017 at 09:30:28PM +1000, Daniel Axtens wrote:
> >> > A system without PCI legacy resources
Jarkko Sakkinen writes:
> On Fri, Aug 18, 2017 at 02:31:56PM -0600, Jason Gunthorpe wrote:
>> On Fri, Aug 18, 2017 at 09:32:46PM +1000, Michael Ellerman wrote:
>>
>> > >> drivers/char/tpm/tpm_ibmvtpm.c | 2 +-
>> >
>> > Who merges changes for this driver? I assume it's Jarkko?
>>
>> Yes
>>
>>
On 08/23/2017 06:41 AM, Michael Ellerman wrote:
> Michael Bringmann writes:
>
>> powerpc/numa: Correct the currently broken capability to set the
>> topology for shared CPUs in LPARs. At boot time for shared CPU
>> lpars, the topology for each shared CPU is set to node zero, however,
>> this is
On 08/21/2017 04:44 PM, Michael Bringmann wrote:
> To: linuxppc-dev@lists.ozlabs.org
>
> From: Michael Bringmann
>
> To: linux-ker...@vger.kernel.org
> Cc: Michael Ellerman
> Cc: Michael Bringmann
> Cc: John Allen
> Cc: Nathan Fontenot
> Subject: [PATCH V9 2/2] powerpc/nodes: Ensure enough n
This serie provide small optimisation of memset() for PPC32.
Christophe Leroy (4):
powerpc/32: add memset16()
powerpc: fix location of two EXPORT_SYMBOL
powerpc/32: optimise memset()
powerpc/32: remove a NOP from memset()
arch/powerpc/include/asm/string.h | 4 +++-
arch/powerpc/kernel/s
Commit 694fc88ce271f ("powerpc/string: Implement optimized
memset variants") added memset16(), memset32() and memset64()
for the 64 bits PPC.
On 32 bits, memset64() is not relevant, and as shown below,
the generic version of memset32() gives a good code, so only
memset16() is candidate for an opti
Commit 9445aa1a3062a ("ppc: move exports to definitions")
added EXPORT_SYMBOL() for memset() and flush_hash_pages() in
the middle of the functions.
This patch moves them at the end of the two functions.
Signed-off-by: Christophe Leroy
---
arch/powerpc/lib/copy_32.S| 2 +-
arch/powerpc/mm/ha
There is no need to extend the set value to an int when the length
is lower than 4 as in that case we only do byte stores.
We can therefore immediately branch to the part handling it.
By separating it from the normal case, we are able to eliminate
a few actions on the destination pointer.
Signed-o
memset() is patched after initialisation to activate the
optimised part which uses cache instructions.
Today we have a 'b 2f' to skip the optimised patch, which then gets
replaced by a NOP, implying a useless cycle consumption.
As we have a 'bne 2f' just before, we could use that instruction
for t
The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
Tests performed on some of the new hardware.
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/cxl.h | 2 ++
drivers/misc/cxl/pci.c | 57 +++
On Mon, Jul 24, 2017 at 02:07:54PM -0500, Brijesh Singh wrote:
> From: Tom Lendacky
>
> Early in the boot process, add checks to determine if the kernel is
> running with Secure Encrypted Virtualization (SEV) active.
>
> Checking for SEV requires checking that the kernel is running under a
> hyp
Hi Michael,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.13-rc6 next-20170823]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/Michael-Bringmann/powerpc-numa-Update-CPU
Check if an LMB is assigned before attempting to call dlpar_acquire_drc in
order to avoid any unnecessary rtas calls. This substantially reduces the
running time of memory hot add on lpars with large amounts of memory.
Signed-off-by: John Allen
---
diff --git a/arch/powerpc/platforms/pseries/hotp
On 08/23/2017 12:18 PM, John Allen wrote:
> Check if an LMB is assigned before attempting to call dlpar_acquire_drc in
> order to avoid any unnecessary rtas calls. This substantially reduces the
> running time of memory hot add on lpars with large amounts of memory.
>
> Signed-off-by: John Allen
On PowerNV platforms, firmware provides exit latency and
target residency for each of the idle states in nano
seconds. Cpuidle framework expects the values in micro
seconds. Round up to nearest micro seconds to avoid errors
in cases where the values are defined as fractional micro
seconds.
Defau
Bhumika Goyal writes:
> Make these const as they are only passed as the 2nd argument to the
> function devm_snd_soc_register_platform, which is of type const.
> Done using Coccinelle.
>
> Signed-off-by: Bhumika Goyal
> ---
> sound/soc/pxa/mmp-pcm.c| 2 +-
> sound/soc/pxa/pxa2xx-pcm.c | 2 +-
> Yeah, maybe it's time to disconnect the "default display device" idea
> from the VGA arbiter. I have no idea what (if any) dependencies X has
> on the legacy VGA resources. I assume X works fine on power, where it
> sounds like those resources are rarely or never available.
The question on non
>On 23.08.2017 08:06, Paul Mackerras wrote:
>> On Wed, Aug 23, 2017 at 01:43:08AM +, Nixiaoming wrote:
On 22.08.2017 17:15, David Hildenbrand wrote:
> On 22.08.2017 16:28, nixiaoming wrote:
>> miss kfree(stt) when anon_inode_getfd return fail so add check
>> anon_inode_getfd r
On Wed, 2017-08-23 at 20:18 +1000, Alexey Kardashevskiy wrote:
> Here are few patches to get rid of some cached pointers across EEH and
> powernv code as I was struggling to figure out about lifetime of
> structures and so on.
Thanks for the patches. For the whole series:
Acked-by: Russell Curre
On 24/08/17 11:13, Russell Currey wrote:
> On Wed, 2017-08-23 at 20:18 +1000, Alexey Kardashevskiy wrote:
>> Here are few patches to get rid of some cached pointers across EEH and
>> powernv code as I was struggling to figure out about lifetime of
>> structures and so on.
>
> Thanks for the patche
Nixiaoming pointed out that there is a memory leak in
kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
fails; the memory allocated for the kvmppc_spapr_tce_table struct
is not freed, and nor are the pages allocated for the iommu
tables. In addition, we have already incremented the
On Thu, Aug 24, 2017 at 01:40:08PM +1000, Paul Mackerras wrote:
> Nixiaoming pointed out that there is a memory leak in
> kvm_vm_ioctl_create_spapr_tce() if the call to anon_inode_getfd()
> fails; the memory allocated for the kvmppc_spapr_tce_table struct
> is not freed, and nor are the pages alloc
On 23/08/17 20:18, Alexey Kardashevskiy wrote:
pdev is always NULL, remove it.
To make checkpatch.pl happy, this also removes the "out of memory"
message.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Andrew Donnellan
---
arch/powerpc/kernel/pci_dn.c | 14 ++
1 file chan
On 23/08/17 20:18, Alexey Kardashevskiy wrote:
arch/powerpc/kernel/eeh_dev.c:57 is the only legit place where edev
is allocated; other 2 places allocate it on stack and in the heap for
a very short period of time to use eeh_pe_get() as takes edev.
This changes eeh_pe_get() to receive required pa
Hi Vaidy,
On Thu, Aug 24, 2017 at 12:28:41AM +0530, Vaidyanathan Srinivasan
wrote:
Cc'ing Rafael and linux-pm list.
> On PowerNV platforms, firmware provides exit latency and
> target residency for each of the idle states in nano
> seconds. Cpuidle framework expects the values in micro
> seconds
On 23/08/17 20:18, Alexey Kardashevskiy wrote:
The eeh_dev struct already holds a pointer to pci_dn which it does not
exist without and pci_dn itself holds the very same pointer so just
use it.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: Andrew Donnellan
---
arch/powerpc/include/asm
On 23/08/17 20:19, Alexey Kardashevskiy wrote:
The eeh_dev struct hold a config space address of an associated node
and the very same address is also stored in the pci_dn struct which
is always present during the eeh_dev lifetime.
This uses bus:devfn directly from pci_dn instead of cached and pa
On 23/08/17 20:19, Alexey Kardashevskiy wrote:
The pci_dn struct caches a OF device node pointer in order to access
the "ibm,loc-code" property when EEH is recovering.
However, when this happens in eeh_dev_check_failure(), we also have
a pci_dev pointer which should have a valid pointer to the d
On 24/08/17 00:58, Christophe Lombard wrote:
The PSL initialization sequence has been updated to DD2.
This patch adapts to the changes, retaining compatibility with DD1.
Tests performed on some of the new hardware.
If we're retaining compatibility with DD1 I assume it's been tested on
some of
On 24/08/17 12:19, Alexey Kardashevskiy wrote:
On 24/08/17 11:13, Russell Currey wrote:
On Wed, 2017-08-23 at 20:18 +1000, Alexey Kardashevskiy wrote:
Here are few patches to get rid of some cached pointers across EEH and
powernv code as I was struggling to figure out about lifetime of
structur
From: Cédric Le Goater
When called from xive_irq_startup(), the size of the cpumask can be
larger than nr_cpu_ids. This can result in a WARN_ON such as:
WARNING: CPU: 10 PID: 1 at ../arch/powerpc/sysdev/xive/common.c:476
xive_find_target_in_mask+0x110/0x2f0
...
NIP [c008a310] xive
Michael Ellerman writes:
> Cédric Le Goater writes:
>> When called from xive_irq_startup(), the size of the cpumask can be
>> larger than nr_cpu_ids. Most of time, its value is NR_CPUS (2048).
...
>
> I guess this patch is a good fix, I'll expand the change log a bit.
Actually this got lost, be
Power9 introduces a hardware subsystem referred to as the Virtual
Accelerator Switchboard (VAS). VAS allows kernel subsystems and user
space processes to directly access the Nest Accelerator (NX) engines
which implement compression and encryption algorithms in the hardware.
NX has been in Power pr
Define macros for the VAS hardware registers and bit-fields as well
as couple of data structures needed by the VAS driver.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v7]
- Move the threshold control macros from uapi/asm/vas.h to
asm/vas.h for now. When we actually have an
Move the GET_FIELD and SET_FIELD macros to vas.h as VAS and other
users of VAS, including NX-842 can use those macros.
There is a lot of related code between the VAS/NX kernel drivers
and skiboot. For consistency, switch the order of parameters in
SET_FIELD to match the order in skiboot.
Signed-o
Implement vas_init() and vas_exit() functions for a new VAS module.
This VAS module is essentially a library for other device drivers
and kernel users of the NX coprocessors like NX-842 and NX-GZIP.
In the future this will be extended to add support for user space
to access the NX coprocessors.
VA
Define some helper functions to access the MMIO regions. We use these
in follow-on patches to read/write VAS hardware registers. They are
also used to later issue 'paste' instructions to submit requests to
the NX hardware engines.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog [v6]:
- M
Define helpers to initialize window context registers of the VAS
hardware. These will be used in follow-on patches when opening/closing
VAS windows.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v6]
- Add support for FTW windows and drop the fault window id
code since it is n
Define helpers to allocate/free VAS window objects. These will
be used in follow-on patches when opening/closing windows.
Signed-off-by: Sukadev Bhattiprolu
---
arch/powerpc/platforms/powernv/vas-window.c | 70 +
1 file changed, 70 insertions(+)
diff --git a/arch/pow
Define an interface that the NX drivers can use to find the physical
paste address of a send window. This interface is expected to be used
with the mmap() operation of the NX driver's device. i.e the user space
process can use driver's mmap() operation to map the send window's paste
address into th
Define an interface to return a system-wide unique id for a given VAS
window.
The vas_win_id() will be used in a follow-on patch to generate an unique
handle for a user space receive window. Applications can use this handle
to pair send and receive windows for fast thread-wakeup.
The hardware ref
Define the vas_rx_win_open() interface. This interface is intended to be
used by the Nest Accelerator (NX) driver(s) to setup receive windows for
one or more NX engines (which implement compression/encryption algorithms
in the hardware).
Follow-on patches will provide an interface to close the win
Define the vas_win_close() interface which should be used to close a
send or receive windows.
While the hardware configurations required to open send and receive windows
differ, the configuration to close a window is the same for both. So we use
a single interface to close the window.
Signed-off-
Define an interface to open a VAS send window. This interface is
intended to be used the Nest Accelerator (NX) driver(s) to open
a send window and use it to submit compression/encryption requests
to a VAS receive window.
The receive window, identified by the [vasid, cop] parameters, must
already b
Define interfaces (wrappers) to the 'copy' and 'paste' instructions
(which are new in PowerISA 3.0). These are intended to be used to
by NX driver(s) to submit Coprocessor Request Blocks (CRBs) to the
NX hardware engines.
Signed-off-by: Sukadev Bhattiprolu
---
Changelog[v4]
- Export symb
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