On (08/18/17 00:05), Laurent Dufour wrote:
[..]
> + /*
> + * MPOL_INTERLEAVE implies additional check in mpol_misplaced() which
> + * are not compatible with the speculative page fault processing.
> + */
> + pol = __get_vma_policy(vma, address);
> + if (!pol)
> +
On Sun, 20 Aug 2017 14:45:53 +1000
Nicholas Piggin wrote:
> On Wed, 16 Aug 2017 09:27:31 -0700
> "Paul E. McKenney" wrote:
> > On Wed, Aug 16, 2017 at 05:56:17AM -0700, Paul E. McKenney wrote:
> >
> > Thomas, John, am I misinterpreting the timer trace event messages?
>
> So I did some diggin
If 'of_find_device_by_node()' fails at line 153, a NULL pointer
dereference (pdev) will occur in the error handling path.
Just remove the 'devm_iounmap()' call from the error handling path. The
corresponding is managed, there is no need to release explicitly here.
Fixes: 35ef1c20fdb2 ("fsl/qe: Ad
Return 0 instead of 'ret' (which is 0 at this point) to make the code more
explicit.
Also avoid a useless initialization of 'ret'.
Signed-off-by: Christophe JAILLET
---
drivers/soc/fsl/qe/qe_tdm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/soc/fsl/qe/qe_tdm.c
Make these const as they are only used during a copy operation.
Some structures are used as a copy operation inside __init functions, so
make them const and replace __initdata with __initconst to avoid section
conflict error.
Signed-off-by: Bhumika Goyal
---
drivers/video/fbdev/68328fb.c | 2
Local atomic operations are fast and highly reentrant per CPU counters.
Used for percpu variable updates. Local atomic operations only guarantee
variable modification atomicity wrt the CPU which owns the data and
these needs to be executed in a preemption safe way.
Here is the design of the patchs
Two #defs IRQ_ENABLED and IRQ_DISABLED
are added to be used when updating paca->soft_enabled.
Replace the hardcoded values used when updating
paca->soft_enabled with IRQ_[EN/DIS]ABLED #def.
No logic change.
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include
Move set_soft_enabled() from powerpc/kernel/irq.c to
asm/hw_irq.c, to force updates to paca-soft_enabled
done via these access function. Add "memory" clobber
to hint compiler since paca->soft_enabled memory is the target
here
Renaming it as soft_enabled_set() will make
namespaces works better as p
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/hw_irq.h | 32 ++--
1 file changed, 14 insertions(+), 18 deletions(-)
diff --git a/arch/powerpc/include/asm/hw_irq.h
b/arch/powerpc/include/asm/hw_irq.h
index 3efb0b2ec053..
Minor cleanup to use helper function for manipulating
paca->soft_enabled variable.
Suggested-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/hw_irq.h | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/include/asm/hw_irq.h
In powerpc book3s, arch_local_irq_disable() function is not a "void"
when compared to other arch. And only user for this function is
arch_local_irq_save().
Patch modify the arch_local_irq_save() and makes arch_local_irq_disable()
to use arch_local_irq_save() instead.
Suggested-by: Nicholas Piggin
"paca->soft_enabled" is used as a flag to mask some of interrupts.
Currently supported flags values and their details:
soft_enabledMSR[EE]
0 0 Disabled (PMI and HMI not masked)
1 1 Enabled
"paca->soft_enabled" is initialized to 1 to make the interripts
Currently we use both EXCEPTION_PROLOG_1 and __EXCEPTION_PROLOG_1
in the MASKABLE_* macros. As a cleanup, this patch makes MASKABLE_*
to use only __EXCEPTION_PROLOG_1. There is not logic change.
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/excepti
Rename the paca->soft_enabled to paca->soft_disable_mask as
it is no more used as a flag for interrupt state.
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/hw_irq.h | 22 +++---
arch/powerpc/include/asm/kvm_ppc.h | 2 +-
arch/powe
To support addition of "bitmask" to MASKABLE_* macros,
factor out the EXCPETION_PROLOG_1 macro.
Make it explicit the interrupt masking supported
by a gievn interrupt handler. Patch correspondingly
extends the MASKABLE_* macros with an addition's parameter.
"bitmask" parameter is passed to SOFTEN_T
Two new bit mask field "IRQ_DISABLE_MASK_PMU" is introduced to support
the masking of PMI and "IRQ_DISABLE_MASK_ALL" to aid interrupt masking checking.
Couple of new irq #defs "PACA_IRQ_PMI" and "SOFTEN_VALUE_0xf0*" added to
use in the exception code to check for PMI interrupts.
In the masked_int
New Kconfig is added "CONFIG_IRQ_DEBUG_SUPPORT" to add warn_on
to alert the invalid transitions. Also moved the code under
the CONFIG_TRACE_IRQFLAGS in arch_local_irq_restore() to new Kconfig.
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/Kconfig | 4
To support disabling and enabling of irq with PMI, set of new
powerpc_local_irq_pmu_save() and powerpc_local_irq_restore()
functions are added. And powerpc_local_irq_save() implemented,
by adding a new soft_disable_mask manipulation function
soft_disable_mask_or_return(). Local_irq_pmu_* macros are
Local atomic operations are fast and highly reentrant per CPU counters.
Used for percpu variable updates. Local atomic operations only guarantee
variable modification atomicity wrt the CPU which owns the data and
these needs to be executed in a preemption safe way.
Here is the design of this patch
Force use of soft_enabled_set() wrapper to update paca-soft_enabled
wherever possisble. Also add a new wrapper function, soft_enabled_set_return(),
added to force the paca->soft_enabled updates.
Reviewed-by: Nicholas Piggin
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/hw_irq.
On Sun, Aug 20, 2017 at 11:00:40PM +1000, Nicholas Piggin wrote:
> On Sun, 20 Aug 2017 14:45:53 +1000
> Nicholas Piggin wrote:
>
> > On Wed, 16 Aug 2017 09:27:31 -0700
> > "Paul E. McKenney" wrote:
> > > On Wed, Aug 16, 2017 at 05:56:17AM -0700, Paul E. McKenney wrote:
> > >
> > > Thomas, John,
On Sat, 2017-08-19 at 10:47 -0500, Bjorn Helgaas wrote:
> So if ARM64 doesn't have these PCI legacy resources, does that mean an
> ARM64 host bridge cannot generate these legacy addresses on PCI? That
> is, there's no host bridge window that maps to those PCI addresses?
> That seems like a curious
On Sun, Aug 20, 2017 at 11:35:14AM -0700, Paul E. McKenney wrote:
> On Sun, Aug 20, 2017 at 11:00:40PM +1000, Nicholas Piggin wrote:
> > On Sun, 20 Aug 2017 14:45:53 +1000
> > Nicholas Piggin wrote:
> >
> > > On Wed, 16 Aug 2017 09:27:31 -0700
> > > "Paul E. McKenney" wrote:
> > > > On Wed, Aug
On Sun, Aug 20, 2017 at 12:08:20PM -0700, Benjamin Herrenschmidt wrote:
> On Sat, 2017-08-19 at 10:47 -0500, Bjorn Helgaas wrote:
> > So if ARM64 doesn't have these PCI legacy resources, does that mean an
> > ARM64 host bridge cannot generate these legacy addresses on PCI? That
> > is, there's no
On Sun, 20 Aug 2017 14:14:29 -0700
"Paul E. McKenney" wrote:
> On Sun, Aug 20, 2017 at 11:35:14AM -0700, Paul E. McKenney wrote:
> > On Sun, Aug 20, 2017 at 11:00:40PM +1000, Nicholas Piggin wrote:
> > > On Sun, 20 Aug 2017 14:45:53 +1000
> > > Nicholas Piggin wrote:
> > >
> > > > On Wed, 1
Hello,
On (08/18/17 00:04), Laurent Dufour wrote:
> This is a port on kernel 4.13 of the work done by Peter Zijlstra to
> handle page fault without holding the mm semaphore [1].
>
> The idea is to try to handle user space page faults without holding the
> mmap_sem. This should allow better concur
Folks,
Ok, people did talk, exchanged ideas, lovely :) What happens now? Do I
repost this or go back to PCI bus flags or something else? Thanks.
On 14/08/17 19:45, Alexey Kardashevskiy wrote:
> Folks,
>
> Is there anything to change besides those compiler errors and David's
> comment in 5/5? O
On 19/08/17 01:27, Bjorn Helgaas wrote:
> On Fri, Aug 18, 2017 at 08:05:42AM +1000, Alexey Kardashevskiy wrote:
>> On 11/08/17 18:19, Alexey Kardashevskiy wrote:
>>> From: Gavin Shan
>>>
>>> The PowerNV platform is the only user of pcibios_sriov_disable().
>>> The IOV BAR could be shifted by pci_i
On Mon, 21 Aug 2017 10:52:58 +1000
Nicholas Piggin wrote:
> On Sun, 20 Aug 2017 14:14:29 -0700
> "Paul E. McKenney" wrote:
>
> > On Sun, Aug 20, 2017 at 11:35:14AM -0700, Paul E. McKenney wrote:
> > > On Sun, Aug 20, 2017 at 11:00:40PM +1000, Nicholas Piggin wrote:
> > > > On Sun, 20 Aug
On 08/18/2017 03:34 AM, Laurent Dufour wrote:
> This is a port on kernel 4.13 of the work done by Peter Zijlstra to
> handle page fault without holding the mm semaphore [1].
>
> The idea is to try to handle user space page faults without holding the
> mmap_sem. This should allow better concurrency
30 matches
Mail list logo
