From: "Gautham R. Shenoy"
Currently, we use the opal call opal_slw_set_reg() to inform the
Sleep-Winkle Engine (SLW) to restore the contents of some of the
Hypervisor state on wakeup from deep idle states that lose full
hypervisor context (characterized by the flag
OPAL_PM_LOSE_FULL_CONTEXT).
Ho
[Please add all the irqchip maintainers when posting irqchip patches...]
On 03/08/17 04:38, Zhao Qiang wrote:
> QEIC was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms, so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
> arch/powerpc/platforms/83xx/km8
On Fri, 04 Aug 2017 11:40:43 +1000
Benjamin Herrenschmidt wrote:
> On Fri, 2017-08-04 at 03:50 +1000, Nicholas Piggin wrote:
> > Hey, so... why are any of these implemented in asm? We should
> > just do them all in C, right? I looked a bit harder at code gen
> > and a couple of them are still emi
P9 has support for PCI peer-to-peer, enabling a device to write in the
mmio space of another device directly, without interrupting the CPU.
This patch adds support for it on powernv, by adding a new API to be
called by drivers. The pnv_pci_set_p2p(...) call configures an
'initiator', i.e the devic
Hi Linus,
Please pull some more powerpc fixes for 4.13.
I had to merge rc1 into my fixes branch, so that I had the code that
needed fixing. I don't think it should cause any problems, other than I
had to generate the diffstat by hand.
cheers
The following changes since commit 0da12a7a81f1e2255e
Hari Bathini writes:
> On Friday 04 August 2017 09:21 AM, Michael Ellerman wrote:
>> Hari Bathini writes:
>>
>>> As linux,memory-limit node is set and also later used by the kernel,
>>> avoid endian conversions for this property.
>>>
>>> Fixes: 493adffcb43f ("powerpc: Make prom_init.c endian saf
This is approach 3 of my patch series to sort out Xorg
autoconfiguration for the Hibmc card beind a Hisilicon bridge on
arm64.
Approach 1 was a simple quirk for the card+bridge to mark it as
default. This higlighted the fact that the default card was picked by
the arbiter, which assumed legacy res
Some powerpc devices provide a PCI display that isn't picked up by
the VGA arbiter, presumably because it doesn't support the PCI
legacy VGA ranges.
Commit c2e1d84523ad ("powerpc: Set default VGA device") introduced
an arch quirk to mark these devices as default to fix X autoconfig.
The commit me
A system without PCI legacy resources (e.g. ARM64, powerpc) may
find that no default/boot VGA device has been marked, because the
VGA arbiter checks for legacy resource decoding before marking a
card as default.
Split the small bit of code that does default VGA handling out from
the arbiter. Add a
Currently, we do a PCI fixup to mark a default card so that Xorg
autoconfiguration works.
There is a new generic method to do this sort of vga fixup, and
it occurs by default.
Drop our old method.
This method is different:
- it will only mark a card as default if a driver is bound
- the markin
I'm getting a lot of Unrecoverable exception 4100 with 4.13-rc3:
[13483.295173] Unrecoverable exception 4100 at c000a1ec
[13483.295186] Oops: Unrecoverable exception, sig: 6 [#1]
[13483.295190] SMP NR_CPUS=2
[13483.295191] PowerMac
[13483.295197] Modules linked in: nfsd auth_rpcgss oid_reg
Le 24/07/2017 à 06:28, Benjamin Herrenschmidt a écrit :
Instead of comparing the whole CPU mask every time, let's
keep a counter of how many bits are set in the mask. Thus
testing for a local mm only requires testing if that counter
is 1 and the current CPU bit is set in the mask.
Signed-off-b
On Fri, 2017-08-04 at 14:06 +0200, Frederic Barrat wrote:
> > +#ifdef CONFIG_PPC_BOOK3S_64
> > +static inline int mm_is_thread_local(struct mm_struct *mm)
> > +{
> > + if (atomic_read(&mm->context.active_cpus) > 1)
> > + return false;
> > + return cpumask_test_cpu(smp_processor_
On Fri, 2017-08-04 at 12:59 +0200, Andreas Schwab wrote:
> I'm getting a lot of Unrecoverable exception 4100 with 4.13-rc3:
Hi Andeas !
Any chance you can bisect this ?
Thanks !
Cheers,
Ben.
Hi Markus,
[auto build test ERROR on powerpc/next]
[also build test ERROR on v4.13-rc3 next-20170804]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci/linux/commits/SF-Markus-Elfring/axonram-Adjustments-for
Hi Sam,
Thank you for looking at this. I will update patch description, and as
you suggested replace memset() via static assert in next iteration.
Pasha
On 08/04/2017 01:37 AM, Sam Ravnborg wrote:
Hi Pavel.
On Thu, Aug 03, 2017 at 05:23:47PM -0400, Pavel Tatashin wrote:
Add an optimized mm
Hi Ard,
Thank you very much for reviewing this. I will fix the bug you found in
the next iteration.
+zero_vemmap_populated_memory(void)
Typo here: vemmap -> vmemmap
Yeap, will rename here, and in Intel variant.
+{
+ struct memblock_region *reg;
+ u64 start, end;
+
+ fo
The help associated with SPARSE_IRQ says:
Sparse irq numbering is useful for distro kernels that want
to define a high CONFIG_NR_CPUS value but still want to have
low kernel memory footprint on smaller machines.
( Sparse irqs can also be beneficial on NUMA boxes, as they spread
out
From: Markus Elfring
Date: Fri, 4 Aug 2017 16:37:56 +0200
Omit an extra message for a memory allocation failure in these functions.
This issue was detected by using the Coccinelle software.
Link:
http://events.linuxfoundation.org/sites/events/files/slides/LCJ16-Refactor_Strings-WSang_0.pdf
Sig
The POWER9 core supports a new feature: ASB_Notify which requires the
support of the Special Purpose Register: TIDR.
The ASB_Notify command, generated by the AFU, will attempt to
wake-up the host thread identified by the particular LPID:PID:TID.
The special register TIDR has to be updated to with
From: Nicholas Piggin
> Sent: 04 August 2017 10:04
> On Fri, 04 Aug 2017 11:40:43 +1000
> Benjamin Herrenschmidt wrote:
>
> > On Fri, 2017-08-04 at 03:50 +1000, Nicholas Piggin wrote:
> > > Hey, so... why are any of these implemented in asm? We should
> > > just do them all in C, right? I looked
On Thu, Mar 02, 2017 at 02:07:20PM +0100, Arnd Bergmann wrote:
> On Thu, Mar 2, 2017 at 1:46 AM, Dmitry V. Levin wrote:
> > Replace size_t with __kernel_size_t to fix asm/shmbuf.h userspace
> > compilation errors like this:
> >
> > /usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name '
On 07/18/2017 02:43 PM, Rob Herring wrote:
> Now that we have a custom printf format specifier, convert users of
> full_name to use %pOF instead. This is preparation to remove storing
> of the full path string for each node.
>
> Signed-off-by: Rob Herring
> Cc: Thomas Petazzoni
> Cc: Jason Coope
On 08/03/2017 12:17 PM, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Thu, 3 Aug 2017 20:34:00 +0200
>
> The local variable "rc" will eventually be set only to an error code.
> Thus omit the explicit initialisation at the beginning.
>
> Signed-off-by: Markus Elfring
> ---
> arch/powe
On Fri, Aug 04, 2017 at 12:34:22PM +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Currently, we use the opal call opal_slw_set_reg() to inform the
> Sleep-Winkle Engine (SLW) to restore the contents of some of the
> Hypervisor state on wakeup from deep idle states that lose full
On 08/03/2017 06:12 PM, Matt Brown wrote:
> This adds the powernv_get_random_darn function which utilises the darn
> instruction, introduced in POWER9. The powernv_get_random_darn function
> is used as the ppc_md.get_random_seed on P9.
>
> The DARN instruction can potentially throw an error, so we
On Friday 04 August 2017 03:44 PM, Michael Ellerman wrote:
Hari Bathini writes:
On Friday 04 August 2017 09:21 AM, Michael Ellerman wrote:
Hari Bathini writes:
As linux,memory-limit node is set and also later used by the kernel,
avoid endian conversions for this property.
Fixes: 493adff
This is actually a 4.13-rc2 regression.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
No, this is really a 4.13-rc1 regression.
Andreas.
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
Hello,
This version implements an approach suggested by Mimi Zohar, which is that
if the modsig is valid, ima_appraise_measurement will now copy the hash
calculated by the verification process into the iint cache. This ensures
that the hash will appear in the measurement list and used to extend th
Even though struct evm_ima_xattr_data includes a fixed-size array to hold a
SHA1 digest, most of the code ignores the array and uses the struct to mean
"type indicator followed by data of unspecified size" and tracks the real
size of what the struct represents in a separate length variable.
The on
IMA will use the module_signature format for append signatures, so export
the relevant definitions and factor out the code which verifies that the
appended signature trailer is valid.
Also, create a CONFIG_MODULE_SIG_FORMAT option so that IMA can select it
and be able to use validate_module_signat
IMA will need to access the digest used in the signature so that it can
verify files containing module-style appended signatures. For this purpose,
add function pkcs7_get_message_sig.
It will also need to verify an already parsed PKCS#7 message. For this
purpose, add function verify_pkcs7_message_
IMA will need to obtain the keyring used to verify file signatures so that
it can verify the module-style signature appended to files.
Signed-off-by: Thiago Jung Bauermann
---
security/integrity/digsig.c| 28 +++-
security/integrity/integrity.h | 1 +
2 files changed
This avoids a dependency cycle in CONFIG_IMA_APPRAISE_MODSIG (introduced by
a later patch in this series): it will select CONFIG_MODULE_SIG_FORMAT
which in turn selects CONFIG_KEYS. Kconfig then complains that
CONFIG_INTEGRITY_SIGNATURE depends on CONFIG_KEYS.
Signed-off-by: Thiago Jung Bauermann
When module-style signatures appended at the end of files are supported for
IMA appraisal, the code will fallback to the xattr signature if the
appended one fails to verify.
The problem is that we don't know whether we need to fallback to the xattr
signature until the appraise step, and by then th
This patch introduces the modsig keyword to the IMA policy syntax to
specify that a given hook should expect the file to have the IMA signature
appended to it. Here is how it can be used in a rule:
appraise func=KEXEC_KERNEL_CHECK appraise_type=modsig|imasig
With this rule, IMA will accept either
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and fun
We are planning to share more code between different NAND based
devices (SPI NAND, OneNAND and raw NANDs), but before doing that
we need to move the existing include/linux/mtd/nand.h file into
include/linux/mtd/rawnand.h so we can later create a nand.h header
containing all common structure and fun
Hi Boris,
On ven., août 04 2017, Boris Brezillon
wrote:
> We are planning to share more code between different NAND based
> devices (SPI NAND, OneNAND and raw NANDs), but before doing that
> we need to move the existing include/linux/mtd/nand.h file into
> include/linux/mtd/rawnand.h so we ca
On 08/04/2017 05:29 PM, Boris Brezillon wrote:
> We are planning to share more code between different NAND based
> devices (SPI NAND, OneNAND and raw NANDs), but before doing that
> we need to move the existing include/linux/mtd/nand.h file into
> include/linux/mtd/rawnand.h so we can later create
Hello Boris,
you could easily split this patch per architecture/subsystem if you in a
first patch move the content of nand.h to rawnand.h and make nand.h just
#include rawnand.h. Then you can switch one user at a time and when all
are converted to use rawnand.h you can drop the #include.
Best reg
On 07/24/2017 04:52 PM, Victor Aoqui wrote:
> Implemented default hugepage size verification (default_hugepagesz=)
> in order to allow allocation of defined number of pages (hugepages=)
> only for supported hugepage sizes.
>
> Signed-off-by: Victor Aoqui
> ---
> v2:
>
> - Renamed default_hugepag
Hi Boris,
On 04.08.2017 18:29, Boris Brezillon wrote:
> We are planning to share more code between different NAND based
> devices (SPI NAND, OneNAND and raw NANDs), but before doing that
> we need to move the existing include/linux/mtd/nand.h file into
> include/linux/mtd/rawnand.h so we can later
On Fri, 2017-08-04 at 16:56 +0200, Christophe Lombard wrote:
> The POWER9 core supports a new feature: ASB_Notify which requires the
> support of the Special Purpose Register: TIDR.
>
> The ASB_Notify command, generated by the AFU, will attempt to
> wake-up the host thread identified by the partic
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