On Thu, Jul 13, 2017 at 01:43:53AM -0500, Segher Boessenkool wrote:
> On Thu, Jul 13, 2017 at 01:51:30PM +1000, Andrew Donnellan wrote:
> > On 13/07/17 13:25, Matt Brown wrote:
> > >@@ -1049,6 +1066,13 @@ int analyse_instr(struct instruction_op *op, struct
> > >pt_regs *regs,
> > >
This structure is only stored in the ops field of a snd_soc_dai_driver
structure. That field is declared const, so snd_soc_dai_ops structures
that have this property can be declared as const also.
Signed-off-by: Gustavo A. R. Silva
---
sound/soc/fsl/fsl_spdif.c | 2 +-
1 file changed, 1 insertio
This structure is only stored in the ops field of a snd_soc_dai_driver
structure. That field is declared const, so snd_soc_dai_ops structures
that have this property can be declared as const also.
Signed-off-by: Gustavo A. R. Silva
---
sound/soc/fsl/fsl_asrc.c | 2 +-
1 file changed, 1 insertion
On Thu, Jul 13, 2017 at 01:25:46PM +1000, Matt Brown wrote:
> This adds emulation for the bpermd instruction.
>
> Signed-off-by: Matt Brown
> ---
> arch/powerpc/lib/sstep.c | 23 +++
> 1 file changed, 23 insertions(+)
>
> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/
On Thu, Jul 13, 2017 at 01:25:46PM +1000, Matt Brown wrote:
> +static nokprobe_inline void do_bpermd(struct pt_regs *regs, unsigned long v1,
> + unsigned long v2, int ra)
> +{
> + unsigned int idx, i;
> + unsigned char perm;
> +
> + perm = 0x0;
> + for (i
On Thu, Jul 13, 2017 at 01:25:47PM +1000, Matt Brown wrote:
> +static nokprobe_inline void do_prtyw(struct pt_regs *regs, unsigned long v,
> + int ra)
> +{
> + unsigned long low, high, out;
> + unsigned int i;
> +
> + high = 0;
> + low = 0;
> + out =
On Wed, Jul 12, 2017 at 01:10:51PM +1000, Balbir Singh wrote:
> On Tue, 11 Jul 2017 08:44:15 -0700
> Ram Pai wrote:
>
> > On Tue, Jul 11, 2017 at 03:59:59PM +1000, Balbir Singh wrote:
> > > On Wed, 5 Jul 2017 14:21:39 -0700
> > > Ram Pai wrote:
> > >
> > > > Rearrange 64K PTE bits to free
Gustavo,
please stop posting in this style. It's really annoying to see
spontaneously popping-up almost same patch for more than two hours
long.
If you have a series of the same fix patches, send them as a patch
set in a shot with a thread. git-send-email does it right.
I don't mind a couple o
On Wed, Jul 12, 2017 at 01:28:25PM +1000, Balbir Singh wrote:
> On Wed, 5 Jul 2017 14:21:51 -0700
> Ram Pai wrote:
>
> > Initial plumbing to manage all the keys supported by the
> > hardware.
> >
> > Total 32 keys are supported on powerpc. However pkey 0,1
> > and 31 are reserved. So effectivel
On Thu, Jul 13, 2017 at 01:25:48PM +1000, Matt Brown wrote:
> + case 585: /* isel */
The secondary opcode for isel is only 5 bits, not 10 like most other
insns have.
> + mb = (instr >> 6) & 0x1f; /* bc */
> + val = (regs->ccr >> (mb + 32))
On Wed, Jul 12, 2017 at 03:26:01PM +1000, Balbir Singh wrote:
> On Wed, 5 Jul 2017 14:21:52 -0700
> Ram Pai wrote:
>
> > Implements helper functions to read and write the key related
> > registers; AMR, IAMR, UAMOR.
> >
> > AMR register tracks the read,write permission of a key
> > IAMR registe
Hi Takashi,
Quoting Takashi Iwai :
Gustavo,
please stop posting in this style. It's really annoying to see
spontaneously popping-up almost same patch for more than two hours
long.
If you have a series of the same fix patches, send them as a patch
set in a shot with a thread. git-send-email
On Tue, Jul 11, 2017 at 11:13:56AM -0700, Dave Hansen wrote:
> On 07/05/2017 02:22 PM, Ram Pai wrote:
> > +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS
> > +void arch_show_smap(struct seq_file *m, struct vm_area_struct *vma)
> > +{
> > + seq_printf(m, "ProtectionKey: %8u\n", vma_pkey(vma));
> > +}
This structure is only stored in the ops field of a snd_soc_dai_driver
structure. That field is declared const, so snd_soc_dai_ops structures
that have this property can be declared as const also.
Signed-off-by: Gustavo A. R. Silva
---
sound/soc/fsl/fsl_esai.c | 2 +-
1 file changed, 1 insertion
We should set "err = -ENOMEM;", otherwise it means we're returning
ERR_PTR(0) which is NULL. It results in a NULL pointer dereference in
the caller.
Signed-off-by: Dan Carpenter
diff --git a/arch/powerpc/kvm/e500mc.c b/arch/powerpc/kvm/e500mc.c
index f48a0c22e8f9..d0b6b5788afc 100644
--- a/arch
On Thu, Jul 13, 2017 at 01:43:41PM +1000, Michael Ellerman wrote:
> Sukadev Bhattiprolu writes:
> ...
> >
> > tools/perf/pmu-events/arch/powerpc/mapfile.csv | 3 +
> > .../perf/pmu-events/arch/powerpc/power9/cache.json | 176 +
> > .../arch/powerpc/power9/floating-point.json| 4
There are some error paths in kvmppc_core_vcpu_create_e500() where we
forget to set the error code. It means that we return ERR_PTR(0) which
is NULL and it results in a NULL pointer dereference in the caller.
Signed-off-by: Dan Carpenter
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e
On Thu, Jul 13, 2017 at 5:55 PM, Ram Pai wrote:
> On Wed, Jul 12, 2017 at 03:26:01PM +1000, Balbir Singh wrote:
>> On Wed, 5 Jul 2017 14:21:52 -0700
>> Ram Pai wrote:
>>
>> > Implements helper functions to read and write the key related
>> > registers; AMR, IAMR, UAMOR.
>> >
>> > AMR register tr
Jiri Olsa writes:
> On Thu, Jul 13, 2017 at 01:43:41PM +1000, Michael Ellerman wrote:
>> Sukadev Bhattiprolu writes:
>> ...
>> >
>> > tools/perf/pmu-events/arch/powerpc/mapfile.csv | 3 +
>> > .../perf/pmu-events/arch/powerpc/power9/cache.json | 176 +
>> > .../arch/powerpc/power9/flo
Hi,
WARN() is being triggered when running fsfuzzer for ext2 file system on
powerpc machine running 4.12.0-rc1 kernel.
Machine : Power 8 bare-metal
Kernel : 4.12.0-rc1
gcc : 4.8.5
Test: fsfuzzer (https://github.com/stevegrubb/fsfuzzer)
trace:
-
./run_test ext2 10
ext2 set sb->s_maxbytes to
Hi,
fsfuzzer triggers kernel Oops on powerpc machine
Machine : Power 8 bare-metal
Kernel : 4.12.0-rc1
gcc : 4.8.5
Test: fsfuzzer (https://github.com/stevegrubb/fsfuzzer)
Issue is rare to hit, only reproduced once out of 5 retries.
traces:
---
cramfs: Error -3 while decompressing!
cramfs:
On Thu, Jul 13, 2017 at 09:32:41AM +0200, Takashi Iwai wrote:
> please stop posting in this style. It's really annoying to see
> spontaneously popping-up almost same patch for more than two hours
> long.
> If you have a series of the same fix patches, send them as a patch
> set in a shot with a
Hi Michael,
sorry for late reply
>Did it just stop working? That code is from 2014?
exit without right kenel build with the error that add in the log last time.
>> Host Machine BE Qoriq e5500 16GB ram
>What userspace are you running? Is it 32-bit ?
yes 32 bit OS Ubuntu Mate 16.10 , with 64
Hi,
I'm running into Oops below on IBM PowerNV system (model 8247-22L)
with 4.12 trees and qemu-kvm-2.9. It triggers quickly after I start
KVM guest installation:
virt-install --name ppc64le_kvm_1cpu --mac 52:56:00:00:00:06 --location
nfs://XXX --ram=1024 --vcpus=1 --file-size=20 --hvm --nonspa
- Original Message -
> Hi,
>
> I'm running into Oops below on IBM PowerNV system (model 8247-22L)
> with 4.12 trees and qemu-kvm-2.9. It triggers quickly after I start
> KVM guest installation:
>
> virt-install --name ppc64le_kvm_1cpu --mac 52:56:00:00:00:06 --location
> nfs://XXX --ra
On Wed, 2017-06-14 at 23:46:38 UTC, Anton Blanchard wrote:
> From: Anton Blanchard
>
> The mcrf emulation code was looking at the CR fields in the reverse
> order. It also relied on reserved fields being zero which is somewhat
> fragile, so fix that too.
>
> Cc: sta...@vger.kernel.org
> Signed-o
On Wed, 2017-06-14 at 23:46:39 UTC, Anton Blanchard wrote:
> From: Anton Blanchard
>
> >From POWER4 onwards, mfocrf() only places the specified CR field into
> the destination GPR, and the rest of it is set to 0. The PowerPC AS
> from version 3.0 now requires this behaviour.
>
> The emulation co
On Sun, 2017-06-18 at 23:51:28 UTC, Anton Blanchard wrote:
> From: Anton Blanchard
>
> Similar to POWER8, POWER9 can count run cycles and run instructions
> completed on more than one PMU.
>
> Signed-off-by: Anton Blanchard
> Acked-by: Madhavan Srinivasan
Applied to powerpc fixes, thanks.
ht
On Tue, 2017-07-11 at 10:57:49 UTC, Madhavan Srinivasan wrote:
> Incase of continous sampling, code currently defaults
> MMCRA[SDAR_MODE] to 0b01 for power9 DD1 which is
> 'Continous sampling mode update SDAR on TLB miss'.
> And for the rest it copies the sdar_mode value from
> the event code, whic
On Tue, 2017-07-11 at 12:10:54 UTC, Michael Ellerman wrote:
> Although it's not documented anywhere, there is an expectation that
> atomic64_inc_not_zero() returns a result which fits in an int. This is
> the behaviour implemented on all arches except powerpc.
>
> This has caused at least one bug
On Thu, Jul 13, 2017 at 02:21:53PM +0100, Russell King - ARM Linux wrote:
> My conclusion of the dma_alloc_noncoherent() and dma_cache_sync() API
> when it was introduced is that it's basically a completely broken
> interface, and I've never seen any point to it. Maybe some of that is
> because it
On 07/13/2017 01:03 AM, Ram Pai wrote:
> On Tue, Jul 11, 2017 at 11:13:56AM -0700, Dave Hansen wrote:
>> On 07/05/2017 02:22 PM, Ram Pai wrote:
>>> +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS
>>> +void arch_show_smap(struct seq_file *m, struct vm_area_struct *vma)
>>> +{
>>> + seq_printf(m, "Prot
Hi Jan
On 13-07-2017 09:07, Jan Stancek wrote:
>> [ 181.328511] Unrecoverable TM Unavailable Exception f60 at d0001e7d9980
>> [ 181.328605] Oops: Unrecoverable TM Unavailable Exception, sig: 6 [#1]
>> [ 181.328613] SMP NR_CPUS=2048
>> [ 181.328613] NUMA
>> [ 181.328618] PowerNV
>> [ 181.
Hi Mark,
Quoting Mark Brown :
On Thu, Jul 13, 2017 at 09:32:41AM +0200, Takashi Iwai wrote:
please stop posting in this style. It's really annoying to see
spontaneously popping-up almost same patch for more than two hours
long.
If you have a series of the same fix patches, send them as a
On Thu, Jul 13, 2017 at 07:07:48AM -0700, Dave Hansen wrote:
> On 07/13/2017 01:03 AM, Ram Pai wrote:
> > On Tue, Jul 11, 2017 at 11:13:56AM -0700, Dave Hansen wrote:
> >> On 07/05/2017 02:22 PM, Ram Pai wrote:
> >>> +#ifdef CONFIG_PPC64_MEMORY_PROTECTION_KEYS
> >>> +void arch_show_smap(struct seq_
On Thu, 2017-07-13 at 10:18 -0500, Gustavo A. R. Silva wrote:
> Hi Mark,
>
> Quoting Mark Brown :
>
> > On Thu, Jul 13, 2017 at 09:32:41AM +0200, Takashi Iwai wrote:
> >
> > > please stop posting in this style. It's really annoying to see
> > > spontaneously popping-up almost same patch for mor
On Tue, Jul 11, 2017 at 11:23:29AM -0700, Dave Hansen wrote:
> On 07/05/2017 02:22 PM, Ram Pai wrote:
> > Add documentation updates that capture PowerPC specific changes.
> >
> > Signed-off-by: Ram Pai
> > ---
> > Documentation/vm/protection-keys.txt | 85
> > ++---
On Thu, Jul 13, 2017 at 12:45:00AM -0700, Ram Pai wrote:
> On Wed, Jul 12, 2017 at 01:28:25PM +1000, Balbir Singh wrote:
> > On Wed, 5 Jul 2017 14:21:51 -0700
> > Ram Pai wrote:
> >
> > > Initial plumbing to manage all the keys supported by the
> > > hardware.
> > >
> > > Total 32 keys are supp
On Thu, 2017-07-13 at 08:07 -0400, Jan Stancek wrote:
(You may want to CC the patch author... Added Paul).
> - Original Message -
> > Hi,
> >
> > I'm running into Oops below on IBM PowerNV system (model 8247-22L)
> > with 4.12 trees and qemu-kvm-2.9. It triggers quickly after I start
> >
On Thu, 2017-07-13 at 11:46 -0300, Gustavo Romero wrote:
> Hi Jan
> Looks like that TM unavailable exception will only able to recover
> properly if it comes from problem state and since the trigger comes
> from kernel space (kvm module) it does not match
> "if (user_mode(regs))" in tm_unavailable(
On Fri, Jul 14, 2017 at 6:37 AM, Ram Pai wrote:
> On Thu, Jul 13, 2017 at 12:45:00AM -0700, Ram Pai wrote:
>> On Wed, Jul 12, 2017 at 01:28:25PM +1000, Balbir Singh wrote:
>> > On Wed, 5 Jul 2017 14:21:51 -0700
>> > Ram Pai wrote:
>> >
>> > > Initial plumbing to manage all the keys supported by
Hi Joe,
Quoting Joe Perches :
On Thu, 2017-07-13 at 10:18 -0500, Gustavo A. R. Silva wrote:
Hi Mark,
Quoting Mark Brown :
> On Thu, Jul 13, 2017 at 09:32:41AM +0200, Takashi Iwai wrote:
>
> > please stop posting in this style. It's really annoying to see
> > spontaneously popping-up almost
On Thu, 2017-07-13 at 14:55 +0800, hejianet wrote:
> Hi Ben
> I add some printk logs in watchdog_timer_fn in the guest
> [ 16.025222] get_vtb=8236291881, get_tb=13756711357, get_timestamp=4
> [ 20.025624] get_vtb=9745285807, get_tb=15804711283, get_timestamp=7
> [ 24.025042] get_vtb=115181196
On Thu, Jul 13, 2017 at 07:49:05PM +1000, Balbir Singh wrote:
> On Thu, Jul 13, 2017 at 5:55 PM, Ram Pai wrote:
> > On Wed, Jul 12, 2017 at 03:26:01PM +1000, Balbir Singh wrote:
> >> On Wed, 5 Jul 2017 14:21:52 -0700
> >> Ram Pai wrote:
> >>
> >> > Implements helper functions to read and write t
On Thu, Jul 13, 2017 at 5:37 PM, Segher Boessenkool
wrote:
> On Thu, Jul 13, 2017 at 01:25:47PM +1000, Matt Brown wrote:
>> +static nokprobe_inline void do_prtyw(struct pt_regs *regs, unsigned long v,
>> + int ra)
>> +{
>> + unsigned long low, high, out;
>> + un
On Thu, Jul 13, 2017 at 5:47 PM, Segher Boessenkool
wrote:
> On Thu, Jul 13, 2017 at 01:25:48PM +1000, Matt Brown wrote:
>> + case 585: /* isel */
>
> The secondary opcode for isel is only 5 bits, not 10 like most other
> insns have.
Yet another conversion mistake, I'll get ther
The PWC flush only needs a single set call, just like the
full (RIC=2) flush.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/mm/tlb-radix.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/mm/tlb-radix.c b/arch/powerpc/mm/tlb-radix.c
index 02e7
At the moment we have to rather sub-optimal flushing behaviours:
- flush_tlb_mm() will flush the PWC which is unnecessary (for example
when doing a fork)
- A large unmap will call flush_tlb_pwc() multiple times causing us
to perform that fairly expensive operation repeatedly. This happens
We do that because it's used by THP pmd collapsing, so use
instead a dedicated flush function.
Signed-off-by: Benjamin Herrenschmidt
---
.../powerpc/include/asm/book3s/64/tlbflush-radix.h | 1 +
arch/powerpc/mm/pgtable-radix.c| 5 ++-
arch/powerpc/mm/tlb-radix.c
There's a somewhat architectural issue with Radix MMU and KVM.
When coming out of a guest with AIL (ie, MMU enabled), we start
executing hypervisor code with the PID register still containing
whatever the guest has been using.
The problem is that the CPU can (and will) then start prefetching
or s
On Thu, Jul 13, 2017 at 5:28 PM, Segher Boessenkool
wrote:
> On Thu, Jul 13, 2017 at 01:25:46PM +1000, Matt Brown wrote:
>> +static nokprobe_inline void do_bpermd(struct pt_regs *regs, unsigned long
>> v1,
>> + unsigned long v2, int ra)
>> +{
>> + unsigned int idx,
Benjamin Herrenschmidt writes:
> The PWC flush only needs a single set call, just like the
> full (RIC=2) flush.
>
> Signed-off-by: Benjamin Herrenschmidt
> ---
> arch/powerpc/mm/tlb-radix.c | 11 +++
> 1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/arch/powerpc/mm/tlb
Benjamin Herrenschmidt writes:
> We do that because it's used by THP pmd collapsing, so use
> instead a dedicated flush function.
>
> Signed-off-by: Benjamin Herrenschmidt
> ---
> .../powerpc/include/asm/book3s/64/tlbflush-radix.h | 1 +
> arch/powerpc/mm/pgtable-radix.c|
Benjamin Herrenschmidt writes:
> There's a somewhat architectural issue with Radix MMU and KVM.
>
> When coming out of a guest with AIL (ie, MMU enabled), we start
> executing hypervisor code with the PID register still containing
> whatever the guest has been using.
>
> The problem is that the C
On Fri, 2017-07-14 at 11:11 +0530, Aneesh Kumar K.V wrote:
> With the current code, we use tlbiel_pwc() for doing a pwc flush.
> and that does what is done this patch. May be we can update this patch
> such that we drop tlbiel_pwc and switch all those instance to
> tlbiel_pid(pid, RIC_FLUSH_PWC) ?
On Fri, 2017-07-14 at 11:14 +0530, Aneesh Kumar K.V wrote:
> > + pid = mm ? mm->context.id : 0;
> > + if (unlikely(pid == MMU_NO_CONTEXT))
> > + goto no_context;
> > +
> > + /* 4k page size, just blow the world */
> > + if (PAGE_SIZE == 0x1000) {
> > + radix_
On Fri, 2017-07-14 at 11:21 +0530, Aneesh Kumar K.V wrote:
>
> > There is still an issue with malicious guests purposefully setting
> > the PID register to a value in the host range. Hopefully future HW
> > can prevent that, but in the meantime, we handle it with a pair of
> > kludges:
> >
> > -
- Original Message -
> On Thu, 2017-07-13 at 08:07 -0400, Jan Stancek wrote:
>
> (You may want to CC the patch author... Added Paul).
I did CC him using email address from patch. Maybe some list
de-duplication dropped it?
>
> > - Original Message -
> > > Hi,
> > >
> > > I'm r
There's a somewhat architectural issue with Radix MMU and KVM.
When coming out of a guest with AIL (ie, MMU enabled), we start
executing hypervisor code with the PID register still containing
whatever the guest has been using.
The problem is that the CPU can (and will) then start prefetching
or s
Move the core logic into a helper, so we can use it for changing permissions
other than _PAGE_WRITE.
Signed-off-by: Michael Ellerman
---
arch/powerpc/mm/pgtable-radix.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/mm/pgtable-radix.c b/arc
Move the core logic into a helper, so we can use it for changing other
permissions.
We also change the logic to align start down, and end up. This means
calling the function with a range will expand that range to be at
least 1 mmu_linear_psize page in size. We need that so we can use it
on __init_
Currently even with STRICT_KERNEL_RWX we leave the __init text marked
executable after init, which is bad.
Add a hook to mark it NX (no-execute) before we free it, and implement
it for radix and hash.
Note that we use __init_end as the end address, not _einittext,
because overlaps_kernel_text() u
62 matches
Mail list logo
