Make return value void since function never return meaningfull value
Signed-off-by: Yuval Shaia
Acked-by: Sergei Shtylyov
---
v0 ->v1:
* These files were missing in v0
* drivers/net/ethernet/renesas/ravb_main.c
* drivers/net/ethernet/renesas/sh_eth.c
On 06/08, Alexey Kardashevskiy wrote:
>On 08/06/17 15:35, Alexey Kardashevskiy wrote:
>> Hi,
>>
>> How did you manage to have CONFIG_EEH=y and CONFIG_VFIO_SPAPR_EEH=n? "make
>> oldconfig" fixes this to CONFIG_VFIO_SPAPR_EEH=y.
>
>
>Also, the attached config has "CONFIG_VFIO_SPAPR_EEH=m" and cannot
Nicholas Piggin writes:
> The __replay_interrupt code is branched to with bl, but the caller is
> returned to directly with rfid from the interrupt.
>
> Instead return to a return stub that returns to the caller with blr,
> which should do better with the return predictor.
>
> Signed-off-by: Nich
Vaidyanathan Srinivasan writes:
> * Nicholas Piggin [2017-06-12 09:58:34]:
>
>> The CTRL register is read-only except bit 63 which is the run latch
>> control. This means it can be updated with a mtspr rather than
>> mfspr/mtspr.
>>
>> Signed-off-by: Nicholas Piggin
>
>> diff --git a/arch/power
Greg Kroah-Hartman writes:
> On Fri, Jun 09, 2017 at 09:23:10PM +1000, Michael Ellerman wrote:
>> Greg Kroah-Hartman writes:
>>
>> > On Fri, Jun 09, 2017 at 08:53:22AM +1000, Michael Ellerman wrote:
>> >> Greg Kroah-Hartman writes:
>> >>
>> >> > On Thu, Jun 08, 2017 at 11:12:10PM +1000, Micha
Thiago Jung Bauermann writes:
> Michael Ellerman writes:
>
>> Thiago Jung Bauermann writes:
>>
>>> On the OpenPOWER platform, secure boot and trusted boot are being
>>> implemented using IMA for taking measurements and verifying signatures.
>>
>> I still want you to implement arch_kexec_kernel_
Masahiro Yamada writes:
> Hi
>
> (+Anatolij Gustschin )
>
>
> Ping.
> I am not 100% sure who is responsible for this,
> but somebody, could take a look at this patch, please?
Have you tested it actually works?
It sounds reasonable, and if it behaves as you describe there is no
change in behavio
Hi Nick,
On Mon, Jun 12, 2017 at 09:58:29AM +1000, Nicholas Piggin wrote:
> Idle code now always runs at the 0xc... effective address whether
> in real or virtual mode. This means rfid can be ditched, along
> with a lot of SRR manipulations.
>
> In the wakeup path, carry SRR1 around in r12. Use m
Michael Bringmann writes:
> Here is the information from 2 different kernels. I have not been able to
> retrieve
> the information matching yesterday's attachments, yet, as those dumps were
> acquired in April.
>
> Attached please find 2 dumps of similar material from kernels running with my
On Tue, 13 Jun 2017 15:55:53 +0530
Gautham R Shenoy wrote:
> Hi Nick,
>
> On Mon, Jun 12, 2017 at 09:58:29AM +1000, Nicholas Piggin wrote:
> > Idle code now always runs at the 0xc... effective address whether
> > in real or virtual mode. This means rfid can be ditched, along
> > with a lot of SR
Davide Caratti writes:
> NF_CT_PROTO_{SCTP,UDPLITE,DCCP} can't be set to 'm' anymore, since they
> have been redefined as 'bool': fix defconfig for linkstation, mvme5100 and
> ppc6xx platforms accordingly.
Since when? ie. which commit changed the symbols to bool from tristate?
cheers
On Tue, 13 Jun 2017 19:51:19 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > The __replay_interrupt code is branched to with bl, but the caller is
> > returned to directly with rfid from the interrupt.
> >
> > Instead return to a return stub that returns to the caller with blr,
>
On Tue, 13 Jun 2017 20:04:27 +1000
Michael Ellerman wrote:
> Vaidyanathan Srinivasan writes:
> > * Nicholas Piggin [2017-06-12 09:58:34]:
> >
> >> The CTRL register is read-only except bit 63 which is the run latch
> >> control. This means it can be updated with a mtspr rather than
> >> mfspr
Hi Ravi,
On Mon, 2017-06-12 at 17:28 +0530, Ravi Bangoria wrote:
> So, I tested this patch along with Mark's patch[1] on elfutils an looks
> like it's not working. Steps on what I did:
>
> After applying Mark's patch on upstream elfutils:
>
> $ aclocal
> $ autoheader
> $ autoconf
> $ aut
On Thu, Jun 08, 2017 at 03:25:26PM +0200, Christoph Hellwig wrote:
> DMA_ERROR_CODE is not supposed to be used by drivers.
>
> Signed-off-by: Christoph Hellwig
> ---
> drivers/firmware/tegra/ivc.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Acked-by: Thierry Reding
signature.
On Mon, 12 Jun 2017 23:18:44 +0530
Vaidyanathan Srinivasan wrote:
> * Nicholas Piggin [2017-06-12 09:58:33]:
>
> > A memory barrier is not required after the task wakes up,
> > only if we clear the polling flag before waking. The case
> > where we have work to do is the important one, so optimi
Since last time, I accounted for the various comments
in reviews, most importantly fixed the miscalculation
of SRR1 bit for the wakeup-interrupt. Verified it does
the right thing and replays the right wakeup interrupt
(e.g., decrementer) from __replay_interrupt stepping
through the instructions in
Since last time, I accounted for the various comments
in reviews, most importantly fixed the miscalculation
of SRR1 bit for the wakeup-interrupt. Verified it does
the right thing and replays the right wakeup interrupt
(e.g., decrementer) from __replay_interrupt stepping
through the instructions in
This simplifies the asm and fixes irq-off tracing over sleep
instructions.
Also move powersave_nap check for POWER8 into C code, and move
PSSCR register value calculation for POWER9 into C.
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/hw_irq.h
Rather than concern ourselves with any soft-mask logic in the CPU
hotplug handler, just hard disable interrupts. This ensures there
are no lazy-irqs pending, which means we can call directly to idle
instruction in order to sleep.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/
When the CPU wakes from low power state, it begins at the system reset
interrupt with the exception that caused the wakeup encoded in SRR1.
Today, powernv idle wakeup ignores the wakeup reason (except a special
case for HMI), and the regular interrupt corresponding to the
exception will fire after
msgsnd doorbell exceptions are cleared when the doorbell interrupt is
taken. However if a doorbell exception causes a system reset interrupt
wake from power saving state, the message is not cleared. Processing
the doorbell from the system reset interrupt requires msgclr to avoid
taking the exceptio
The __replay_interrupt code is branched to with bl, but the caller is
returned to directly with rfid from the interrupt.
Instead, rfid to a stub that returns to the caller with blr, which
should keep the return branch predictor balanced.
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Nicholas Pig
Have the system reset idle wakeup handlers branched to in real mode
with the 0xc... kernel address applied. This allows simplifications of
avoiding rfid when switching to virtual mode in the wakeup handler.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/exception-64s.h | 13
Idle code now always runs at the 0xc... effective address whether
in real or virtual mode. This means rfid can be ditched, along
with a lot of SRR manipulations.
In the wakeup path, carry SRR1 around in r12. Use mtmsrd to change
MSR states as required.
This also balances the return prediction for
In a busy system, idle wakeups can be expected from IPIs and device
interrupts.
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/idle_book3s.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/idle_book3s.S
b/arch/power
local_irq_enable can cause interrupts to be taken which could
take significant amount of processing time. The idle process
should set its polling flag before this, so another process that
wakes it during this time will not have to send an IPI.
Expand the TIF_POLLING_NRFLAG coverage to as large as
Ensure these don't get put into bouncing cachelines.
Reviewed-by: Vaidyanathan Srinivasan
Reviewed-by: Gautham R. Shenoy
Signed-off-by: Nicholas Piggin
---
drivers/cpuidle/cpuidle-powernv.c | 10 +-
drivers/cpuidle/cpuidle-pseries.c | 8
2 files changed, 9 insertions(+), 9 de
A memory barrier is not required after the task wakes up,
only if we clear the polling flag before waking. The case
where we have work to do is the important one, so optimise
for it.
Reviewed-by: Vaidyanathan Srinivasan
Signed-off-by: Nicholas Piggin
---
drivers/cpuidle/cpuidle-powernv.c | 11 +
The CTRL register is read-only except bit 63 which is the run latch
control. This means it can be updated with a mtspr rather than
mfspr/mtspr.
Reviewed-by: Vaidyanathan Srinivasan
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/process.c | 12 ++--
1 file changed, 2 insertions(+
2*mfmsr and 2*mtmsr can be avoided in the idle sleep/wake code
because we know the MSR[EE] is clear.
Acked-by: Vaidyanathan Srinivasan
Signed-off-by: Nicholas Piggin
---
arch/powerpc/platforms/powernv/idle.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/p
On Tue, 13 Jun 2017 20:21:45 +1000
Michael Ellerman m...@ellerman.id.au wrote:
>Masahiro Yamada writes:
...
>> Ping.
>> I am not 100% sure who is responsible for this,
>> but somebody, could take a look at this patch, please?
>
>Have you tested it actually works?
>
>It sounds reasonable, and if
Hi,
On Wed, 24 May 2017 14:12:24 +0900
Masahiro Yamada yamada.masah...@socionext.com wrote:
>Most of DT files in PowerPC use #include "..." to make pre-processor
>include DT in the same directory, but we have 3 exceptional files
>that use #include <...> for that.
>
>Fix them to remove -I$(srctree
On Tue, 13 Jun 2017 23:05:47 +1000
Nicholas Piggin wrote:
> diff --git a/arch/powerpc/include/asm/hw_irq.h
> b/arch/powerpc/include/asm/hw_irq.h
> index f06112cf8734..8366bdc69988 100644
> --- a/arch/powerpc/include/asm/hw_irq.h
> +++ b/arch/powerpc/include/asm/hw_irq.h
> @@ -32,6 +32,7 @@
> #i
On Tue, 2017-06-13 at 20:49 +1000, Michael Ellerman wrote:
> Davide Caratti writes:
>
> > NF_CT_PROTO_{SCTP,UDPLITE,DCCP} can't be set to 'm' anymore, since they
> > have been redefined as 'bool': fix defconfig for linkstation, mvme5100 and
> > ppc6xx platforms accordingly.
>
> Since when? ie. w
On Tue, 2017-06-13 at 20:04 +1000, Michael Ellerman wrote:
> > Good idea. Writing to CTRL register can change only the RUN field.
> > Was this any different in older generations?
>
> No AFAICS back to 2.02.
>
> > Anton and Ben kept the mfspr/mtspr part in earlier updates to this
> > routine.
>
Cc'ing David Airlie.
This is from drm driver calling in idr_replace() w/ a negative id.
Probably a silly bug in error handling path?
Thanks.
On Mon, Jun 12, 2017 at 08:10:54PM +0530, Abdul Haleem wrote:
> Hi,
>
> WARN_ON_ONCE is being called from idr_replace() function in file
> lib/idr.c at li
A previous set of patches "cxl: Add support for Coherent Accelerator
Interface Architecture 2.0" has introduced a new support for the CAPI
cards. These patches have been tested on Simulation environment and
quite a bit of them have been tested on real hardware.
This patch brings new fixes after a
Hi Mark,
On Tuesday 13 June 2017 05:14 PM, Mark Wielaard wrote:
> I see the same on very short runs. But when doing a slightly longer run,
> even just using ls -lahR, which does some more work, then I do see user
> backtraces. They are still missing for some of the early samples though.
> It is as
In P9, OCC(On Chip Controller) can be sent commands inband via shared
memory based command response interface. This patch adds a platform
driver to support the OCC command-response interface.
The skiboot patch for the interface is posted here:
https://lists.ozlabs.org/pipermail/skiboot/2017-June/
This patch adds support to get a unique token for async completion
requests. This will be used for creating non-repititive request
handles for consecutive requests in OPAL-OCC command/response
interface.
Signed-off-by: Shilpasri G Bhat
---
No changes from V1
arch/powerpc/include/asm/opal.h
In P9, OCC (On-Chip-Controller) supports shared memory based
commad-response interface. Within the shared memory there is an OPAL
command buffer and OCC response buffer that can be used to send
inband commands to OCC. This patch adds a platform driver to support
the command/response interface betwe
On P9, trying to use data breakpoints throws the splat shown below (*).
This is because the check for a data breakpoint in DSISR is in
do_hash_page(). Move this check to handle_page_fault() so as to catch
data breakpoints in both hash and radix MMU modes.
While at it, also remove the label '11' th
On Tue, May 30, 2017 at 01:24:06PM +0530, Abdul Haleem wrote:
> Hi,
>
> Test : stress-ng
> Machine : Power 8 Bare Metal
> Kernel : 4.12.0-rc3
> Config : attached
> gcc version: 4.8.5
>
>
> In file kernel/workqueue.c at line 2041
>
> /* ensure we're on the correct CPU */
> WARN_ON_ONCE(!
On Tue, Jun 13, 2017 at 07:32:24AM +0530, Aneesh Kumar K.V wrote:
> Ram Pai writes:
>
> > On Mon, Jun 12, 2017 at 12:27:44PM +0530, Aneesh Kumar K.V wrote:
> >> Ram Pai writes:
> >>
> >> > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for
> >> > memory keys. Bit 3, 4, 5, 6 and 57 s
On Tue, Jun 13, 2017 at 10:22:43AM +0530, Aneesh Kumar K.V wrote:
> Ram Pai writes:
>
> > Rearrange PTE bits to free up bits 3, 4, 5 and 6 for
> > memory keys. Bit 3, 4, 5, 6 and 57 shall be used for memory
> > keys.
> >
> > The patch does the following change to the 64K PTE format
> >
On a related note, we are discussing the addition of 2 new device-tree
properties
with Pete Heyrman and his fellows that should simplify the determination of the
set of required nodes.
* One property would provide the total/max number of nodes needed by the kernel
on the current hardware.
* A s
On Tue, Jun 13, 2017 at 4:49 PM, Kamalesh Babulal <
kamal...@linux.vnet.ibm.com> wrote:
> Module make on ppc64le, fails with:
>
> make -C /root/kernel/linux M=/root/.kpatch/tmp/patch
> kpatch-data-read-mostly.ko
> make[1]: Entering directory '/root/kernel/linux'
> CC [M] /root/.kpatch/tmp/patch
Thiago Jung Bauermann [bauer...@linux.vnet.ibm.com] wrote:
> POWER9 introduces a new version of the hypervisor API to access the 24x7
> perf counters. The new version changed some of the structures used for
> requests and results.
>
> Signed-off-by: Thiago Jung Bauermann
> ---
> arch/powerpc/per
Architecturally we should apply a 0x400 offset for these. Not doing
it will break future HW implementations.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/include/asm/xive.h | 12 +++-
arch/powerpc/kvm/book3s_xive_template.c | 4 ++--
arch/powerpc/sysdev/xive/common.c
On Fri, 9 Jun 2017 00:53:08 +0530
"Naveen N. Rao" wrote:
> Add a test to verify that the registers passed in pt_regs on kprobe
> (trap), optprobe (jump) and kprobe_on_ftrace (ftrace_caller) are
> accurate. The tests are exercized if KPROBES_SANITY_TEST is enabled.
Great!
>
> Implemented for p
From: Frank Rowand
The Devicetree Specification has superseded the ePAPR as the
base specification for bindings. Update files in Documentation
to reference the new document.
Some files are not updated because there is no hypervisor chapter
in the Devicetree Specification:
Documentation/devic
When trapped on WARN_ON(), report_bug() is expected to return
BUG_TRAP_TYPE_WARN so the caller could increment NIP by 4 and continue.
The __builtin_constant_p() path of the PPC's WARN_ON() calls (indirectly)
__WARN_FLAGS() which has BUGFLAG_WARNING set, however the other branch
does not which makes
"Naveen N. Rao" writes:
> On P9, trying to use data breakpoints throws the splat shown below (*).
> This is because the check for a data breakpoint in DSISR is in
> do_hash_page(). Move this check to handle_page_fault() so as to catch
> data breakpoints in both hash and radix MMU modes.
>
> While
Benjamin Herrenschmidt writes:
> On Tue, 2017-06-13 at 20:04 +1000, Michael Ellerman wrote:
>> > Good idea. Writing to CTRL register can change only the RUN field.
>> > Was this any different in older generations?
>>
>> No AFAICS back to 2.02.
>>
>> > Anton and Ben kept the mfspr/mtspr part in
Diagnostic data for PHBs currently works by allocated a fixed-sized buffer.
This is simple, but either wastes memory (though only a few kilobytes) or
in the case of PHB4 isn't enough to fit the whole data blob.
For machines that don't describe the diagnostic data size in the device
tree, use the h
Dumping the PE State Tables (PEST) can be highly verbose if a number of PEs
are affected, especially in the case where the whole PHB is frozen and 512
lines get printed. Check for duplicates when dumping the PEST to reduce
useless output.
For example:
PE[0f8] A/B: 9726 8080d0
As with P7IOC and PHB3, add kernel-side support for decoding and printing
diagnostic data for PHB4.
Signed-off-by: Russell Currey
---
No changes from v1
arch/powerpc/include/asm/opal-api.h | 75 -
arch/powerpc/platforms/powernv/pci.c | 105 +
Thiago Jung Bauermann [bauer...@linux.vnet.ibm.com] wrote:
> Hello,
>
> The hypervisor interface to access 24x7 performance counters (which collect
> performance information from system power on to system power off) has been
> extended in POWER9 adding new fields to the request and result element
On Tue, 2017-06-13 at 23:26 +0530, Shilpasri G Bhat wrote:
> In P9, OCC (On-Chip-Controller) supports shared memory based
> commad-response interface. Within the shared memory there is an OPAL
> command buffer and OCC response buffer that can be used to send
> inband commands to OCC. This patch add
Benjamin Herrenschmidt writes:
> Architecturally we should apply a 0x400 offset for these. Not doing
> it will break future HW implementations.
Can you elaborate a bit?
You're changing a write to 0x0 to be a write to 0x400, which at face
value appears like it breaks something, or is already bro
"4c3b89e powerpc/powernv: Add sanity checks to pnv_pci_get_{gpu|npu}_dev"
introduced explicit warnings in pnv_pci_get_npu_dev() when a PCIe device
has no associated device-tree node. However not all PCIe devices have an
of_node and pnv_pci_get_npu_dev() gets indirectly called at least once for
ever
Balbir Singh writes:
> On Tue, Jun 13, 2017 at 4:49 PM, Kamalesh Babulal <
> kamal...@linux.vnet.ibm.com> wrote:
>> diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl
>> index 1633c3e..683b8b5 100755
>> --- a/scripts/recordmcount.pl
>> +++ b/scripts/recordmcount.pl
>> @@ -264,7 +264,7
Christophe Lombard writes:
> A previous set of patches "cxl: Add support for Coherent Accelerator
> Interface Architecture 2.0" has introduced a new support for the CAPI
> cards.
Which commit is that?
cheers
> These patches have been tested on Simulation environment and
> quite a bit of them h
On Wednesday 14 June 2017 04:22 AM, Balbir Singh wrote:
On Tue, Jun 13, 2017 at 4:49 PM, Kamalesh Babulal <
kamal...@linux.vnet.ibm.com> wrote:
Module make on ppc64le, fails with:
make -C /root/kernel/linux M=/root/.kpatch/tmp/patch
kpatch-data-read-mostly.ko
make[1]: Entering directory '/root
Hi Aneesh,
On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote:
> "Naveen N. Rao" writes:
>
> > On P9, trying to use data breakpoints throws the splat shown below (*).
> > This is because the check for a data breakpoint in DSISR is in
> > do_hash_page(). Move this check to handle_page_fault() so as to
On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote:
Hi Aneesh,
On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote:
"Naveen N. Rao" writes:
On P9, trying to use data breakpoints throws the splat shown below (*).
This is because the check for a data breakpoint in DSISR is in
do_hash_page().
On Wed, Jun 14, 2017 at 3:25 PM, Balbir Singh wrote:
>
>
> On Wed, Jun 14, 2017 at 8:21 AM, Michael Bringmann
> wrote:
>>
>> On a related note, we are discussing the addition of 2 new device-tree
>> properties
>> with Pete Heyrman and his fellows that should simplify the determination
>> of the
>
On Wed, Jun 14, 2017 at 8:21 AM, Michael Bringmann
wrote:
> On a related note, we are discussing the addition of 2 new device-tree
> properties
> with Pete Heyrman and his fellows that should simplify the determination
> of the
> set of required nodes.
>
> * One property would provide the total/m
On Wed, 14 Jun 2017 11:40:08 +0900
Masami Hiramatsu wrote:
> On Fri, 9 Jun 2017 00:53:08 +0530
> "Naveen N. Rao" wrote:
>
> > Add a test to verify that the registers passed in pt_regs on kprobe
> > (trap), optprobe (jump) and kprobe_on_ftrace (ftrace_caller) are
> > accurate. The tests are exe
On 06/14/2017 12:12 AM, Naveen N. Rao wrote:
> On P9, trying to use data breakpoints throws the splat shown below (*).
> This is because the check for a data breakpoint in DSISR is in
> do_hash_page(). Move this check to handle_page_fault() so as to catch
> data breakpoints in both hash and radix M
"Aneesh Kumar K.V" writes:
> On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote:
>> On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote:
>>> "Naveen N. Rao" writes:
diff --git a/arch/powerpc/kernel/exceptions-64s.S
b/arch/powerpc/kernel/exceptions-64s.S
index ae418b85c17c..17ee701b
On Wednesday 14 June 2017 10:23 AM, Michael Ellerman wrote:
I don't get this, the arch should always be powerpc.
Right. Something else is fubar for that to happen, we should fix
whatever it is.
Agree, ARCH over-ruling by reading the underlying architecture will
not work, as the expectation is
On Wed, Jun 14, 2017 at 10:43:30AM +0530, Aneesh Kumar K.V wrote:
>
>
> On Wednesday 14 June 2017 10:41 AM, Naveen N. Rao wrote:
> >Hi Aneesh,
> >
> >On 2017/06/14 08:38AM, Aneesh Kumar K.V wrote:
> >>"Naveen N. Rao" writes:
> >>
> >>>On P9, trying to use data breakpoints throws the splat shown
Masahiro Yamada writes:
> 2017-06-13 19:21 GMT+09:00 Michael Ellerman :
>> Masahiro Yamada writes:
>>>
>>> (+Anatolij Gustschin )
>>>
>>> Ping.
>>> I am not 100% sure who is responsible for this,
>>> but somebody, could take a look at this patch, please?
>>
>> Have you tested it actually works?
>
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