Re: [PATCH net-next] powerpc: use asm-generic/socket.h as much as possible

2017-05-31 Thread Arnd Bergmann
On Wed, May 31, 2017 at 7:43 AM, Stephen Rothwell wrote: > asm-generic/socket.h already has an exception for the differences that > powerpc needs, so just include it after defining the differences. > > Signed-off-by: Stephen Rothwell Acked-by: Arnd Bergmann

Re: [PATCH 6/6] cpuidle-powernv: Allow Deep stop states that don't stop time

2017-05-31 Thread Gautham R Shenoy
On Tue, May 30, 2017 at 09:10:06PM +1000, Nicholas Piggin wrote: > On Tue, 30 May 2017 16:20:55 +0530 > Gautham R Shenoy wrote: > > > On Tue, May 30, 2017 at 05:13:57PM +1000, Nicholas Piggin wrote: > > > On Tue, 16 May 2017 14:19:48 +0530 > > > "Gautham R. Shenoy" wrote: > > > > > > > From:

Re: [PATCH net-next] powerpc: use asm-generic/socket.h as much as possible

2017-05-31 Thread Michael Ellerman
Stephen Rothwell writes: > asm-generic/socket.h already has an exception for the differences that > powerpc needs, so just include it after defining the differences. > > Signed-off-by: Stephen Rothwell > --- > arch/powerpc/include/uapi/asm/socket.h | 92 > +- >

Re: [PATCH] rtc/tpo: Handle disabled TPO in opal_get_tpo_time()

2017-05-31 Thread Alexandre Belloni
On 19/05/2017 at 15:35:09 +0530, Vaibhav Jain wrote: > On PowerNV platform when Timed-Power-On(TPO) is disabled, read of > stored TPO yields value with all date components set to '0' inside > opal_get_tpo_time(). The function opal_to_tm() then converts it to an > offset from year 1900 yielding alar

Re: [PATCH] drivers/rtc/interface.c: Validate alarm-time before handling rollover

2017-05-31 Thread Alexandre Belloni
On 19/05/2017 at 22:18:55 +0530, Vaibhav Jain wrote: > In function __rtc_read_alarm() its possible for an alarm time-stamp to > be invalid even after replacing missing components with current > time-stamp. The condition 'alarm->time.tm_year < 70' will trigger this > case and will cause the call to

Re: [PATCH net-next] powerpc: use asm-generic/socket.h as much as possible

2017-05-31 Thread Stephen Rothwell
Hi Michael, On Wed, 31 May 2017 20:15:55 +1000 Michael Ellerman wrote: > > Stephen Rothwell writes: > > > asm-generic/socket.h already has an exception for the differences that > > powerpc needs, so just include it after defining the differences. > > > > Signed-off-by: Stephen Rothwell > > ---

Re: [Patch 2/2]: powerpc/hotplug/mm: Fix hot-add memory node assoc

2017-05-31 Thread Michael Bringmann
On 05/29/2017 12:32 AM, Michael Ellerman wrote: > Reza Arbab writes: > >> On Fri, May 26, 2017 at 01:46:58PM +1000, Michael Ellerman wrote: >>> Reza Arbab writes: >>> On Thu, May 25, 2017 at 04:19:53PM +1000, Michael Ellerman wrote: > The commit message for 3af229f2071f says: > >>

Re: 4.12-rc ppc64 4k-page needs costly allocations

2017-05-31 Thread Christoph Lameter
On Tue, 30 May 2017, Hugh Dickins wrote: > I wanted to try removing CONFIG_SLUB_DEBUG, but didn't succeed in that: > it seemed to be a hard requirement for something, but I didn't find what. CONFIG_SLUB_DEBUG does not enable debugging. It only includes the code to be able to enable it at runtime.

Re: 4.12-rc ppc64 4k-page needs costly allocations

2017-05-31 Thread Christoph Lameter
On Wed, 31 May 2017, Michael Ellerman wrote: > > SLUB: Unable to allocate memory on node -1, gfp=0x14000c0(GFP_KERNEL) > > cache: pgtable-2^12, object size: 32768, buffer size: 65536, default > > order: 4, min order: 4 > > pgtable-2^12 debugging increased min order, use slub_debug=O to disabl

Re: [v3 0/9] parallelized "struct page" zeroing

2017-05-31 Thread Michal Hocko
On Tue 30-05-17 13:16:50, Pasha Tatashin wrote: > >Could you be more specific? E.g. how are other stores done in > >__init_single_page safe then? I am sorry to be dense here but how does > >the full 64B store differ from other stores done in the same function. > > Hi Michal, > > It is safe to do

Re: [v3 0/9] parallelized "struct page" zeroing

2017-05-31 Thread David Miller
From: Michal Hocko Date: Wed, 31 May 2017 18:31:31 +0200 > On Tue 30-05-17 13:16:50, Pasha Tatashin wrote: >> >Could you be more specific? E.g. how are other stores done in >> >__init_single_page safe then? I am sorry to be dense here but how does >> >the full 64B store differ from other stores d

Re: 4.12-rc ppc64 4k-page needs costly allocations

2017-05-31 Thread Hugh Dickins
[ Merging two mails into one response ] On Wed, 31 May 2017, Christoph Lameter wrote: > On Tue, 30 May 2017, Hugh Dickins wrote: > > SLUB: Unable to allocate memory on node -1, gfp=0x14000c0(GFP_KERNEL) > > cache: pgtable-2^12, object size: 32768, buffer size: 65536, default > > order: 4, min o

Re: 4.12-rc ppc64 4k-page needs costly allocations

2017-05-31 Thread Mathieu Malaterre
On Wed, May 31, 2017 at 8:44 PM, Hugh Dickins wrote: > [ Merging two mails into one response ] > > On Wed, 31 May 2017, Christoph Lameter wrote: >> On Tue, 30 May 2017, Hugh Dickins wrote: >> > SLUB: Unable to allocate memory on node -1, gfp=0x14000c0(GFP_KERNEL) >> > cache: pgtable-2^12, object

Re: [v3 0/9] parallelized "struct page" zeroing

2017-05-31 Thread Pasha Tatashin
OK, so why cannot we make zero_struct_page 8x 8B stores, other arches would do memset. You said it would be slower but would that be measurable? I am sorry to be so persistent here but I would be really happier if this didn't depend on the deferred initialization. If this is absolutely a no-go the

Re: [PATCH] powerpc/powernv: Enable PCI peer-to-peer

2017-05-31 Thread kbuild test robot
Hi Frederic, [auto build test ERROR on powerpc/next] [also build test ERROR on v4.12-rc3 next-20170531] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Frederic-Barrat/powerpc-powernv-Enable-PCI

Re: 4.12-rc ppc64 4k-page needs costly allocations

2017-05-31 Thread Aneesh Kumar K.V
Hugh Dickins writes: > Since f6eedbba7a26 ("powerpc/mm/hash: Increase VA range to 128TB") > I find that swapping loads on ppc64 on G5 with 4k pages are failing: > > SLUB: Unable to allocate memory on node -1, gfp=0x14000c0(GFP_KERNEL) > cache: pgtable-2^12, object size: 32768, buffer size: 6553

[PATCH v3 1/3] powerpc/powernv: Add config option for removal of memory

2017-05-31 Thread Rashmica Gupta
This patch adds the config option to enable the removal of memory from the kernel mappings at runtime. This needs to be enabled for the hardware trace macro to work. Signed-off-by: Rashmica Gupta --- v2 -> v3: Better description arch/powerpc/platforms/powernv/Kconfig | 8 arch/powerpc

[PATCH v3 2/3] powerpc/powernv: Enable removal of memory for in memory tracing

2017-05-31 Thread Rashmica Gupta
The hardware trace macro feature requires access to a chunk of real memory. This patch provides a debugfs interface to do this. By writing an integer containing the size of memory to be unplugged into /sys/kernel/debug/powerpc/memtrace/enable, the code will attempt to remove that much memory from t

[PATCH v3 3/3] Add documentation for the powerpc memtrace debugfs files

2017-05-31 Thread Rashmica Gupta
CONFIG_PPC64_HARDWARE_TRACING must be set to use this feature. This can only be used on powernv platforms. Signed-off-by: Rashmica Gupta --- Documentation/ABI/testing/ppc-memtrace | 45 ++ 1 file changed, 45 insertions(+) create mode 100644 Documentation/ABI/test

Re: linux-next: Tree for May 31

2017-05-31 Thread Michael Ellerman
able to handle kernel paging request for data at address 0x04f0 Faulting instruction address: 0xc033fd48 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=2048 NUMA PowerNV Modules linked in: CPU: 0 PID: 0 Comm: swapper Not tainted 4.12.0-rc3-gccN-next-

Re: linux-next: Tree for May 31

2017-05-31 Thread Stephen Rothwell
033fd48 > Oops: Kernel access of bad area, sig: 11 [#1] > SMP NR_CPUS=2048 > NUMA > PowerNV > Modules linked in: > CPU: 0 PID: 0 Comm: swapper Not tainted > 4.12.0-rc3-gccN-next-20170531-gf2882f4 #1 > task: c0fb1200 task.stack: c1104000 > NIP:

Re: [PATCH V3 2/2] KVM: PPC: Book3S HV: Enable guests to use large decrementer mode on POWER9

2017-05-31 Thread Suraj Jitindar Singh
On Mon, 2017-05-29 at 20:12 +1000, Paul Mackerras wrote: > This allows userspace (e.g. QEMU) to enable large decrementer mode > for > the guest when running on a POWER9 host, by setting the LPCR_LD bit > in > the guest LPCR value.  With this, the guest exit code saves 64 bits > of > the guest DEC v