Balbir Singh a écrit :
On Tue, 2017-05-16 at 22:20 +0200, LEROY Christophe wrote:
Balbir Singh a écrit :
> patch_instruction is enhanced in this RFC to support
> patching via a different virtual address (text_poke_area).
> The mapping of text_poke_area->addr is RW and not RWX.
> This way the
Anju T Sudhakar writes:
> --- a/arch/powerpc/include/asm/imc-pmu.h
> +++ b/arch/powerpc/include/asm/imc-pmu.h
> @@ -24,6 +24,7 @@
> */
> #define IMC_MAX_CHIPS32
> #define IMC_MAX_PMUS 32
> +#define IMC_MAX_CORES32
>
> /*
> * Th
On 05/15/2017, 03:16 PM, Will Deacon wrote:
> Whilst I think this is a good idea, the code in question actually results
> in undefined behaviour per the C spec and is reported by UBSAN.
Hi, yes, I know -- this patch was the 1st from the series of 3 which I
sent a long time ago to fix that up too.
On Mon, 2017-05-08 at 07:16:26 UTC, Michael Neuling wrote:
> In this commit:
> commit dc3106690b20305c3df06b42456fe386dd632ac9
> Author: Cyril Bur
> powerpc: tm: Always use fp_state and vr_state to store live registers
>
> A section of code was removed that copied the current state to
> che
On Mon, 2017-05-08 at 07:16:27 UTC, Michael Neuling wrote:
> Test that the VMX checkpointed register state is maintained when a VMX
> unavailable exception is taken during a transaction.
>
> Thanks to Breno Leitao and
> Gustavo Bueno Romero for the original test this
> is based heavily on.
>
>
On Wed, 2017-05-10 at 06:57:49 UTC, Michael Ellerman wrote:
> On powerpc we can build the kernel with two different ABIs for mcount(), which
> is used by ftrace. Kernels built with one ABI do not know how to load modules
> built with the other ABI. The new style ABI is called "mprofile-kernel", for
On Fri, 2017-05-12 at 09:22:06 UTC, "Gautham R. Shenoy" wrote:
> From: "Gautham R. Shenoy"
>
> commit 17ed4c8f81da ("powerpc/powernv: Recover correct PACA on wakeup
> from a stop on P9 DD1") promises to set the NAPSTATELOST bit in paca
> after recovering the correct paca for the thread waking up
On Mon, 2017-05-15 at 18:10:05 UTC, "Naveen N. Rao" wrote:
> Commit 22d8b3dec214c ("powerpc/kprobes: Emulate instructions on kprobe
> handler re-entry") enabled emulating instructions on kprobe re-entry,
> rather than single-stepping always. However, we didn't update the single
> stepping code to o
On Tue, 2017-05-16 at 10:50:35 UTC, Michael Ellerman wrote:
> The page table dump code doesn't know about huge pages, so currently
> it crashes (or walks random memory, usually leading to a crash), if it
> finds a huge page. On Book3S we only see huge pages in the Linux page
> tables when we're usi
> > Kees, depending on how that turns out we may ask you to revert
> > 517e1fbeb65f ("mm/usercopy: Drop extra is_vmalloc_or_module() check").
>
> That's fine by me. Let me know what you think would be best.
>
> Laura, I don't see much harm in putting this back in place. It seems
> like it's just
On Tue, 2017-05-16 at 14:56 +0530, Aneesh Kumar K.V wrote:
> Add __hard_irqs_disabled() similar to arch_irqs_disabled to check whether irqs
> are hard disabled.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/include/asm/hw_irq.h | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff
On Tue 2017-05-16 13:48:06, Christoph Hellwig wrote:
> KTHREAD_DELAYED_WORK_INIT and DEFINE_KTHREAD_DELAYED_WORK are unused
> and are using a timer helper that's about to go away.
A patch using this API is flying around, see
https://lkml.kernel.org/r/1476715742-14924-1-git-send-email-pmla...@suse.
Hi Michael,
On Friday 24 February 2017 05:54 PM, Hari Bathini wrote:
By default, 5% of system RAM is reserved for preserving boot memory.
Alternatively, a user can specify the amount of memory to reserve.
See Documentation/powerpc/firmware-assisted-dump.txt for details. In
addition to the memor
On Sun 2017-04-02 12:05:36, Pavel Machek wrote:
> Fix overlapping NAND partitions.
>
> Signed-off-by: Pavel Machek
Ping? Two partitions at same place are bad news...
Pavel
> diff --git a/arch/powerpc/boot/dts/sequoia.dts
>
Top-posting so that the PPC list can see the whole patch below.
Since I don't know PPC, let me add PPC ML to CC for a confirmation this
change is correct.
Which brings me to the tangential: this driver is from 2006-ish and
is for some "Marvell MV64x60 Memory Controller kernel module for PPC
platf
On 18/05/17 06:18, Borislav Petkov wrote:
> Top-posting so that the PPC list can see the whole patch below.
>
> Since I don't know PPC, let me add PPC ML to CC for a confirmation this
> change is correct.
>
> Which brings me to the tangential: this driver is from 2006-ish and
> is for some "Marvell
On Wed, 17 May 2017 14:06:13 +0200 Pavel Machek wrote:
> On Sun 2017-04-02 12:05:36, Pavel Machek wrote:
> > Fix overlapping NAND partitions.
> >
> > Signed-off-by: Pavel Machek
>
> Ping? Two partitions at same place are bad news...
Please expand on "bad news"? What are the runtime effects o
On Wed, May 17, 2017 at 11:16 PM, Chris Packham
wrote:
> On 18/05/17 06:18, Borislav Petkov wrote:
> One thing I would like confirmation on is is in_le32 -> ioread32 the
> correct change? I tossed up between ioread32 and readl. Looking at
> mv643xx_eth.c which supports both the MV643XX and Orion i
Laura Abbott writes:
> On 05/16/2017 07:32 AM, Kees Cook wrote:
>> On Tue, May 16, 2017 at 4:09 AM, Michael Ellerman
>> wrote:
>>> [Cc'ing the relevant folks]
>>>
>>> Breno Leitao writes:
Hello,
Kernel 4.12-rc1 is showing a bug when I try it on a POWER8 virtual
machine. Jus
"Aneesh Kumar K.V" writes:
> POWER9 supports hugepages of size 2M and 1G in radix MMU mode. This patch
> enables the usage of 1G page size for hugetlbfs. This also update the helper
> such we can do 1G page allocation at runtime.
>
> We still don't enable 1G page size on DD1 version. This is to a
"Naveen N. Rao" writes:
> As pointed out in x86 setjmp_pre_handler(), we need to save and restore
> the parameter save area since the jprobe hook might overwrite it. Since
> there is no easy way to identify the size of the parameter save area,
> we choose to save/restore a fixed 16 [double]word-s
Borislav Petkov writes:
> Top-posting so that the PPC list can see the whole patch below.
>
> Since I don't know PPC, let me add PPC ML to CC for a confirmation this
> change is correct.
>
> Which brings me to the tangential: this driver is from 2006-ish and
> is for some "Marvell MV64x60 Memory
On Thursday 18 May 2017 10:51 AM, Michael Ellerman wrote:
"Aneesh Kumar K.V" writes:
POWER9 supports hugepages of size 2M and 1G in radix MMU mode. This patch
enables the usage of 1G page size for hugetlbfs. This also update the helper
such we can do 1G page allocation at runtime.
We still
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