By default, PPC8xx PINs an ITLB on the first 8M of memory in order
to avoid any ITLB miss on kernel code.
However, with some debug functions like DEBUG_PAGEALLOC and
(soon to come) DEBUG_RODATA, the PINned TLB is invalidated soon
after startup so ITLB missed start to happen also on the kernel code.
We added the addr < TASK_SIZE check to avoid updating addr_limit unnecessarily
and
also to avoid calling slice_flush_segments on all the cpus. This had the side
effect of having different behaviour when using an addr value above TASK_SIZE
before updating addr_limit and after updating addr_limit as
Le 18/04/2017 à 08:40, Michael Ellerman a écrit :
Christophe Leroy writes:
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index a65c0b4c0669..d506bd61b629 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -323,6 +323,26 @@ get_pteptr(s
From: Colin Ian King
Trivial fix to spelling mistake in pr_info message.
Signed-off-by: Colin Ian King
---
arch/powerpc/sysdev/xive/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/xive/common.c
b/arch/powerpc/sysdev/xive/common.c
index d9cd7f70
Le 14/04/2017 à 15:31, Christophe Leroy a écrit :
As stated in the comment on top of transfer_to_handler(),
all callers set cr0.eq if the exception occurred in kernel mode
(i.e. MSR:PR = 0)
Therefore, it is not needed to do the test again
Indeed, all callers set cr0.eq as required excep
On Tue, 2017-04-11 at 05:08:13 UTC, Ravi Bangoria wrote:
> If we set a kprobe on a 'stdu' instruction on powerpc64, we see a kernel
> OOPS:
>
> [ 1275.165932] Bad kernel stack pointer cd93c840 at c0009868
> [ 1275.166378] Oops: Bad kernel stack pointer, sig: 6 [#1]
> ...
> GPR00:
On Tue, 2017-04-18 at 05:04:46 UTC, Michael Ellerman wrote:
> Prior to commit 2337d207288f ("powerpc/64: CONFIG_RELOCATABLE support for hmi
> interrupts"), the branch from hmi_exception_early() to
> hmi_exception_realmode()
> was just a bl hmi_exception_realmode, which the linker would turn into a
From: Naveen N. Rao
> Sent: 12 April 2017 11:58
...
> +kprobe_opcode_t *kprobe_lookup_name(const char *name)
> +{
...
> + char dot_name[MODULE_NAME_LEN + 1 + KSYM_NAME_LEN];
> + const char *modsym;
> + bool dot_appended = false;
> + if ((modsym = strchr(name, ':')) != NULL) {
> +
On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote:
> From: Yongji Xie
>
> This overrides pcibios_default_alignment() to set default alignment
> to PAGE_SIZE for all PCI devices on PowerNV platform. Thus sub-page
> BARs would not share a page and could be mapped into guest when VFIO
> passthrou
On Mon, 17 Apr 2017 20:43:02 +0530
Hari Bathini wrote:
> On Friday 14 April 2017 01:28 AM, Michal Suchánek wrote:
> > On Thu, 13 Apr 2017 01:59:13 +0530
> > Hari Bathini wrote:
> >
> >> On Friday 07 April 2017 07:16 PM, Michael Ellerman wrote:
> >>> Hari Bathini writes:
> On Friday 0
From: Mahesh Salgaonkar
machine_check_early() gets called in real mode. The very first time when
add_taint() is called, it prints a warning which ends up calling opal
call (that uses OPAL_CALL wrapper) for writing it to console. If we get a
very first machine check while we are in opal we are doo
On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler
wrote:
> This patch introduces event tracepoints for tracking a device_nodes
> reference cycle as well as reconfig notifications generated in response
> to node/property manipulations.
>
> With the recent upstreaming of the refcount API several devic
Power9 has In-Memory-Collection (IMC) infrastructure which contains
various Performance Monitoring Units (PMUs) at Nest level (these are
on-chip but off-core), Core level and Thread level.
The Nest PMU counters are handled by a Nest IMC microcode which runs
in the OCC (On-Chip Controller) complex.
From: Hemant Kumar
Create a new header file to add the data structures and
macros needed for In-Memory Collection (IMC) counter support.
Signed-off-by: Anju T Sudhakar
Signed-off-by: Hemant Kumar
Signed-off-by: Madhavan Srinivasan
---
arch/powerpc/include/asm/imc-pmu.h | 95 +
Adds cpumask attribute to be used by each IMC pmu. Only one cpu (any
online CPU) from each chip for nest PMUs is designated to read counters.
On CPU hotplug, dying CPU is checked to see whether it is one of the
designated cpus, if yes, next online cpu from the same chip (for nest
units) is designa
Patch adds support for detection of thread IMC events. It adds a new
domain IMC_DOMAIN_THREAD and it is determined with the help of the
compatibility string "ibm,imc-counters-thread" based on the IMC device
tree.
Signed-off-by: Anju T Sudhakar
Signed-off-by: Hemant Kumar
Signed-off-by: Madhavan
This patch adds the PMU functions required for event initialization,
read, update, add, del etc. for thread IMC PMU. Thread IMC PMUs are used
for per-task monitoring.
For each CPU, a page of memory is allocated and is kept static i.e.,
these pages will exist till the machine shuts down. The base
Parse device tree to detect IMC units. Traverse through each IMC unit
node to find supported events and corresponding unit/scale files (if any).
Here is the DTS file for reference:
https://github.com/open-power/ima-catalog/blob/master/81E00612.4E0100.dts
The device tree for IMC counters
This patch does three things :
- Enables "opal.c" to create a platform device for the IMC interface
according to the appropriate compatibility string.
- Find the reserved-memory region details from the system device tree
and get the base address of HOMER (Reserved memory) region address for
From: Hemant Kumar
This patch adds support for detection of core IMC events along with the
Nest IMC events. It adds a new domain IMC_DOMAIN_CORE and its determined
with the help of the compatibility string "ibm,imc-counters-core" based
on the IMC device tree.
Signed-off-by: Anju T Sudhakar
Sign
This patch adds support for thread IMC on cpuhotplug.
When a cpu goes offline, the LDBAR for that cpu is disabled, and when it comes
back online the previous ldbar value is written back to the LDBAR for that cpu.
To register the hotplug functions for thread_imc, a new state
CPUHP_AP_PERF_POWERPC_
From: Hemant Kumar
This patch adds the PMU function to initialize a core IMC event. It also
adds cpumask initialization function for core IMC PMU. For
initialization, a 8KB of memory is allocated per core where the data
for core IMC counters will be accumulated. The base address for this
page is
From: Hemant Kumar
Device tree IMC driver code parses the IMC units and their events. It
passes the information to IMC pmu code which is placed in powerpc/perf
as "imc-pmu.c".
Patch adds a set of generic imc pmu related event functions to be
used by each imc pmu unit. Add code to setup format a
On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote:
SNIP
> +static int branch_type_str(struct branch_type_stat *stat,
> +char *bf, int bfsize)
> +{
> + int i, j = 0, printed = 0;
> + u64 total = 0;
> +
> + for (i = 0; i < PERF_BR_MAX; i++)
> +
On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote:
SNIP
> static int counts_str_build(char *bf, int bfsize,
>u64 branch_count, u64 predicted_count,
>u64 abort_count, u64 cycles_count,
> - u64 iter_count, u64 s
On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote:
SNIP
> +const char *branch_type_name(int type)
> +{
> + const char *branch_names[PERF_BR_MAX] = {
> + "N/A",
> + "JCC",
> + "JMP",
> + "IND_JMP",
> + "CALL",
> + "I
On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote:
SNIP
> +static int hist_iter__branch_callback(struct hist_entry_iter *iter,
> + struct addr_location *al __maybe_unused,
> + bool single __maybe_unused,
> +
I included binding documentation in OPAL, and wrote a design
overview and implementation guideline document. Writing updated
documentation lead to some small changes in the specification.
Also a number of other small changes to Linux and OPAL.
Thanks,
Nick
The XIVE enablement patches set LPES0 on POWER9 host. This bit sets
external interrupts to guest delivery mode that uses SRR[01]. The host's
EE interrupt handler expects HSRR[01] (for earlier CPUs). which is fine
because XIVE is configured not to deliver EE to the host (HVI is used
instead) so this
POWER9/ISAv3 has no VRMASD field in LPCR. Don't set reserved bits.
Signed-off-by: Nicholas Piggin
---
arch/powerpc/kernel/cpu_setup_power.S | 21 -
1 file changed, 12 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/kernel/cpu_setup_power.S
b/arch/powerpc/kernel/cpu_
Introduce primitives for FDT parsing. These will be used for powerpc
cpufeatures node scanning, which has quite complex structure but should
be processed early.
Cc: devicet...@vger.kernel.org
Acked-by: Rob Herring
Signed-off-by: Nicholas Piggin
---
drivers/of/fdt.c | 38 ++
The /cpus/ibm,powerpc-cpu-features dt binding describes CPU features with
ascii names and extensible compatibility, privilege, and enablement metadata
that allows improved flexibility and compatibility with new hardware.
Design overview and specification of features is available in the OPAL
source
Since last time:
- Added binding specification and design overview documentation.
- Renamed the dt node to ibm,powerpc specific.
- Moved dependency building pass into its own function.
---
core/Makefile.inc | 2 +-
core/cpufeatures.c
From: Sebastian Andrzej Siewior
kvmppc_alloc_host_rm_ops() holds get_online_cpus() while invoking
cpuhp_setup_state_nocalls().
cpuhp_setup_state_nocalls() invokes get_online_cpus() as well. This is
correct, but prevents the conversion of the hotplug locking to a percpu
rwsem.
Use cpuhp_setup_st
set_subcores_per_core() holds get_online_cpus() while invoking stop_machine().
stop_machine() invokes get_online_cpus() as well. This is correct, but
prevents the conversion of the hotplug locking to a percpu rwsem.
Use stop_machine_cpuslocked() to avoid the nested call.
Signed-off-by: Sebastian
On Wed, 12 Apr 2017, Oliver O'Halloran wrote:
> Depending flags of the PMD being zapped there may or may not be a
> deposited pgtable to be freed. In two of the three cases this is open
> coded while the third uses the zap_deposited_table() helper. This patch
> converts the others to use the helpe
On 04/17/17 17:32, Tyrel Datwyler wrote:
> This patch introduces event tracepoints for tracking a device_nodes
> reference cycle as well as reconfig notifications generated in response
> to node/property manipulations.
>
> With the recent upstreaming of the refcount API several device_node
> under
On 4/19/2017 2:53 AM, Jiri Olsa wrote:
On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote:
SNIP
static int counts_str_build(char *bf, int bfsize,
u64 branch_count, u64 predicted_count,
u64 abort_count, u64 cycles_count,
-
On 4/19/2017 2:53 AM, Jiri Olsa wrote:
On Wed, Apr 12, 2017 at 06:21:06AM +0800, Jin Yao wrote:
SNIP
+static int branch_type_str(struct branch_type_stat *stat,
+ char *bf, int bfsize)
+{
+ int i, j = 0, printed = 0;
+ u64 total = 0;
+
+ for (i = 0;
On 4/19/2017 2:53 AM, Jiri Olsa wrote:
On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote:
SNIP
+static int hist_iter__branch_callback(struct hist_entry_iter *iter,
+ struct addr_location *al __maybe_unused,
+ bool
On 4/19/2017 2:53 AM, Jiri Olsa wrote:
On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote:
SNIP
+const char *branch_type_name(int type)
+{
+ const char *branch_names[PERF_BR_MAX] = {
+ "N/A",
+ "JCC",
+ "JMP",
+ "IND_JMP",
+
Frank Rowand writes:
> On 04/17/17 17:32, Tyrel Datwyler wrote:
>> This patch introduces event tracepoints for tracking a device_nodes
>> reference cycle as well as reconfig notifications generated in response
>> to node/property manipulations.
>>
>> With the recent upstreaming of the refcount A
On 04/18/17 17:07, Frank Rowand wrote:
> On 04/17/17 17:32, Tyrel Datwyler wrote:
>> This patch introduces event tracepoints for tracking a device_nodes
>> reference cycle as well as reconfig notifications generated in response
>> to node/property manipulations.
>>
>> With the recent upstreaming of
Bjorn Helgaas writes:
> On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote:
>> From: Yongji Xie
>> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
>> b/arch/powerpc/platforms/powernv/pci-ioda.c
>> index 6901a06da2f9..b724487cbd0f 100644
>> --- a/arch/powerpc/platforms/powernv/pci-ioda
NeilBrown writes:
> mempool_alloc() cannot fail when passed GFP_NOIO or any other gfp
> setting that is permitted to sleep. So remove this pointless code.
Applied to 4.12/scsi-queue. Thanks!
--
Martin K. Petersen Oracle Linux Engineering
On 19 April 2017 at 09:47, Michael Ellerman wrote:
> Bjorn Helgaas writes:
>
>> On Mon, Apr 17, 2017 at 4:36 PM, Bjorn Helgaas wrote:
>>> From: Yongji Xie
>>> diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
>>> b/arch/powerpc/platforms/powernv/pci-ioda.c
>>> index 6901a06da2f9..b724487c
POWER9 does not implement this instruction.
Fixes: c3ab300ea5 ("powerpc: Add POWER9 cputable entry")
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/cputable.h| 2 +-
arch/powerpc/platforms/Kconfig.cputype | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/a
Signed-off-by: Nicholas Piggin
---
arch/powerpc/include/asm/cputable.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/cputable.h
b/arch/powerpc/include/asm/cputable.h
index 9c3a44bb4694..456f584952f8 100644
--- a/arch/powerpc/include/asm/cputable.h
On Wed, Apr 19, 2017 at 2:46 AM, Rob Herring wrote:
> On Mon, Apr 17, 2017 at 7:32 PM, Tyrel Datwyler
> wrote:
>> This patch introduces event tracepoints for tracking a device_nodes
>> reference cycle as well as reconfig notifications generated in response
>> to node/property manipulations.
>>
>>
On 04/18/17 18:31, Michael Ellerman wrote:
> Frank Rowand writes:
>
>> On 04/17/17 17:32, Tyrel Datwyler wrote:
>>> This patch introduces event tracepoints for tracking a device_nodes
>>> reference cycle as well as reconfig notifications generated in response
>>> to node/property manipulations.
>
Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block
PCI config access upon frozen PE"), we need block PCI config access
for BCM5719 when recovering frozen error on them. Otherwise, an
unexpected recursive fenced PHB error is observed.
0001:06:00.0 Ethernet controller: Broadcom C
On Tue, 18 Apr 2017 17:07:17 -0700
Frank Rowand wrote:
> As far as I know, there is no easy way to combine trace data and printk()
> style data to create a single chronology of events. If some of the
> information needed to debug an issue is trace data and some is printk()
> style data then it
On Tue, 18 Apr 2017 18:42:32 -0700
Frank Rowand wrote:
> And of course the other issue with using tracepoints is the extra space
> required to hold the tracepoint info. With the pr_debug() approach, the
> space usage can be easily removed for a production kernel via a config
> option.
Now if yo
On 04/18/17 19:46, Steven Rostedt wrote:
> On Tue, 18 Apr 2017 17:07:17 -0700
> Frank Rowand wrote:
>
>
>> As far as I know, there is no easy way to combine trace data and printk()
>> style data to create a single chronology of events. If some of the
>> information needed to debug an issue is t
On Wed, Apr 19, 2017 at 12:39:43PM +1000, Gavin Shan wrote:
>Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block
>PCI config access upon frozen PE"), we need block PCI config access
>for BCM5719 when recovering frozen error on them. Otherwise, an
>unexpected recursive fenced PHB err
On Wed, 2017-04-05 at 02:44:49 UTC, Michael Ellerman wrote:
> Of the 64-bit Book3S platforms, only powermac supports booting on an
> actual non-SMP system. The other platforms can be built with SMP
> disabled, but it doesn't make a lot of sense given the CPUs they support
> are all multicore or mul
On Fri, 2017-04-07 at 01:27:43 UTC, Nicholas Piggin wrote:
> Signed-off-by: Nicholas Piggin
Series applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/794464f4dea0b13dacad267c06a01f
cheers
On Fri, 2017-04-07 at 14:11:53 UTC, Christophe Lombard wrote:
> This bit is used to cause a flash image load for programmable
> CAIA-compliant implementation. If this bit is set to â0â, a power
> cycle of the adapter is required to load a programmable CAIA-com-
> pliant implementation from flas
On Wed, 2017-04-12 at 04:40:22 UTC, "Aneesh Kumar K.V" wrote:
> Also remove wrong indentation to fix checkpatch.pl warning.
>
> Signed-off-by: Aneesh Kumar K.V
Applied to powerpc next, thanks.
https://git.kernel.org/powerpc/c/5f8122611b35c563a7c907485aafd8
cheers
On Wed, 2017-04-12 at 14:34:07 UTC, Frederic Barrat wrote:
> From: Christophe Lombard
>
> The new Coherent Accelerator Interface Architecture, level 2, for the
> IBM POWER9 brings new content and features:
> - POWER9 Service Layer
> - Registers
> - Radix mode
> - Process element entry
> - Dedicat
On Thu, 2017-04-13 at 10:16:21 UTC, Nicholas Piggin wrote:
> Change the doorbell callers to know about their msgsnd addressing,
> rather than have them set a per-cpu target data tag at boot that gets
> sent to the cause_ipi functions. The data is only used for doorbell IPI
> functions, no other IPI
On Thu, 2017-04-13 at 13:14:36 UTC, Michael Ellerman wrote:
> Currently powerpc's asm/io.h includes linux/io.h, and linux/io.h
> includes asm/io.h.
>
> This can cause problems because depending on which is included first the
> order of definitions between the two files will change.
>
> The includ
On 4/19/2017 8:53 AM, Jin, Yao wrote:
On 4/19/2017 2:53 AM, Jiri Olsa wrote:
On Wed, Apr 12, 2017 at 06:21:05AM +0800, Jin Yao wrote:
SNIP
+const char *branch_type_name(int type)
+{
+const char *branch_names[PERF_BR_MAX] = {
+"N/A",
+"JCC",
+"JMP",
+"IN
Michal Suchánek writes:
> On Mon, 17 Apr 2017 20:43:02 +0530
> Hari Bathini wrote:
>> On Friday 14 April 2017 01:28 AM, Michal Suchánek wrote:
>> > more (optional) properties cannot be added?
>>
>> Kernel change seems simple over f/w enhancement..
>
> That certainly looks so when you are a ker
Similar to what is done in commit b6541db13952 ("powerpc/eeh: Block
PCI config access upon frozen PE"), we need block PCI config access
for BCM5719 when recovering frozen error on them. Otherwise, an
unexpected recursive fenced PHB error is observed.
0001:06:00.0 Ethernet controller: Broadcom C
Peter Zijlstra writes:
> On Tue, Apr 11, 2017 at 07:21:05AM +0530, Madhavan Srinivasan wrote:
>> From: Sukadev Bhattiprolu
>>
>> perf_mem_data_src is an union that is initialized via the ->val field
>> and accessed via the bitmap fields. For this to work on big endian
>> platforms (Which is bro
In crct10dif_vpmsum() we call enable_kernel_altivec() without first
disabling preemption, which is not allowed.
It used to be sufficient just to call pagefault_disable(), because that
also disabled preemption. But the two were decoupled in commit 8222dbe21e79
("sched/preempt, mm/fault: Decouple pr
There seems to be a mismatch in expectations between the powerpc arch code
and the generic (and x86) code in terms of the irq state when switch_mm()
is called.
powerpc expects irqs to already be (soft) disabled when switch_mm() is
called, as made clear in the commit message of 9c1e105 "powerpc: Al
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