Daniel Walker writes:
> On 03/24/2017 07:16 PM, Oliver O'Halloran wrote:
>> On Sat, Mar 25, 2017 at 4:00 AM, Daniel Walker wrote:
>>> I get this build failure,
>>>
>>>
>>> In file included from arch/powerpc/boot/fdt.c:51:
>>> ../arch/powerpc/boot/libfdt_env.h:9: error: redefinition of typedef
>>
This is a small cleanup patch series which removes MLCK enable/disable
from imx-wm8962 machine driver and lets the codec handle that.
While reviewing this, Nicolin noticed that codec_clk cleanup is not correct
so the second patch fixes this.
Changes since v2:
* added 2/2 patch to fix code
WM8962 needs its MCLK when powerup in wm8962_resume(). Thus it's better
to control the MCLK in codec driver. Thus remove the clock enable in
machine driver accordingly.
While at it, get rid of imx_wm8962_remove function since it is now
empty.
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/imx-w
Resource managed devm_clk_get only works with platform's device dev.
Reported-by: Nicolin Chen
Signed-off-by: Daniel Baluta
---
sound/soc/fsl/imx-wm8962.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/fsl/imx-wm8962.c b/sound/soc/fsl/imx-wm8962.c
index 3d894d9.
On Tue, Mar 28, 2017 at 11:58:52AM +0300, Daniel Baluta wrote:
> Resource managed devm_clk_get only works with platform's device dev.
>
I feel like this could use an explaination of why not using devm
is the correct fix, rather than just using the platform device
for the call. Its not obvious to
Abdul Haleem writes:
> Hi,
>
> While running kernel self tests on ppc64, tm/tm-signal-context-chk-vsx
> tests fails with Oops message.
>
> I was able to reproduce only twice out of 20 runs on next-20170324 only.
> so it is difficult to bisect the commit causing the issue.
Can you try mainline a
On 2017/03/28 11:44AM, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
>
> > diff --git a/arch/powerpc/lib/mem_64.S b/arch/powerpc/lib/mem_64.S
> > index 85fa9869aec5..ec531de6 100644
> > --- a/arch/powerpc/lib/mem_64.S
> > +++ b/arch/powerpc/lib/mem_64.S
> > @@ -13,6 +13,23 @@
> > #includ
Alexey Kardashevskiy writes:
> The CMA pages migration code does not support compound pages at
> the moment so it performs few tests before proceeding to actual page
> migration.
>
> One of the tests - PageTransHuge() - has VM_BUG_ON_PAGE(PageTail()) as
> it should be called on head pages. Since
On Tue, Mar 28, 2017 at 12:21 PM, Charles Keepax
wrote:
> On Tue, Mar 28, 2017 at 11:58:52AM +0300, Daniel Baluta wrote:
>> Resource managed devm_clk_get only works with platform's device dev.
>>
>
> I feel like this could use an explaination of why not using devm
> is the correct fix, rather than
"Aneesh Kumar K.V" writes:
> As we start supporting larger address space (>128TB), we want to give
> architecture a control on max task size of an application which is different
> from the TASK_SIZE. For ex: ppc64 needs to track the base page size of a
> segment
> and it is copied from mm_contex
On 28/03/17 21:45, Michael Ellerman wrote:
> Alexey Kardashevskiy writes:
>
>> The CMA pages migration code does not support compound pages at
>> the moment so it performs few tests before proceeding to actual page
>> migration.
>>
>> One of the tests - PageTransHuge() - has VM_BUG_ON_PAGE(PageTa
On Tue, Mar 28, 2017 at 01:47:04PM +0300, Daniel Baluta wrote:
> On Tue, Mar 28, 2017 at 12:21 PM, Charles Keepax
> wrote:
> > On Tue, Mar 28, 2017 at 11:58:52AM +0300, Daniel Baluta wrote:
> >> Resource managed devm_clk_get only works with platform's device dev.
> >>
> >
> > I feel like this coul
From: Mahesh Salgaonkar
For D-side errors we print data load/store address as 'Effective address'
that caused MC. In addition to print NIP, print kernel function name as well.
After this patch the MCE console log would look like:
[ 291.444281] Severe Machine check interrupt [Recovered]
[ 291.
From: Mahesh Salgaonkar
For MCE that hit while in use mode MSR(HV=1,PR=1), print the task info on the
console MCE error log. This will help to identify application that stumbled
upon MCE error.
After this patch the MCE console log would look like:
[1.268998] Severe Machine check interrupt [
On 03/28/2017 02:35 AM, Michael Ellerman wrote:
Daniel Walker writes:
On 03/24/2017 07:16 PM, Oliver O'Halloran wrote:
On Sat, Mar 25, 2017 at 4:00 AM, Daniel Walker wrote:
I get this build failure,
In file included from arch/powerpc/boot/fdt.c:51:
../arch/powerpc/boot/libfdt_env.h:9: err
Point out the specific Coherent Accelerator Interface Architecture,
level 1, registers.
Code and functions specific to PSL8 (CAIA1) must be framed.
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/context.c | 28 +++-
drivers/misc/cxl/cxl.h | 35 +++-
The two fields pid and tid of the structure cxl_irq_info are only used
in the guest environment. To avoid confusion, it's not necessary
to fill the fields in the bare-metal environment. These two fields
are renamed to 'reserved' to avoid undefined behavior on bare-metal.
The PSL Process and Thread
This bit is used to cause a flash image load for programmable
CAIA-compliant implementation. If this bit is set to ‘0’, a power
cycle of the adapter is required to load a programmable CAIA-com-
pliant implementation from flash.
This field will be used by the following patches.
Signed-off-by: Chris
The mm_struct corresponding to the current task is acquired each time
an interrupt is raised. So to simplify the code, we only get the
mm_struct when attaching an AFU context to the process.
The mm_count reference is increased to ensure that the mm_struct can't
be freed. The mm_struct will be relea
This series adds support for a cxl card which supports the Coherent
Accelerator Interface Architecture 2.0.
It requires IBM Power9 system and the Power Service Layer, version 9.
The PSL provides the address translation and system memory cache for
CAIA compliant Accelerators.
the PSL attaches to th
The service layer API (in cxl.h) lists some low-level functions whose
implementation is different on PSL8, PSL9 and XSL:
- Init implementation for the adapter and the afu.
- Invalidate TLB/SLB.
- Attach process for dedicated/directed models.
- Handle psl interrupts.
- Debug registers for the adapte
Rename a few functions, changing the '_psl' suffix to '_psl8', to make
clear that the implementation is psl8 specific.
Those functions will have an equivalent implementation for the psl9 in
a later patch.
Signed-off-by: Christophe Lombard
---
drivers/misc/cxl/cxl.h | 26 +
On Tuesday 28 March 2017 04:47 PM, Michael Ellerman wrote:
"Aneesh Kumar K.V" writes:
As we start supporting larger address space (>128TB), we want to give
architecture a control on max task size of an application which is different
from the TASK_SIZE. For ex: ppc64 needs to track the base p
On Tue, Mar 28, 2017 at 12:53:06PM +0100, Charles Keepax wrote:
> On Tue, Mar 28, 2017 at 01:47:04PM +0300, Daniel Baluta wrote:
> > >> - codec_clk = devm_clk_get(&codec_dev->dev, NULL);
> > >> + codec_clk = clk_get(&codec_dev->dev, NULL);
> > is different from &codec_dev->dev.
> I get t
The new Coherent Accelerator Interface Architecture, level 2, for the
IBM POWER9 brings new content and features:
- POWER9 Service Layer
- Registers
- Radix mode
- Process element entry
- Dedicated-Shared Process Programming Model
- Translation Fault Handling
- CAPP
- Memory Context ID
If a val
On Tue, Mar 28, 2017 at 04:24:57PM +0100, Mark Brown wrote:
> On Tue, Mar 28, 2017 at 12:53:06PM +0100, Charles Keepax wrote:
> > On Tue, Mar 28, 2017 at 01:47:04PM +0300, Daniel Baluta wrote:
>
> > > >> - codec_clk = devm_clk_get(&codec_dev->dev, NULL);
> > > >> + codec_clk = clk_get(&cod
On Mon, Mar 27, 2017 at 8:03 PM, Andrew Donnellan
wrote:
> On 27/03/17 18:38, Andrew Donnellan wrote:
>>
>> On 01/02/17 07:24, Kees Cook wrote:
>>>
>>> From: Emese Revfy
>>>
>>> The kernel already has a mechanism to free up code and data memory that
>>> is only used during kernel or module initia
powerpc arch_mmap_rnd() currently uses hard-coded values - (23-PAGE_SHIFT) for
32-bit and (30-PAGE_SHIFT) for 64-bit, to generate the random offset
for the mmap base address for a ASLR ELF.
This patch makes sure that powerpc mmap arch_mmap_rnd() implementation
is similar to other ARCHs (like x86,
Reviewed-by: Andrew Donnellan
On 29/03/17 02:14, Christophe Lombard wrote:
This bit is used to cause a flash image load for programmable
CAIA-compliant implementation. If this bit is set to ‘0’, a power
cycle of the adapter is required to load a programmable CAIA-com-
pliant implementation from
On 29/03/17 02:14, Christophe Lombard wrote:
The two fields pid and tid of the structure cxl_irq_info are only used
in the guest environment. To avoid confusion, it's not necessary
to fill the fields in the bare-metal environment. These two fields
are renamed to 'reserved' to avoid undefined beha
Denis Kirjanov writes:
> With CONFIG_DEBUG_PREEMPT enabled we see the following trace:
>
> [ 129.314426] BUG: using smp_processor_id() in preemptible []
> code: modprobe/5459
> [ 129.314580] caller is .kvmppc_book3s_init_hv+0x184/0x350 [kvm_hv]
> [ 129.314697] CPU: 11 PID: 5459 Comm: m
On 29/03/17 02:14, Christophe Lombard wrote:
The mm_struct corresponding to the current task is acquired each time
an interrupt is raised. So to simplify the code, we only get the
mm_struct when attaching an AFU context to the process.
The mm_count reference is increased to ensure that the mm_str
"Aneesh Kumar K.V" writes:
> The check against VSID range is implied when we check task size against
> hash and radix pgtable range[1], because we make sure page table range cannot
> exceed vsid range.
>
> [1] BUILD_BUG_ON(TASK_SIZE_USER64 > H_PGTABLE_RANGE);
> BUILD_BUG_ON(TASK_SIZE_USER64 > RAD
On Wed, Mar 22, 2017 at 09:06:47AM +0530, Aneesh Kumar K.V wrote:
> In followup patch we want to increase the va range which will result
> in us requiring high_slices to have more than 64 bits. To enable this
> convert high_slices to bitmap. We keep the number bits same in this patch
> and later ch
On Wednesday 29 March 2017 08:41 AM, Paul Mackerras wrote:
On Wed, Mar 22, 2017 at 09:06:47AM +0530, Aneesh Kumar K.V wrote:
In followup patch we want to increase the va range which will result
in us requiring high_slices to have more than 64 bits. To enable this
convert high_slices to bitmap.
On Wed, Mar 22, 2017 at 09:06:48AM +0530, Aneesh Kumar K.V wrote:
> This avoid copying the slice_mask struct as function return value
Did you do before/after comparisons of kernel text size?
Paul.
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