Scott Wood writes:
> On Tue, 2017-02-28 at 14:55 +, Laurentiu Tudor wrote:
>> On 02/17/2017 02:18 PM, Aneesh Kumar K.V wrote:
>> > laurentiu.tu...@nxp.com writes:
>> > > From: Laurentiu Tudor
>> > >
>> > > On 32-bit book-e machines, hugepd_ok() does not take
>> > > into account null hugepd
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Changed new variable na
This patch introduces a new function eeh_pe_update_freeze_counter()
replacing existing function eeh_pe_update_time_stamp(). The new
function also manages the value of reeze_count along with tstamp to
track the number of times the PE roze in last one hour and if the
freeze_count > eeh_max_freezes th
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an existing freeze
count for an adapter wit
v2 changes:
* Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to
avoid adding a header dependency to 'pci-bridge.h'. The function is now
marked as an exported gpl symbol.
* Incorporated changes as suggested by Russell Currey:
- Inserted logging for PHB and PE number in
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
---
Change-log:
v1 -> v2
Changes as suggested by Russell Currey:
- Changed new variable na
Resend:
Update the Cc recipients list.
v2 changes:
* Moved definition of eeh_pe_reset_freeze_counter() from eeh.h to eeh_pe.c to
avoid adding a header dependency to 'pci-bridge.h'. The function is now
marked as an exported gpl symbol.
* Incorporated changes as suggested by Russell Currey:
- I
This patch introduces a new function eeh_pe_update_freeze_counter()
replacing existing function eeh_pe_update_time_stamp(). The new
function also manages the value of reeze_count along with tstamp to
track the number of times the PE roze in last one hour and if the
freeze_count > eeh_max_freezes th
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an existing freeze
count for an adapter wit
Signed-off-by: Paulo Flabiano Smorigo
---
drivers/crypto/vmx/aes_cbc.c | 47 ++--
1 file changed, 24 insertions(+), 23 deletions(-)
diff --git a/drivers/crypto/vmx/aes_cbc.c b/drivers/crypto/vmx/aes_cbc.c
index 94ad5c0..72a26eb 100644
--- a/drivers/crypto/
Signed-off-by: Paulo Flabiano Smorigo
---
drivers/crypto/vmx/aes_xts.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/vmx/aes_xts.c b/drivers/crypto/vmx/aes_xts.c
index 24353ec3..6adc929 100644
--- a/drivers/crypto/vmx/aes_xts
Hi Vaibhav, nice patch! Some comments below:
On 03/01/2017 08:24 AM, Vaibhav Jain wrote:
> This patch introduces a new function eeh_pe_update_freeze_counter()
> replacing existing function eeh_pe_update_time_stamp(). The new
> function also manages the value of reeze_count along with tstamp to
> t
On 2017/02/25 02:12AM, Masami Hiramatsu wrote:
> On Thu, 23 Feb 2017 17:07:24 +0530
> "Naveen N. Rao" wrote:
>
> > We indicate support for accepting sym+offset with kretprobes through a
> > line in ftrace README. Parse the same to identify support and choose the
> > appropriate format for kprobe_
On 2017/02/25 01:46AM, Masami Hiramatsu wrote:
> On Thu, 23 Feb 2017 17:07:23 +0530
> "Naveen N. Rao" wrote:
>
> > ...into a generic function for opening trace files.
>
> Even if it repeats subject, please write complete description...
Agh, ok sure. I will try to curb my urge to not type too mu
On 2017/02/25 08:55AM, Masami Hiramatsu wrote:
> On Fri, 24 Feb 2017 17:11:03 -0300
> Arnaldo Carvalho de Melo wrote:
>
> > Em Sat, Feb 25, 2017 at 02:29:17AM +0900, Masami Hiramatsu escreveu:
> > > On Fri, 24 Feb 2017 00:46:08 +0530
> > > "Naveen N. Rao" wrote:
> > > > Thanks. I hope that's an
On 2017/02/27 11:52AM, Steven Rostedt (VMware) wrote:
> Let's not remove the warning about offsets and return probes when the
> offset is invalid.
Good point!
Thanks, Steve!
>
> Signed-off-by: Steven Rostedt (VMware)
Acked-by: Naveen N. Rao
> ---
> diff --git a/kernel/trace/trace_kprobe.c b
On 2017/02/28 09:11AM, Steven Rostedt wrote:
> On Tue, 28 Feb 2017 15:04:15 +1100
> Michael Ellerman wrote:
>
> kernel/trace/ftrace.c more obvious.
> >
> > I don't know if it's really worth keeping the names the same across
> > arches, especially as we already have:
> >
> > arch/arm64/kernel/
On Sun, Feb 26, 2017 at 2:01 AM, Dmitry V. Levin wrote:
> Include (guarded by #ifndef __KERNEL__) to fix asm/signal.h
> userspace compilation errors like this:
>
> /usr/include/asm/signal.h:126:2: error: unknown type name 'size_t'
> size_t ss_size;
>
> As no uapi header provides a definition of
Thanks for reviewing the patch !!
"Guilherme G. Piccoli" writes:
>
> Not sure why, but many of the words in commit message are missing their
> first letter. See, for example:
> reeze_count, roze, eports, ermanently
Thanks for pointing this out. Will fix this in the subsequent patch
revision.
On 02/28/2017 10:34 PM, Michael Ellerman wrote:
Jason Baron writes:
...
I also checked all the other .ko files and they were properly aligned.
So I think this should hopefully work, and I like that its not a
per-arch fix.
Sachin, sorry to bother you again, but I'm hoping you can try David's
la
On 03/01/2017 01:26 PM, Vaibhav Jain wrote:
>
> Thanks for reviewing the patch !!
Yw =)
>
> "Guilherme G. Piccoli" writes:
>>
>> Not sure why, but many of the words in commit message are missing their
>> first letter. See, for example:
>> reeze_count, roze, eports, ermanently
> Thanks for
On 02/13/2017 07:09 PM, Michael Ellerman wrote:
> Michael Ellerman writes:
>
>> In commit 88baa78d1f31 ("selftests: remove duplicated all and clean
>> target"), the "all" target was removed from individual Makefiles and
>> added to lib.mk.
>>
>> However the "all" target was added to lib.mk *after
On 03/01/2017 11:40 AM, David Daney wrote:
> On 02/28/2017 10:34 PM, Michael Ellerman wrote:
>> Jason Baron writes:
>> ...
>>> I also checked all the other .ko files and they were properly aligned.
>>> So I think this should hopefully work, and I like that its not a
>>> per-arch fix.
>>>
>>> Sac
On 02/02/2017 12:22 AM, Benjamin Herrenschmidt wrote:
This adds AUX vectors for the L1I,D, L2 and L3 cache levels
providing for each cache level the size of the cache in bytes
and the geometry (line size and number of ways).
We chose to not use the existing alpha/sh definition which
packs all th
On 03/01/2017 12:02 PM, Jason Baron wrote:
On 03/01/2017 11:40 AM, David Daney wrote:
On 02/28/2017 10:34 PM, Michael Ellerman wrote:
Jason Baron writes:
...
I also checked all the other .ko files and they were properly aligned.
So I think this should hopefully work, and I like that its not
For powerpc the __jump_table section in modules is not aligned, this
causes a WARN_ON() splat when loading a module containing a __jump_table.
Strict alignment became necessary with commit 3821fd35b58d
("jump_label: Reduce the size of struct static_key"), currently in
linux-next, which uses the tw
On Wed, 2017-03-01 at 21:56 +0530, Vaibhav Jain wrote:
> Thanks for reviewing the patch !!
>
> "Guilherme G. Piccoli" writes:
> >
> > Not sure why, but many of the words in commit message are missing their
> > first letter. See, for example:
> > reeze_count, roze, eports, ermanently
>
> Than
Replace size_t with __kernel_size_t to fix asm/signal.h userspace
compilation errors like this:
/usr/include/asm-generic/signal.h:116:2: error: unknown type name 'size_t'
size_t ss_size;
This change is not applicable to x86 port because x32 is the only
architecture where sizeof(size_t) < sizeof
Include to fix asm/msgbuf.h userspace compilation errors
like this:
/usr/include/asm-generic/msgbuf.h:25:20: error: field 'msg_perm' has incomplete
type
struct ipc64_perm msg_perm;
/usr/include/asm-generic/msgbuf.h:26:2: error: unknown type name
'__kernel_time_t'
__kernel_time_t msg_stime;
Include to fix asm/sembuf.h userspace compilation errors
like this:
/usr/include/asm/sembuf.h:14:20: error: field 'sem_perm' has incomplete type
struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
/usr/include/asm/sembuf.h:15:2: error: unknown type name '__kernel_time_t'
__kernel_time_
Include to fix asm/shmbuf.h userspace compilation errors
like this:
/usr/include/asm-generic/shmbuf.h:26:20: error: field 'shm_perm' has incomplete
type
struct ipc64_perm shm_perm; /* operation perms */
/usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name
'__kernel_time_t'
__ker
Replace size_t with __kernel_size_t to fix asm/shmbuf.h userspace
compilation errors like this:
/usr/include/asm-generic/shmbuf.h:28:2: error: unknown type name 'size_t'
size_t shm_segsz; /* size of segment (bytes) */
x32 is the only architecture where sizeof(size_t) is less than
sizeof(__ker
To determine which logical CPUs are on the same core the kernel uses the
ibm,chipid property from the device tree node associated with that cpu.
The lookup for this this information is currently open coded in both
traverse_siblings() and traverse_siblings_chip_id(). This patch replaces
these manual
Add a helper function for updating the per-cpu core and sibling thread
cpumasks. This helper just sets (or clears) the relevant bit in the
cpumasks each CPU. This is open-coded in several places inside the
mask setup code so moving it into a seperate function is a sensible
cleanup.
Signed-off-by:
When adding and removing a CPU from the system the per-cpu masks that
are used by the scheduler to construct scheduler domains need to be updated
to account for the cpu entering or exiting the system. Currently logic this
is open-coded for the thread sibling mask and shared for the core mask.
This
Traditionally we have only ever tracked which CPUs are in the same core
(cpu_sibling_mask) and on the same die (cpu_core_mask). For Power9 we
need to be aware of which CPUs share cache with each other so this patch
adds cpu_cache_mask and the underlying cpu_cache_map variable to track
this.
Signed
In previous generations of Power processors each core had a private L2
cache. The Power9 processor has a slightly different architecture where
the L2 cache is shared among pairs of cores rather than being completely
private.
Making the scheduler aware of this cache sharing allows the scheduler to
On 01/03/17 22:24, Vaibhav Jain wrote:
This patch introduces a new function eeh_pe_update_freeze_counter()
replacing existing function eeh_pe_update_time_stamp(). The new
function also manages the value of reeze_count along with tstamp to
track the number of times the PE roze in last one hour and
On 01/03/17 22:24, Vaibhav Jain wrote:
This patch introduces function eeh_pe_reset_freeze_counter() which can
be used to reset the PE's freeze count variable outside eeh code. This
is useful for devices that can acquire a different personality after
a PERST event (e.g FPGA Adapters). Presently an
On 01/03/17 22:24, Vaibhav Jain wrote:
The patch resets the freeze counter on eeh_pe struct for PHB
associated with the cxl pci adapter. This would enable re-flashing of
the cxl-adapter beyond the default limit of 5.
Signed-off-by: Vaibhav Jain
Reviewed-by: Andrew Donnellan
---
Change-log:
On Thu, Mar 02, 2017 at 11:49:16AM +1100, Oliver O'Halloran wrote:
> To determine which logical CPUs are on the same core the kernel uses the
> ibm,chipid property from the device tree node associated with that cpu.
> The lookup for this this information is currently open coded in both
> traverse_s
On Sun, Feb 19, 2017 at 01:28:34AM +0530, Madhavan Srinivasan wrote:
> From PowerISA v2.07, architecture provides a special NOP
> instruction called "Probe-Nop" defined as "and 0,0,0".
> This form of "and" is reserved for use exclusively by the
> Performance Monitor.
>
> Usage example:
>
> Add PR
The HDAT data area is consumed by skiboot and turned into a device-tree.
In some cases we would like to look directly at the HDAT, so this patch
adds a sysfs node to allow it to be viewed. This is not possible through
/dev/mem as it is reserved memory which is stopped by the /dev/mem filter.
This
Paul Clarke writes:
> On 02/02/2017 12:22 AM, Benjamin Herrenschmidt wrote:
>> This adds AUX vectors for the L1I,D, L2 and L3 cache levels
>> providing for each cache level the size of the cache in bytes
>> and the geometry (line size and number of ways).
>>
>> We chose to not use the existing al
If CONFIG_DEBUG_INFO_SPLIT is not set but CONFIG_DEBUG_INFO is,
the kernel makefile just adds "-g" and the scripts/gcc-goto.sh test for
the "asm goto ("" entry)" support succedes and adds
-DCC_HAVE_ASM_GOTO to KBUILD_CFLAGS/KBUILD_AFLAGS. This effectively
makes OPAL_BRANCH() a noop (or somethi
Shuah Khan writes:
> Hi Bamovar,
>
> Your original series badly broke the selftest build. I can no longer
> build individual tests. For example:
>
> cd breakpoints/
> shuah@shuah-XPS-13-9350:/lkml/linux_4.11/tools/testing/selftests/breakpoints$
> make
> gcc breakpoint_test.c -o /breakpoint_t
On 02/02/17 04:30, Christophe Lombard wrote:
The service layer API (in cxl.h) lists some low-level functions whose
implementation is different on PSL8, PSL9 and XSL. Each
environment implements its own functions, and the common code uses
them through function pointers, defined in cxl_service_laye
On 02/02/17 04:30, Christophe Lombard wrote:
Rename a few functions, changing the '_psl' suffix to '_psl8', to make
clear that the implementation is psl8 specific.
Those functions will have an equivalent implementation for the psl9 in
a later patch.
Signed-off-by: Christophe Lombard
This patc
On 02/02/17 04:30, Christophe Lombard wrote:
The new Coherent Accelerator Interface Architecture, level 2, for the
IBM POWER9 brings new content and features:
- POWER9 Service Layer
- Registers
- Radix mode
- Process element entry
- Dedicated-Shared Process Programming Model
- Translation Fault H
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