On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
Add the TIF_PATCH_PENDING thread flag to enable the new livepatch
per-task consistency model for powerpc. The bit getting set indicates
the thread has a pending patch which needs to be applied when the thread
exits the kernel.
The bit
On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
The _TIF_ALLWORK_MASK macro automatically includes the least-significant
16 bits of the thread_info flags, which is less than obvious and tends
to create confusion and surprises when reading or modifying the code.
Define the flags expl
From: "Gautham R. Shenoy"
This is the fifth iteration of the patchset to use the psscr_val and
psscr_mask provided by the firmware for each of the stop states.
The previous versions can be found here:
[v4]: https://lkml.org/lkml/2016/12/9/288
[v3]: https://lkml.org/lkml/2016/11/10/37
[v2]: https
From: "Gautham R. Shenoy"
Currently all the low-power idle states are expected to wake up
at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
that puts the CPU to an idle state and never returns.
On ISA v3.0, when the ESL and EC bits in the PSSCR are zero, the CPU
is expected to w
From: "Gautham R. Shenoy"
Balbir pointed out that in idle_book3s.S and powernv/idle.c some
functions and variables had power9 in their names while some others
had arch300.
This patch uniformly renames all instances of "power9" in the
variables/function/comments occuring in these files to "arch30
From: "Gautham R. Shenoy"
In the current code for powernv_add_idle_states, there is a lot of code
duplication while initializing an idle state in powernv_states table.
Add an inline helper function to populate the powernv_states[] table
for a given idle state. Invoke this for populating the "Nap
From: "Gautham R. Shenoy"
Document the device-tree bindings defining the the properties under
the @power-mgt node in the device tree that describe the idle states
for Linux running on baremetal POWER servers.
Signed-off-by: Gautham R. Shenoy
---
[v4]-> [v5]: Fixed a couple of typos.
.../devic
From: "Gautham R. Shenoy"
The arch300_idle_stop method currently takes only the requested stop
level as a parameter and picks up the rest of the PSSCR bits from a
hand-coded macro. This is not a very flexible design, especially when
the firmware has the capability to communicate the psscr value a
On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
Once we have a consistency model, patches and their objects will be
enabled and disabled at different times. For example, when a patch is
disabled, its loaded objects' funcs can remain registered with ftrace
indefinitely until the unpa
On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
Move functions related to the actual patching of functions and objects
into a new patch.c file.
Signed-off-by: Josh Poimboeuf
Reviewed-by: Kamalesh Babulal
--
cheers,
Kamalesh.
On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
klp_patch_object()'s callers already ensure that the object is loaded,
so its call to klp_is_object_loaded() is unnecessary.
This will also make it possible to move the patching code into a
separate file.
Signed-off-by: Josh Poimboeuf
On Fri 2017-01-06 14:07:34, Josh Poimboeuf wrote:
> On Fri, Dec 23, 2016 at 11:18:03AM +0100, Petr Mladek wrote:
> > On Fri 2016-12-23 10:24:35, Miroslav Benes wrote:
> > > > > > diff --git a/kernel/livepatch/patch.c b/kernel/livepatch/patch.c
> > > > > > index 5efa262..e79ebb5 100644
> > > > > > -
> > > --- a/kernel/sched/idle.c
> > > +++ b/kernel/sched/idle.c
> > > @@ -9,6 +9,7 @@
> > > #include
> > > #include
> > > #include
> > > +#include
> > >
> > > #include
> > >
> > > @@ -264,6 +265,9 @@ static void do_idle(void)
> > >
> > > sched_ttwu_pending();
> > > schedule_pree
On Thu 2016-12-22 12:31:37, Josh Poimboeuf wrote:
> On Thu, Dec 22, 2016 at 03:34:52PM +0100, Petr Mladek wrote:
> > On Wed 2016-12-21 15:25:05, Josh Poimboeuf wrote:
> > > On Tue, Dec 20, 2016 at 06:32:46PM +0100, Petr Mladek wrote:
> > > > On Thu 2016-12-08 12:08:38, Josh Poimboeuf wrote:
> > > >
On Wed, Jan 04, 2017 at 04:15:35PM +1100, Benjamin Herrenschmidt wrote:
> + * For all these fields, a value of 0 means that the information
> + * is not known.
> + if (sets == 0)
> + info->assoc = 0x;
> + else
...
Is this correct? A fully associative cache should be encod
4.9-stable review patch. If anyone has any objections, please let me know.
--
From: Guilherme G. Piccoli
commit c0af52437254fda8b0cdbaae5a9b6d9327f1fcd5 upstream.
Commit 34c3d9819fda ("genirq/affinity: Provide smarter irq spreading
infrastructure") introduced a better IRQ spre
On Tue, 2017-01-10 at 07:15 -0600, Segher Boessenkool wrote:
> On Wed, Jan 04, 2017 at 04:15:35PM +1100, Benjamin Herrenschmidt wrote:
> > + * For all these fields, a value of 0 means that the information
> > + * is not known.
> > + if (sets == 0)
> > + info->assoc = 0x;
> > +
On 01/08/2017 05:31 PM, Benjamin Herrenschmidt wrote:
This adds AUX vectors for the L1I,D, L2 and L3 cache levels
providing for each cache level the size of the cache in bytes
and the geometry (line size and number of ways).
We chose to not use the existing alpha/sh definition which
packs all th
On Tue, 2017-01-10 at 10:16 -0600, Paul Clarke wrote:
> On 01/08/2017 05:31 PM, Benjamin Herrenschmidt wrote:
> > This adds AUX vectors for the L1I,D, L2 and L3 cache levels
> > providing for each cache level the size of the cache in bytes
> > and the geometry (line size and number of ways).
> >
>
On Mon, 9 Jan 2017, Benjamin Herrenschmidt wrote:
> On Mon, 2017-01-09 at 18:11 -0800, Christian Kujau wrote:
> > So, with -fno-stack-protector my GCC 4.9.2 compiles with
> > CC_STACKPROTECTOR_STRONG=y but panics during boot:
>
> How can it make any sense to have -fno-stack-protector and
> CC_STA
On 01/09/2017 10:27 PM, Chandan Rajendra wrote:
> On Monday, January 09, 2017 04:42:58 PM Jeff Moyer wrote:
>> Commit 20ce44d545844 ("do_direct_IO: Use inode->i_blkbits to compute
>> block count to be cleaned") introduced a regression: if the block size
>> of the block device is changed while a dir
On Tue, Jan 10, 2017 at 02:00:58PM +0100, Petr Mladek wrote:
> On Thu 2016-12-22 12:31:37, Josh Poimboeuf wrote:
> > On Thu, Dec 22, 2016 at 03:34:52PM +0100, Petr Mladek wrote:
> > > On Wed 2016-12-21 15:25:05, Josh Poimboeuf wrote:
> > > > On Tue, Dec 20, 2016 at 06:32:46PM +0100, Petr Mladek wro
This series fixes couple issues or improves its reliability:
* The PDC event is never detected inside the IRQ handler in surprise
hot-add path.
* The slot's initial state should be REGISTERED state if it's emtpy.
Otherwise, the PCI devices behind the slot won't be populated properl
The surprise hotplug is driven by interrupt in PowerNV PCI hotplug
driver. In the interrupt handler, pnv_php_interrupt(), we bail when
pnv_pci_get_presence_state() returns zero wrongly. It causes the
presence change event is always ignored incorrectly.
This fixes the issue by bailing on error (non
In PowerNV PCI hotplug driver, the initial PCI slot's state is set
to PNV_PHP_STATE_POPULATED if no PCI devices are connected to the
slot. The PCI devices that are hot added to the slot won't be probed
and populated because of the check in pnv_php_enable():
/* Check if the slot has been co
We're supporting surprise hotplug on PCI slots behind root port
or PCIe switch downstream ports, which don't claim the capability
in hardware register (offset: PCIe cap + PCI_EXP_SLTCAP). PEX8718
is one of the examples. For those PCI slots, the PDC (Presence
Detection Change) event isn't reliable a
The local variable @iov isn't used, to remove it.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/pci-ioda.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index b07680c..32f3130 100644
---
Several RDMA drivers, e.g. drivers/infiniband/hw/qib, use the CPU to
transfer data between memory and PCIe adapter. Because of performance
reasons it is important that the CPU cache is not flushed when such
drivers transfer data. Make this possible by allowing these drivers to
override the dma_map_
Most dma_map_ops structures are never modified. Constify these
structures such that these can be write-protected. This patch
has been generated as follows:
git grep -l 'struct dma_map_ops' |
xargs -d\\n sed -i \
-e 's/struct dma_map_ops/const struct dma_map_ops/g' \
-e 's/const struct dm
In __eeh_clear_pe_frozen_state(), we should pass the flag's value
instead of its address to eeh_unfreeze_pe(). This doesn't introduce
any problems, but the code is just wrong.
This fixes the code by passing flag's value to eeh_unfreeze_pe().
Cc: sta...@vger.kernel.org #3.18+
Fixes: 5cfb20b96f6 ("
On 1/9/2017 11:00 PM, Martin K. Petersen wrote:
"Uma" == Uma Krishnan writes:
Uma,
Uma> This patch series includes an enhancement to support a new command
Uma> queuing model and also cleans up prints throughout the driver. The
Uma> last patch in the series fixes a racing issue.
Uma> The seri
> "Uma" == Uma Krishnan writes:
Uma,
>> The first three patches in the series were submitted by you but do
>> not carry your Signed-off-by:...
>>
Uma> I will send out a V2 with the SOBs soon. Thanks for pointing out!
I don't mind adding them if there are no other changes. Just want it to
On 21/12/16 19:57, Alexey Kardashevskiy wrote:
> On 21/12/16 15:08, David Gibson wrote:
>> On Sun, Dec 18, 2016 at 12:28:54PM +1100, Alexey Kardashevskiy wrote:
>>> VFIO on sPAPR already implements guest memory pre-registration
>>> when the entire guest RAM gets pinned. This can be used to translat
On Tue, Jan 10, 2017 at 04:56:41PM -0800, Bart Van Assche wrote:
> Several RDMA drivers, e.g. drivers/infiniband/hw/qib, use the CPU to
> transfer data between memory and PCIe adapter. Because of performance
> reasons it is important that the CPU cache is not flushed when such
> drivers transfer da
On Tue, Jan 10, 2017 at 04:56:41PM -0800, Bart Van Assche wrote:
> Several RDMA drivers, e.g. drivers/infiniband/hw/qib, use the CPU to
> transfer data between memory and PCIe adapter. Because of performance
> reasons it is important that the CPU cache is not flushed when such
> drivers transfer da
On Thursday 08 December 2016 11:38 PM, Josh Poimboeuf wrote:
Add the TIF_PATCH_PENDING thread flag to enable the new livepatch
per-task consistency model for x86_64. The bit getting set indicates
the thread has a pending patch which needs to be applied when the thread
exits the kernel.
The bit
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