When we are updating pte, we just need to flush the tlb mapping for
that pte. Right now we do a full mm flush because we don't track page
size. Update the interface to track the page size and use that to
do the right tlb flush.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/
W.r.t hash page table config, we support 16MB and 16GB as the hugepage
size. Update the hstate_get_psize to handle 16M and 16G.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/hugetlb.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powerpc/include/asm/book3s
We will start moving some book3s specific hugetlb functions there.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/{hugetlb-radix.h => hugetlb.h} | 4 ++--
arch/powerpc/include/asm/hugetlb.h| 2 +-
2 files changed, 3 insertions(+), 3 deletio
In the subsequent patch we will change the implementation of book3s 64. This
also avoid #ifdef in the code.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/32/pgtable.h | 5 +
arch/powerpc/include/asm/book3s/64/hugetlb.h | 6 ++
arch/powerpc/include/asm/hugetlb.h
We want to switch pte_update to use va based tlb flush. In order to do that we
need to track the page size. With hugetlb we currently don't have page size
available in these functions. Hence switch hugetlb to use seperate functions
for update. In later patch we will update hugetlb functions to take
When we are updating pte, we just need to flush the tlb mapping for
that pte. Right now we do a full mm flush because we don't track page
size. Update the interface to track the page size and use that to
do the right tlb flush.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/
This will improve the task exit case, by batching tlb invalidates.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/book3s/64/radix.h | 16 +++-
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/book3s/64/radix.h
b/arch/powerpc/inclu
Hello Scott,
Do you know the IOMMU maintainer's mail address?
BR
Jun
-Original Message-
From: Scott Wood [mailto:o...@buserror.net]
Sent: Tuesday, November 22, 2016 3:41 PM
To: Jun Yang
Cc: linuxppc-dev@lists.ozlabs.org
Subject: Re: fsl_pamu: erratum a007907 should be applied on all vers
Hi all,
After merging the powerpc tree, today's linux-next build (powerpc
allyesconfig) failed like this:
Inconsistent kallsyms data
Try make KALLSYMS_EXTRA_PASS=1 as a workaround
Which is a vast improvement. I'll try adding 'KALLSYMS_EXTRA_PASS=1'
later and see how it goes. It would be nice n
Currently, in xmon, there is no obvious way to get an address for a
percpu symbol for a particular cpu. Having such an ability would be good
for debugging the system when percpu variables got involved.
Therefore, this patch introduces a new xmon command "lp" to lookup the
address for percpu symbol
skiboot now supports "fast reboot", a reboot procedure where skiboot
reinitialises hardware and loads a new kernel without re-IPLing the
machine. At present, fast reboot support is still experimental and is not
enabled by default, however it is intended that it will be enabled by
default in a near-
Xmon data-breakpoint feature is broken.
Whenever there is a watchpoint match occurs, hw_breakpoint_handler will
be called by do_break via notifier chains mechanism. If watchpoint is
registered by xmon, hw_breakpoint_handler won't find any associated
perf_event and returns immediately with NOTIFY_S
No functional changes.
Signed-off-by: Naveen N. Rao
---
arch/powerpc/kernel/Makefile| 2 +
arch/powerpc/kernel/entry_32.S | 107 ---
arch/powerpc/kernel/entry_64.S | 380 --
arch/powerpc/kernel/ftrace_32.S | 118
arch/powerpc/kerne
Fix the following coccinelle warnings:
drivers/misc/cxl/debugfs.c:46:0-23: WARNING: fops_io_x64 should be
defined with DEFINE_DEBUGFS_ATTRIBUTE
drivers/misc/cxl/guest.c:890:5-26: WARNING: Comparison to bool
drivers/misc/cxl/irq.c:107:3-23: WARNING: Assignment of bool to 0/1
Hi all,
On Tue, 22 Nov 2016 19:58:32 +1100 Stephen Rothwell
wrote:
>
> After merging the powerpc tree, today's linux-next build (powerpc
> allyesconfig) failed like this:
>
> Inconsistent kallsyms data
> Try make KALLSYMS_EXTRA_PASS=1 as a workaround
>
> Which is a vast improvement. I'll try
Andrew Donnellan writes:
> skiboot now supports "fast reboot", a reboot procedure where skiboot
> reinitialises hardware and loads a new kernel without re-IPLing the
> machine. At present, fast reboot support is still experimental and is not
> enabled by default, however it is intended that it wi
"Naveen N. Rao" writes:
> On 2016/11/22 02:25PM, Masami Hiramatsu wrote:
>> On Mon, 21 Nov 2016 22:36:41 +0530
>> "Naveen N. Rao" wrote:
>> > diff --git a/arch/powerpc/include/asm/kprobes.h
>> > b/arch/powerpc/include/asm/kprobes.h
>> > index 2c9759bd..da30dc3 100644
>> > --- a/arch/powerpc/incl
On 2016/11/22 09:43PM, Michael Ellerman wrote:
> "Naveen N. Rao" writes:
> > On 2016/11/22 02:25PM, Masami Hiramatsu wrote:
> >> On Mon, 21 Nov 2016 22:36:41 +0530
> >> "Naveen N. Rao" wrote:
> >> > diff --git a/arch/powerpc/include/asm/kprobes.h
> >> > b/arch/powerpc/include/asm/kprobes.h
> >>
On 14/11/16 12:13, Zubair Lutfullah Kakakhel wrote:
> Hi,
>
> This patch series moves the Xilinx interrupt controller driver out
> of arch/microblaze to drivers/irqchip and then cleans it up a bit.
> And then removes another implementation of the driver in arch/powerpc.
>
> This effort results in
Add HAVE_CC_STACKPROTECTOR to powerpc. This is copied from ARM.
Christophe Leroy (2):
powerpc: initial stack protector (-fstack-protector) support
powerpc/32: stack protector: change the canary value per task
arch/powerpc/Kconfig | 1 +
arch/powerpc/include/asm/stackpro
Partialy copied from commit c743f38013aef ("ARM: initial stack protector
(-fstack-protector) support")
This is the very basic stuff without the changing canary upon
task switch yet. Just the Kconfig option and a constant canary
value initialized at boot time.
Cc: Nicolas Pitre
Signed-off-by: Ch
Partially copied from commit df0698be14c66 ("ARM: stack protector:
change the canary value per task")
A new random value for the canary is stored in the task struct whenever
a new task is forked. This is meant to allow for different canary values
per task. On powerpc, GCC expects the canary valu
kbuild test robot writes:
> [auto build test WARNING on powerpc/next]
> [cannot apply to v4.9-rc6 next-20161117]
> [if your patch is applied to the wrong git tree, please drop us a note to
> help improve the system]
>
> url:
> https://github.com/0day-ci/linux/commits/Paul-Mackerras/powerpc-64
Hi,
On 11/22/2016 10:55 AM, Marc Zyngier wrote:
On 14/11/16 12:13, Zubair Lutfullah Kakakhel wrote:
Hi,
This patch series moves the Xilinx interrupt controller driver out
of arch/microblaze to drivers/irqchip and then cleans it up a bit.
And then removes another implementation of the driver in
Le 17/11/2016 à 12:05, Michael Ellerman a écrit :
Hi Michael,
I took your comments into account in v2. Shame on me, I forgot to add
the list of changes from v1 to v2 in the commit log.
Christophe
Christophe Leroy writes:
diff --git a/arch/powerpc/include/asm/stackprotector.h
b/arch/po
Le 22/11/2016 à 11:13, Andrew Donnellan a écrit :
Fix the following coccinelle warnings:
drivers/misc/cxl/debugfs.c:46:0-23: WARNING: fops_io_x64 should be
defined with DEFINE_DEBUGFS_ATTRIBUTE
drivers/misc/cxl/guest.c:890:5-26: WARNING: Comparison to bool
drivers/misc/cxl/
Ravi Bangoria writes:
> Xmon data-breakpoint feature is broken.
>
> Whenever there is a watchpoint match occurs, hw_breakpoint_handler will
> be called by do_break via notifier chains mechanism. If watchpoint is
> registered by xmon, hw_breakpoint_handler won't find any associated
> perf_event an
With the ffs() function as defined in arch/powerpc/include/asm/bitops.h
GCC will not optimise the code in case of constant parameter, as shown
by the small exemple below.
int ffs_test(void)
{
return 4 << ffs(31);
}
c000b8f4 :
c000b8f4: 38 00 00 01 li r0,1
c000b8f8: 38
Thanks Michael,
On Tuesday 22 November 2016 05:03 PM, Michael Ellerman wrote:
> Ravi Bangoria writes:
>
>> Xmon data-breakpoint feature is broken.
>>
>> Whenever there is a watchpoint match occurs, hw_breakpoint_handler will
>> be called by do_break via notifier chains mechanism. If watchpoint is
With preemption turned on we can read incorrect throttling state while being
switched
to CPU on a different chip.
The following BUG_() was hit while running the 4.8-rc5 kernel compiled
with CONFIG_PREEMPT_DEBUG on a POWER machine.
[ 67.700897] BUG: using smp_processor_id() in preemptible [
Am Dienstag, 22. November 2016, 17:01:10 BRST schrieb Michael Ellerman:
> Thiago Jung Bauermann writes:
> > Am Sonntag, 20. November 2016, 10:45:46 BRST schrieb Dave Young:
> >> On 11/10/16 at 01:27am, Thiago Jung Bauermann wrote:
> >> > powerpc's purgatory.ro has 12 relocation types when built as
Hello
We have board running Linux kernel 2.6.36.4 on a Freescale/NXP PPC
P4080 (QorIQ) CPU.
Our 32 bit application uses real-time priority threads with the
Preemptible Kernel (Low-Latency Desktop) scheduling.
Toolchain we use is powerpc-linux-gcc (crosstool-NG 1.19.0) 4.4.3 in
combination with egl
On Tue, 22 Nov 2016 15:25:32 +0530
"Naveen N. Rao" wrote:
> No functional changes.
Should have a better change log though. Why did you do this?
I'm personally fine with this, as long as the powerpc maintainers are
too.
-- Steve
>
> Signed-off-by: Naveen N. Rao
> ---
> arch/powerpc/kernel/M
On Tue, 22 Nov 2016 21:13:18 +0530
"Naveen N. Rao" wrote:
> Hi Steve,
>
> On 2016/11/22 09:46AM, Steven Rostedt wrote:
> > On Tue, 22 Nov 2016 15:25:32 +0530
> > "Naveen N. Rao" wrote:
> >
> > > No functional changes.
> >
> > Should have a better change log though. Why did you do this?
>
Hi Steve,
On 2016/11/22 09:46AM, Steven Rostedt wrote:
> On Tue, 22 Nov 2016 15:25:32 +0530
> "Naveen N. Rao" wrote:
>
> > No functional changes.
>
> Should have a better change log though. Why did you do this?
>
> I'm personally fine with this, as long as the powerpc maintainers are
> too.
S
entry_*.S now includes a lot more than just kernel entry/exit code. As a
first step at cleaning this up, let's split out the ftrace bits into
separate files.
No functional changes.
Suggested-by: Michael Ellerman
Signed-off-by: Naveen N. Rao
---
v2: updated commit description.
arch/powerpc/ker
On 2016/11/22 10:46AM, Steven Rostedt wrote:
> On Tue, 22 Nov 2016 21:13:18 +0530
> "Naveen N. Rao" wrote:
>
> > Hi Steve,
> >
> > On 2016/11/22 09:46AM, Steven Rostedt wrote:
> > > On Tue, 22 Nov 2016 15:25:32 +0530
> > > "Naveen N. Rao" wrote:
> > >
> > > > No functional changes.
> > >
> On Nov 22, 2016, at 4:13 AM, Andrew Donnellan
> wrote:
>
> Fix the following coccinelle warnings:
>
>drivers/misc/cxl/debugfs.c:46:0-23: WARNING: fops_io_x64 should be
>defined with DEFINE_DEBUGFS_ATTRIBUTE
>drivers/misc/cxl/guest.c:890:5-26: WARNING: Comparison to bool
>d
On Tue, 22 Nov 2016 22:04:39 +0530
"Naveen N. Rao" wrote:
> entry_*.S now includes a lot more than just kernel entry/exit code. As a
> first step at cleaning this up, let's split out the ftrace bits into
> separate files.
>
> No functional changes.
>
> Suggested-by: Michael Ellerman
> Signed-o
I had old Marvell Sky2 hardware that had slow flash.
-Original Message-
From: Andrew Donnellan [mailto:andrew.donnel...@au1.ibm.com]
Sent: Monday, November 21, 2016 4:16 PM
To: Bjorn Helgaas ; Matthew R. Ochs
Cc: linux-...@vger.kernel.org; Frederic Barrat ;
Uma Krishnan ; Ian Munsie ;
From: "Gautham R. Shenoy"
The existing code doesn't handle the case when CPU which was in a
hardware-idle state (nap,sleep,winkle on POWER8 and various stop
states on POWER9) gets woken up due to a System Reset interrupt.
This patch checks if the CPU was woken up due to System Reset, in
which ca
Le 21/11/2016 à 22:10, Matthew R. Ochs a écrit :
Some IBM CXL devices can take up to ~120ms to complete a VPD access
transaction when under heavy load. With an existing default VPD timeout
of 50ms, reads/writes can fail despite there not being an issue with the
underlying hardware.
To avoid th
From: "Gautham R. Shenoy"
Ensure that PSSCR is set to a safe value corresponding to no
state-loss each time a POWER9 CPU comes online.
Signed-off-by: Gautham R. Shenoy
---
arch/powerpc/kernel/cpu_setup_power.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/powerpc/kernel/cpu_setup_
On Monday, November 21, 2016 7:32:30 PM CET John Youn wrote:
> On 11/21/2016 1:10 PM, Christian Lamparter wrote:
> > On Monday, November 21, 2016 12:16:31 PM CET John Youn wrote:
> >> On 11/18/2016 12:18 PM, Christian Lamparter wrote:
> >>> On Friday, November 18, 2016 8:16:08 AM CET Rob Herring wr
On Tue, Nov 22, 2016 at 10:00:58PM +1100, Michael Ellerman wrote:
> kbuild test robot writes:
> > [auto build test WARNING on powerpc/next]
> > [cannot apply to v4.9-rc6 next-20161117]
> > [if your patch is applied to the wrong git tree, please drop us a note to
> > help improve the system]
> >
>
On Tue, Nov 22, 2016 at 11:06:32PM +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> The existing code doesn't handle the case when CPU which was in a
> hardware-idle state (nap,sleep,winkle on POWER8 and various stop
> states on POWER9) gets woken up due to a System Reset interrupt
On Tue, Nov 22, 2016 at 2:51 PM, Christian Lamparter
wrote:
> On Monday, November 21, 2016 7:32:30 PM CET John Youn wrote:
>> On 11/21/2016 1:10 PM, Christian Lamparter wrote:
>> > On Monday, November 21, 2016 12:16:31 PM CET John Youn wrote:
>> >> On 11/18/2016 12:18 PM, Christian Lamparter wrote
On Tue, Nov 22, 2016 at 2:07 PM, Denis Kirjanov wrote:
> With preemption turned on we can read incorrect throttling state while being
> switched
> to CPU on a different chip.
> The following BUG_() was hit while running the 4.8-rc5 kernel compiled
> with CONFIG_PREEMPT_DEBUG on a POWER machine.
>
"Gautham R. Shenoy" writes:
> From: "Gautham R. Shenoy"
>
> Ensure that PSSCR is set to a safe value corresponding to no
> state-loss each time a POWER9 CPU comes online.
Is this a bug fix? I can't tell from the change log.
cheers
On Wed, 2016-11-23 at 10:30 +1100, Michael Ellerman wrote:
> "Gautham R. Shenoy" writes:
>
> > From: "Gautham R. Shenoy"
> >
> > Ensure that PSSCR is set to a safe value corresponding to no
> > state-loss each time a POWER9 CPU comes online.
>
> Is this a bug fix? I can't tell from the change
Define and set the POWER9 HFSCR doorbell bit so that guests can use
msgsndp.
ISA 3.0 calls this MSGP, so name it accordingly in the code.
Signed-off-by: Michael Neuling
---
arch/powerpc/include/asm/reg.h| 2 ++
arch/powerpc/kernel/cpu_setup_power.S | 2 +-
2 files changed, 3 insertions(
Michael Ellerman writes:
> Actually I want you to rework the patch anyway :)
>
> Will talk tomorrow.
So as discussed, lets add d1, d2, d4, d8, which dump 1/2/4/8 bytes at a
time, in cpu endian, and which each value separated by space.
cheers
The "Locking API testsuite" output during bootup (with
CONFIG_DEBUG_LOCKING_API_SELFTESTS=y) on this PowerPC system looks
mangled, possibly related to the recent printk changes (4bcc595ccd80,
"printk: reinstate KERN_CONT for printing continuation lines"). Before
(e.g. with v4.6) it looked like
This series of patches adds support to HV KVM for running KVM guests
on POWER9 systems. This allows us to run KVM guests that use HPT
(hashed page table) address translation and know about the POWER9
processor. With suitable changes to the user-mode driver, this can
also run guests on POWER9 in P
This adapts the KVM-HV hashed page table (HPT) code to read and write
HPT entries in the new format defined in Power ISA v3.00 on POWER9
machines. The new format moves the B (segment size) field from the
first doubleword to the second, and trims some bits from the AVA
(abbreviated virtual address)
On POWER9, the SDR1 register (hashed page table base address) is no
longer used, and instead the hardware reads the HPT base address
and size from the partition table. The partition table entry also
contains the bits that specify the page size for the VRMA mapping,
which were previously in the LPC
This adds code to handle two new guest-accessible special-purpose
registers on POWER9: TIDR (thread ID register) and PSSCR (processor
stop status and control register). They are context-switched
between host and guest, and the guest values can be read and set
via the one_reg interface.
The PSSCR
Some special-purpose registers that were present and accessible
by guests on POWER8 no longer exist on POWER9, so this adds
feature sections to ensure that we don't try to context-switch
them when going into or out of a guest on POWER9. These are
all relatively obscure, rarely-used registers, but
On POWER9, the msgsnd instruction is able to send interrupts to
other cores, as well as other threads on the local core. Since
msgsnd is generally simpler and faster than sending an IPI via the
XICS, we use msgsnd for all IPIs sent by KVM on POWER9.
Signed-off-by: Paul Mackerras
---
arch/powerp
POWER9 adds new capabilities to the tlbie (TLB invalidate entry)
and tlbiel (local tlbie) instructions. Both instructions get a
set of new parameters (RIC, PRS and R) which appear as bits in the
instruction word. The tlbiel instruction now has a second register
operand, which contains a PID and/o
POWER9 includes a new interrupt controller, called XIVE, which is
quite different from the XICS interrupt controller on POWER7 and
POWER8 machines. KVM-HV accesses the XICS directly in several places
in order to send and clear IPIs and handle interrupts from PCI
devices being passed through to the
POWER9 replaces the various power-saving mode instructions on POWER8
(doze, nap, sleep and rvwinkle) with a single "stop" instruction, plus
a register, PSSCR, which controls the depth of the power-saving mode.
This replaces the use of the nap instruction when threads are idle
during guest execution
The new XIVE interrupt controller on POWER9 can direct external
interrupts to the hypervisor or the guest. The interrupts directed to
the hypervisor are controlled by an LPCR bit called LPCR_HVICE, and
come in as a "hypervisor virtualization interrupt". This sets the
LPCR bit so that hypervisor v
With POWER9, each CPU thread has its own MMU context and can be
in the host or a guest independently of the other threads; there is
still however a restriction that all threads must use the same type
of address translation, either radix tree or hashed page table (HPT).
Since we only support HPT gu
From: Suraj Jitindar Singh
The function kvmppc_set_arch_compat() is used to determine the value of the
processor compatibility register (PCR) for a guest running in a given
compatibility mode. There is currently no support for v3.00 of the ISA.
Add support for v3.00 of the ISA which adds an ISA
On Tue, 2016-11-22 at 23:36 +0530, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Ensure that PSSCR is set to a safe value corresponding to no
> state-loss each time a POWER9 CPU comes online.
>
> Signed-off-by: Gautham R. Shenoy
Tested here on my configuration... FWIW
Acked-By: Mic
Paul Mackerras writes:
> On Tue, Nov 22, 2016 at 10:00:58PM +1100, Michael Ellerman wrote:
>> kbuild test robot writes:
>> > [auto build test WARNING on powerpc/next]
>> > [cannot apply to v4.9-rc6 next-20161117]
>> > [if your patch is applied to the wrong git tree, please drop us a note to
>>
On 11/22/16 at 11:44am, Thiago Jung Bauermann wrote:
> Am Dienstag, 22. November 2016, 17:01:10 BRST schrieb Michael Ellerman:
> > Thiago Jung Bauermann writes:
> > > Am Sonntag, 20. November 2016, 10:45:46 BRST schrieb Dave Young:
> > >> On 11/10/16 at 01:27am, Thiago Jung Bauermann wrote:
> > >>
On 22/11/16 21:27, Michael Ellerman wrote:
Can I suggest:
- Fix OPAL
- Fix OPAL
- Fix OPAL
...
Oh OK, it's firmware :D
Yep :D
There's existing logic in kernel/reboot.c to handle a reboot= command
line parameter, which can set the reboot_mode, so my preference would be
that we use that.
On Tue, 22 Nov 2016 21:21:14 +1100
Stephen Rothwell wrote:
> Hi all,
>
> On Tue, 22 Nov 2016 19:58:32 +1100 Stephen Rothwell
> wrote:
> >
> > After merging the powerpc tree, today's linux-next build (powerpc
> > allyesconfig) failed like this:
> >
> > Inconsistent kallsyms data
> > Try make K
On Tue, Nov 22, 2016 at 06:29:39PM +1100, Alexey Kardashevskiy wrote:
> On 22/11/16 13:50, David Gibson wrote:
> > On Fri, Nov 11, 2016 at 11:32:15PM +1100, Alexey Kardashevskiy wrote:
> >> As mentioned in the previous patch, we are going to allow the userspace
> >> to configure container in one me
On Tue, Nov 22, 2016 at 06:34:25PM +1100, Alexey Kardashevskiy wrote:
> On 22/11/16 14:49, Alexey Kardashevskiy wrote:
> > On 22/11/16 13:38, David Gibson wrote:
> >> On Thu, Nov 17, 2016 at 06:39:41PM +1100, Alexey Kardashevskiy wrote:
> >>> On 11/11/16 23:32, Alexey Kardashevskiy wrote:
> In
On 23/11/16 12:37, Andrew Donnellan wrote:
There's existing logic in kernel/reboot.c to handle a reboot= command
line parameter, which can set the reboot_mode, so my preference would be
that we use that.
Currently we completely ignore the reboot_mode, so there's no backward
compatibility issue.
Am Mittwoch, 23. November 2016, 09:32:58 BRST schrieb Dave Young:
> On 11/22/16 at 11:44am, Thiago Jung Bauermann wrote:
> > Am Dienstag, 22. November 2016, 17:01:10 BRST schrieb Michael Ellerman:
> > > Thiago Jung Bauermann writes:
> > > > Am Sonntag, 20. November 2016, 10:45:46 BRST schrieb Dave
When configured with CONFIG_PPC_EARLY_DEBUG_OPAL=y the kernel expects
the OPAL entry and base addresses to be passed in r8 and r9
respectively. Currently the wrapper does not attempt to restore these
values before entering the decompressed kernel which causes the kernel
to branch into whatever happ
Andrew Donnellan writes:
> On 23/11/16 12:37, Andrew Donnellan wrote:
>>> There's existing logic in kernel/reboot.c to handle a reboot= command
>>> line parameter, which can set the reboot_mode, so my preference would be
>>> that we use that.
>>>
>>> Currently we completely ignore the reboot_mode
Hi Paul,
Today's linux-next merge of the kvm-ppc-paulus tree got a conflict in:
arch/powerpc/include/asm/asm-prototypes.h
between commit:
9e5f68842276 ("powerpc: Fix missing CRCs, add more asm-prototypes.h
declarations")
from the powerpc-fixes tree and commit:
ebe4535fbe7a ("KVM: PPC:
In the absence of hotplug we use extra memory proportional to
(possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch
to disable large consumption with large number of cgroups. This patch
adds hotplug support to memory cgroups and reverts the commit that
limited possible nodes to onl
The lack of hotplug support makes us allocate all memory
upfront for per node data structures. With large number
of cgroups this can be an overhead. PPC64 actually limits
n_possible nodes to n_online to avoid some of this overhead.
This patch adds the basic notifiers to listen to hotplug
events an
Move routines that do operations on all nodes to
just the online nodes. Most of the changes are
very obvious (like the ones related to soft limit tree
per node)
Implications of this patch
1. get/put_online_mems around for_each_online_node
paths. These are expected to be !fast path
2. Memory al
We've fixed the memory hotplug issue with memcg, hence
this work around should not be required.
Reverts: commit 3af229f2071f
("powerpc/numa: Reset node_possible_map to only node_online_map")
Cc: Tejun Heo
Cc: Andrew Morton
Cc: Johannes Weiner
Cc: Michal Hocko
Cc: Vladimir Davydov
Signed-off-
On 23/11/16 12:35, David Gibson wrote:
> On Tue, Nov 22, 2016 at 06:29:39PM +1100, Alexey Kardashevskiy wrote:
>> On 22/11/16 13:50, David Gibson wrote:
>>> On Fri, Nov 11, 2016 at 11:32:15PM +1100, Alexey Kardashevskiy wrote:
As mentioned in the previous patch, we are going to allow the users
Hi Paul,
I'm still chasing this confusion about the CAS bit to send the real
HPT resizing patches. However, in the meantime, here are some
preliminary cleanups.
These cleanups stand on their own, although I wrote them in the
context of writing the HPT resizing code, and are prerequisites for
tho
The KVM_PPC_PVINFO_FLAGS_EV_IDLE macro defines a bit for use in the flags
field of struct kvm_ppc_pvinfo. However, changes since that was introduced
have moved it away from that structure definition, which is confusing.
Move it back next to the structure it belongs with.
Signed-off-by: David Gib
At present KVM on powerpc always reports KVM_CAP_PPC_ALLOC_HTAB as enabled.
However, the ioctl() it advertises (KVM_PPC_ALLOCATE_HTAB) only actually
works on KVM HV. On KVM PR it will fail with ENOTTY.
qemu already has a workaround for this, so it's not breaking things in
practice, but it would b
Christian Kujau writes:
> The "Locking API testsuite" output during bootup (with
> CONFIG_DEBUG_LOCKING_API_SELFTESTS=y) on this PowerPC system looks
> mangled, possibly related to the recent printk changes (4bcc595ccd80,
> "printk: reinstate KERN_CONT for printing continuation lines"). Before
Hi Suraj,
[auto build test WARNING on next-20161122]
[cannot apply to kvm-ppc/kvm-ppc-next powerpc/next kvm/linux-next v4.9-rc6
v4.9-rc5 v4.9-rc4 v4.9-rc6]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Most of these look fine
> -return debugfs_create_file(name, mode, parent, (void __force *)value,
> &fops_io_x64);
> +return debugfs_create_file_unsafe(name, mode, parent,
> + (void __force *)value, &fops_io_x64);
Just wondering what this one is about?
Cheers,
-Ian
On Sun, Oct 23, 2016 at 06:48:37PM -0500, Andy Fleming wrote:
> Cyrus uses GPIOs to complete board shutdown/reset.
> Add nodes to indicate that support to the device tree.
>
> Signed-off-by: Andy Fleming
> ---
> v2: No changes
>
> arch/powerpc/boot/dts/fsl/cyrus_p5020.dts | 11 +++
> 1
On 23/11/16 17:49, Ian Munsie wrote:
Most of these look fine
-return debugfs_create_file(name, mode, parent, (void __force *)value,
&fops_io_x64);
+return debugfs_create_file_unsafe(name, mode, parent,
+ (void __force *)value, &fops_io_x64);
Just wondering what t
On Tue, 2016-10-25 at 10:15 +0800, Jia Hongtao wrote:
> From: Hongtao Jia
>
> Update #thermal-sensor-cells from 0 to 1 according to the new binding. The
> sensor specifier added is the monitoring site ID, and represents the "n" in
> TRITSRn and TRATSRn.
>
> Signed-off-by: Jia Hongtao
Where can
> -Original Message-
> From: Scott Wood [mailto:o...@buserror.net]
> Sent: Wednesday, November 23, 2016 3:07 PM
> To: Troy Jia ; rui.zh...@intel.com; edubez...@gmail.com;
> robh...@kernel.org; Scott Wood ; shawn...@kernel.org
> Cc: devicet...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org
On Wed 23-11-16 15:36:51, Balbir Singh wrote:
> In the absence of hotplug we use extra memory proportional to
> (possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch
> to disable large consumption with large number of cgroups. This patch
> adds hotplug support to memory cgroups and
When the linux kernel is build with (typical kernel ship with Debian
installer):
CONFIG_FB_OF=y
CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_FB_RADEON=m
The offb driver takes precedence over module radeonfb. It is then
impossible to load the module, error reported is:
[ 96.551486] radeonfb :00:10
Excerpts from andrew.donnellan's message of 2016-11-23 18:06:59 +1100:
> On 23/11/16 17:49, Ian Munsie wrote:
> > Most of these look fine
> >
> >> -return debugfs_create_file(name, mode, parent, (void __force *)value,
> >> &fops_io_x64);
> >> +return debugfs_create_file_unsafe(name, mode,
On Wed, Sep 28, 2016 at 11:15:31AM +0800, Zhao Qiang wrote:
> QE was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms. so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
Changelog should be something like:
soc/fsl/qe: Cleanups and portability fixes
QE wa
On 23/11/16 18:25, Michal Hocko wrote:
> On Wed 23-11-16 15:36:51, Balbir Singh wrote:
>> In the absence of hotplug we use extra memory proportional to
>> (possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch
>> to disable large consumption with large number of cgroups. This patc
Add FSL USB Gadget entry in platform device id table
Signed-off-by: Changming Huang
Signed-off-by: Suresh Gupta
---
drivers/usb/gadget/udc/fsl_udc_core.c |2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/usb/gadget/udc/fsl_udc_core.c
b/drivers/usb/gadget/udc/fsl_udc_core.c
index
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