On Mon, Sep 19, 2016 at 02:38:20AM -0400, Ravi Bangoria wrote:
> User stack dump feature is recently added for powerpc. But there was no
> test case available to test it. This test works same as other on arch by
> preparing stack frame on perf test thread and comparing each frame by
> unwinding it.
On 17/09/16 01:16, Aneesh Kumar K.V wrote:
> - range 9 13 if PPC64 && !PPC_64K_PAGES
> + range 13 13 if PPC64 && !PPC_64K_PAGES
> default "13" if PPC64 && !PPC_64K_PAGES
Do we still want t to be 13 13 or 12 13?
Looks like the lower side of the range can cause issues based
on the v
On 16/09/16 18:57, Nicholas Piggin wrote:
> Implementing busy wait loops with cpu_relax() in callers poses
> some difficulties for powerpc.
>
> First, we want to put our SMT thread into a low priority mode for the
> duration of the loop, but then return to normal priority after exiting
> the loo
hat (public, well-known) commit your patch series was
built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url:
https://github.com/0day-ci/linux/commits/Pan-Xinhui/Implement-qspinlock-pv-qspinlock-on-ppc/20160919-133130
base: https://git.kernel.org/pub/scm/li
On Mon, 19 Sep 2016 17:45:52 +1000
Balbir Singh wrote:
> On 16/09/16 18:57, Nicholas Piggin wrote:
> > Implementing busy wait loops with cpu_relax() in callers poses
> > some difficulties for powerpc.
> >
> > First, we want to put our SMT thread into a low priority mode for the
> > duration of t
hat (public, well-known) commit your patch series was
built on]
[Check https://git-scm.com/docs/git-format-patch for more information]
url:
https://github.com/0day-ci/linux/commits/Pan-Xinhui/Implement-qspinlock-pv-qspinlock-on-ppc/20160919-133130
base: https://git.kernel.org/pub/scm/li
On 15/09/16 06:06, Reza Arbab wrote:
> Respect the standard dt "status" property when scanning memory nodes in
> early_init_dt_scan_memory(), so that if the property is present and not
> "okay", no memory will be added.
>
> The use case at hand is accelerator or device memory, which may be
> unu
On Mon, 2016-09-19 at 02:13 -0700, Herminio Hernandez, Jr. wrote:
>
> I noticed the GPU was set to PCI mode however I did not set
> radeon.agpmode=-1 in yaboot. I then installed Lubuntu 16.10 along
> side Debian. I noticed that GPU was working and it was not set to
> force PCI mode. Has there been
On Mon, 2016-09-19 at 16:37 +1000, Russell Currey wrote:
> On Wed, 2016-09-14 at 21:30 +1000, Gavin Shan wrote:
> >
> > On Wed, Sep 14, 2016 at 05:51:08PM +1000, Benjamin Herrenschmidt wrote:
> > >
> > >
> > > On Wed, 2016-09-14 at 16:37 +1000, Russell Currey wrote:
> > > >
> > > >
> > > > Com
On some CPUs like the 8xx, _PAGE_RW hence _PAGE_WRITE is defined
as 0 and _PAGE_RO has to be set when a page is not writable
_PAGE_RO is defined by default in pte-common.h, however BOOK3S/64
doesn't include that file so _PAGE_RO has to be defined explicitly
in book3s/64/pgtable.h
fixes: a7b9f671f
Le 19/09/2016 à 12:58, Christophe Leroy a écrit :
On some CPUs like the 8xx, _PAGE_RW hence _PAGE_WRITE is defined
as 0 and _PAGE_RO has to be set when a page is not writable
_PAGE_RO is defined by default in pte-common.h, however BOOK3S/64
doesn't include that file so _PAGE_RO has to be defin
On 15/09/16 06:06, Reza Arbab wrote:
> Remove the check which prevents us from hotplugging into an empty node.
>
> This limitation has been questioned before [1], and judging by the
> response, there doesn't seem to be a reason we can't remove it. No issues
> have been found in light testing.
>
Hi,
On Mon, Sep 19, 2016 at 11:13 AM, Herminio Hernandez, Jr.
wrote:
> Apologies for the previous email.
>
> What I was trying to say was I just recently installed Debain on my PowerMac
> G5. I upgraded to sid and install the nonfree firmware. After reboot I
> noticed that GPU acclleration was br
Em Fri, Aug 19, 2016 at 06:29:34PM +0530, Ravi Bangoria escreveu:
> From: "Naveen N. Rao"
>
> +static struct ins *ins__find_powerpc(const char *name)
> +{
> + int i;
> + struct ins *ins;
> + struct ins_ops *ops;
> + static struct instructions_powerpc head;
> + static bool list
On 09/19/2016 01:41 AM, Andrew Donnellan wrote:
> If we fail to allocate work, we don't end up using hp_errlog_copy. Free it
> in the error path.
>
> Signed-off-by: Andrew Donnellan
Reviewed-by: Nathan Fontenot
>
> ---
>
> Found by Coverity Scan. Compile tested only.
> ---
> arch/powerpc/pl
Em Fri, Aug 19, 2016 at 06:29:35PM +0530, Ravi Bangoria escreveu:
> Do not ignore call instruction with indirect target when its already
> identified as a call. This is an extension of commit e8ea1561952b
> ("perf annotate: Use raw form for register indirect call instructions")
> to generalize anno
I messed up the Cc list. Fixing it now.
Sukadev Bhattiprolu [suka...@linux.vnet.ibm.com] wrote:
> CPUs support a large number of performance monitoring events (PMU events)
> and often these events are very specific to an architecture/model of the
> CPU. To use most of these PMU events with perf, w
For hugetlb to work with 4K page size, we need the MAX_ORDER to be more
than 13. When switching from a 64K page size to 4K linux page size using
make nconfig, we endup with a CONFIG_FORCE_MAX_ZONEORDER value of 9.
This results in 16M hugepage to be considered as a gigantic huge page
which inturn ca
Le 19/09/2016 à 07:45, Aneesh Kumar K.V a écrit :
Christophe Leroy writes:
Today there are two implementations of hugetlbpages which are managed
by exclusive #ifdefs:
* FSL_BOOKE: several directory entries points to the same single hugepage
* BOOK3S: one upper level directory entry points to
Le 19/09/2016 à 07:50, Aneesh Kumar K.V a écrit :
Christophe Leroy writes:
+#else
+static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
+{
+ BUG();
+}
+
#endif
I was expecting that BUG will get removed in the next patch. But I don't
see it in the next patch. Considering
Le 19/09/2016 à 07:22, Aneesh Kumar K.V a écrit :
Christophe Leroy writes:
Today powerpc64 uses a set of pgtable_caches while powerpc32 uses
standard pages when using 4k pages and a single pgtable_cache
if using other size pages.
In preparation of implementing huge pages on the 8xx, this pa
Le 16/09/2016 à 06:28, Michael Neuling a écrit :
Fred has taken over the cxl maintenance I was doing. This updates the
MAINTAINERS file to reflect this.
It also removes a duplicate entry in the files covered.
Signed-off-by: Michael Neuling
Acked-by: Frederic Barrat
On Mon, Jul 25, 2016 at 12:43 AM, Zhao Qiang wrote:
> QE was supported on PowerPC, and dependent on PPC,
> Now it is supported on other platforms. so remove PPCisms.
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2:
> - na
> Changes for v3:
> - add NO_IRQ
> Changes for v4:
>
Em Thu, Sep 15, 2016 at 03:24:37PM -0700, Sukadev Bhattiprolu escreveu:
> CPUs support a large number of performance monitoring events (PMU events)
> and often these events are very specific to an architecture/model of the
> CPU. To use most of these PMU events with perf, we currently have to ident
Em Mon, Sep 19, 2016 at 06:20:17PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Thu, Sep 15, 2016 at 03:24:37PM -0700, Sukadev Bhattiprolu escreveu:
> > CPUs support a large number of performance monitoring events (PMU events)
> > and often these events are very specific to an architecture/model
Em Mon, Sep 19, 2016 at 08:31:13PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Sep 19, 2016 at 06:20:17PM -0300, Arnaldo Carvalho de Melo escreveu:
> > Em Thu, Sep 15, 2016 at 03:24:37PM -0700, Sukadev Bhattiprolu escreveu:
> > > CPUs support a large number of performance monitoring events
Em Mon, Sep 19, 2016 at 08:37:53PM -0300, Arnaldo Carvalho de Melo escreveu:
> yeah, changing that typedef + true def to plain include
> makes it progress to the next failure, which is in cross compilation
> environments, such as using fedora 24 + the Android NDK to try to build
> a ARM android bi
Em Mon, Sep 19, 2016 at 09:02:58PM -0300, Arnaldo Carvalho de Melo escreveu:
> Em Mon, Sep 19, 2016 at 08:37:53PM -0300, Arnaldo Carvalho de Melo escreveu:
> > yeah, changing that typedef + true def to plain include
> > makes it progress to the next failure, which is in cross compilation
> > envir
On 20/09/16 03:31, Aneesh Kumar K.V wrote:
> For hugetlb to work with 4K page size, we need the MAX_ORDER to be more
> than 13. When switching from a 64K page size to 4K linux page size using
> make nconfig, we endup with a CONFIG_FORCE_MAX_ZONEORDER value of 9.
> This results in 16M hugepage to
christophe leroy writes:
> Le 19/09/2016 à 07:50, Aneesh Kumar K.V a écrit :
>>
>> Christophe Leroy writes:
>>> +#else
>>> +static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
>>> +{
>>> + BUG();
>>> +}
>>> +
>>> #endif
>>
>>
>> I was expecting that BUG will get removed in the next
christophe leroy writes:
>>
>>
>>> for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
>>> unsigned shift;
>>> unsigned pdshift;
>>> @@ -860,16 +807,31 @@ static int __init hugetlbpage_init(void)
>>> * if we have pdshift and shift value same, we don't
>>>
Balbir Singh writes:
> On 20/09/16 03:31, Aneesh Kumar K.V wrote:
>> For hugetlb to work with 4K page size, we need the MAX_ORDER to be more
>> than 13. When switching from a 64K page size to 4K linux page size using
>> make nconfig, we endup with a CONFIG_FORCE_MAX_ZONEORDER value of 9.
>> This
On 20/09/16 12:52, Aneesh Kumar K.V wrote:
> Balbir Singh writes:
>
>> On 20/09/16 03:31, Aneesh Kumar K.V wrote:
[...]
>>
>> Do we need the range to be 12 13?
>
> static inline bool hstate_is_gigantic(struct hstate *h)
> {
> return huge_page_order(h) >= MAX_ORDER;
> }
>
> We consider h
On 19/09/16 09:36 PM, Mathieu Malaterre wrote:
>
> Finally your dmesg looks odd since the line `[drm] Forcing AGP to PCI
> mode` comes only after the first error.
That isn't odd but the AGP->PCI(e) fallback mechanism working as
intended, trying AGP first and falling back to PCIe if AGP fails.
He
Michel,
Yes to both, however when I set radeon.agpmode=1 most of the time the
kernel freezes when booting. When I do get past that I get these errors:
rican-linux@Debian-G5:~$ dmesg |grep -e radeon -e drm
*[0.00] Kernel command line:
root=UUID=aeca9a67-31d7-4c4b-a0f8-4db328b33305 radeon.
On 15/09/16 19:03, Nicholas Piggin wrote:
> The mflr r10 instruction was left over saving of lr when the code used
> lr to branch to system_call_entry from the exception handler. That was
> changed by 6a404806d to use the count register. The value is never used
> now, so mflr can be removed, and
Nicholas Piggin writes:
> mtmsrd with L=1 only affects MSR_EE and MSR_RI bits, and we always
> know what state those bits are, so the kernel MSR does not need to be
> loaded when modifying them.
>
> mtmsrd is often in the critical execution path, so avoiding dependency
> on even L1 load is notica
This series adds support for using XZ compression in addition to gzip in the
kernel boot wrapper. Currently this is only enabled for 64bit Book3S processors
since it seems that some embedded platforms rely on uBoot (or similar) to
decompress the image rather than having the kernel decompress itself
The powerpc boot wrapper is compiled with a separate "bootcc" toolchain
rather than the toolchain used for the rest of the kernel. The main
problem with this is that the wrapper does not have access to the kernel
headers (without a lot of gross hacks). To get around this the required
headers are co
Most architectures allow the compression algorithm used to produced the
vmlinuz image to be selected as a kernel config option. In preperation
for supporting algorithms other than gzip in the powerpc boot wrapper
the makefile needs to be modified to use these config options.
Signed-off-by: Oliver
Currently the powerpc boot wrapper has its own wrapper around zlib to
handle decompressing gzipped kernels. The kernel decompressor library
functions now provide a generic interface that can be used in the pre-boot
environment. This allows boot wrappers to easily support different
compression algor
This code is no longer used and can be removed.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/boot/cuboot-c2k.c | 1 -
arch/powerpc/boot/gunzip_util.c | 204
arch/powerpc/boot/gunzip_util.h | 45 -
3 files changed, 250 deletions(-)
delete
This modifies the script so that the -Z option takes an argument to
specify the compression type. It can either be 'gz', 'xz' or 'none'.
The legazy --no-gzip and -z options are still supported and will set
the compression to none and gzip respectively, but they are not
documented.
Signed-off-by: O
This patch adds an option to use XZ compression for the kernel image.
Currently this is only enabled for PPC64 targets since the bulk of the
32bit platforms produce uboot images which do not use the wrapper.
Signed-off-by: Oliver O'Halloran
---
arch/powerpc/boot/Makefile | 3 +++
ar
Le 20/09/2016 à 04:28, Aneesh Kumar K.V a écrit :
christophe leroy writes:
Le 19/09/2016 à 07:50, Aneesh Kumar K.V a écrit :
Christophe Leroy writes:
+#else
+static void hugepd_free(struct mmu_gather *tlb, void *hugepte)
+{
+ BUG();
+}
+
#endif
I was expecting that BUG will get
On Tue, 20 Sep 2016 14:25:48 +1000
Michael Ellerman wrote:
> Nicholas Piggin writes:
>
> > mtmsrd with L=1 only affects MSR_EE and MSR_RI bits, and we always
> > know what state those bits are, so the kernel MSR does not need to be
> > loaded when modifying them.
> >
> > mtmsrd is often in the
On 16/09/16 19:47, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> This patch adds a function named power_enter_stop_lite() that can
> execute a stop instruction when ESL and EC bits are set to zero in the
> PSSCR. The function handles the wake-up from idle at the instruction
> immedi
On 20/09/16 12:43 PM, Herminio Hernandez, Jr. wrote:
>
> Yes to both, however when I set radeon.agpmode=1 most of the time the
> kernel freezes when booting. When I do get past that I get these errors:
[...]
> *[ 11.415769] [drm:.radeon_agp_init [radeon]] *ERROR* Illegal AGP
> Mode: 1 (valid 4
On Mon, 2016-22-08 at 01:56:57 UTC, Balbir Singh wrote:
> diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
> index a4db22f..f162e77 100644
> --- a/arch/powerpc/mm/fault.c
> +++ b/arch/powerpc/mm/fault.c
> @@ -404,6 +404,10 @@ good_area:
> (cpu_has_feature(CPU_FTR_NOE
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