s/MMU_STD_64/STD_MMU_64/
Fixes: 11ffc1cfa4c2 ("powerpc/mm/radix: Use STD_MMU_64 to properly
isolate hash related code")
Signed-off-by: Valentin Rothberg
---
I only compile tested this change. The issue has been detected with
scripts/checkkconfigsymbols.py
arch/powerpc/ke
Hi Arnd,
I see you didn't copy Greg on that series (that may explain his
confusion on the previous patch), do you expect me to take it
through the RTC tree? That is fine but I'd like some acks from him.
On 28/04/2016 at 00:34:14 +0200, Arnd Bergmann wrote :
> I ended up stuffing the two patch ser
On 2016/5/3 14:22, Tian, Kevin wrote:
From: Yongji Xie [mailto:xyj...@linux.vnet.ibm.com]
Sent: Tuesday, May 03, 2016 2:08 PM
On 2016/5/3 13:34, Tian, Kevin wrote:
From: Yongji Xie
Sent: Wednesday, April 27, 2016 8:43 PM
This patch enables mmapping MSI-X tables if hardware supports
interrupt
On 2016/5/3 14:11, Tian, Kevin wrote:
From: Yongji Xie [mailto:xyj...@linux.vnet.ibm.com]
Sent: Tuesday, May 03, 2016 1:52 PM
+
+ if (!(res->start & ~PAGE_MASK)) {
+ /*
+* Add shadow resource for sub-page bar whose mmio
+
On Fri, 29 Apr 2016 18:55:23 Alexey Kardashevskiy wrote:
> The pnv_ioda_pe struct keeps an array of peers. At the moment it is only
> used to link GPU and NPU for 2 purposes:
>
> 1. Access NPU quickly when configuring DMA for GPU - this was addressed
> in the previos patch by removing use of it as
On 03/05/16 16:29, Anshuman Khandual wrote:
> Change the vmemmap_populate function to detect device memory through
> to_vmemmap_altmap and then call generic the __vmmemap_alloc_block_buf
> function instead of vmemmap_alloc_block as the earlier can allocate
> physical memory from the device range
On 03/05/16 16:29, Anshuman Khandual wrote:
> From: Oliver O'Halloran
>
> The zone that contains the top of the memory will be either ZONE_NORMAL
> or ZONE_HIGHMEM depending on the kernel config. There are two functions
> in there which require this information and both of them use an #ifdef
>
On 03/05/16 16:29, Anshuman Khandual wrote:
> From: Oliver O'Halloran
>
> All the memory zones past TOP_ZONE are managed by generic mm code. Zone
> max PFN should be set to 0 instead of ~0UL since that's what the generic
> mm code expects. Without this, kernel assigns all pages into ZONE_DEVICE
On 03/05/16 16:29, Anshuman Khandual wrote:
> This is an example driver with little bit of kernel hack to test
> ZONE_DEVICE based device memory management on POWER.
>
I think this should be under CONFIG_DEBUG/CONFIG_DEBUG_VM or something
No?
If you are exporting the functions from the previou
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
CHECK_HMI_INTERRUPT is used to check for HMI's in reset vector. Move
the macro to a common location (exception-64s.h)
This patch does not change any functionality.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/include/asm/exception-64s.h | 18 ++
arch/powerpc/kernel/idle_powe
In the current code, when the thread wakes up in reset vector, some
of the state restore code and check for whether a thread needs to
branch to kvm is duplicated. Reorder the code such that this
duplication is avoided.
At a higher level this is what the change looks like-
Before this patch -
powe
CPU-idle related code like context save/restore functions idle_power7.S
can reused for adding stop instruction support. Move this
code to a new commonly accessible location.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/kernel/Makefile| 1 +
arch/powerpc/kernel/idle_power7.S
power7_powersave_common does common steps needed before entering idle
state and eventually changes MSR to MSR_IDLE and does rfid to
power7_enter_nap_mode.
Make it more generic by passing the rfid address as a function parameter.
Also make function name more generic.
Signed-off-by: Shreyas B. Prab
Move idle related macros to a common location asm/cpuidle.h so that
they can be used for stop instruction support.
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/include/asm/cpuidle.h | 27 +++
arch/powerpc/kernel/idle_power7.S | 26 --
2 files
pnv_init_idle_states discovers supported idle states from the
device tree and does the required initialization. Set power_save
function pointer only after this initialization is done
Signed-off-by: Shreyas B. Prabhy
---
arch/powerpc/platforms/powernv/idle.c | 3 +++
arch/powerpc/platforms/power
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added. This instruction replaces
instructions like nap, sleep, rvwinkle.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
PSSCR has fo
POWER ISA v3 defines a new idle processor core mechanism. In summary,
a) new instruction named stop is added.
b) new per thread SPR named PSSCR is added which controls the behavior
of stop instruction.
Supported idle states and value to be written to PSSCR register to enter
any idle stat
If hardware supports stop state, use the deepest stop state when
the cpu is offlined.
Signed-off-by: Shreyas B. Prabhu
---
arch/powerpc/platforms/powernv/idle.c| 15 +--
arch/powerpc/platforms/powernv/powernv.h | 1 +
arch/powerpc/platforms/powernv/smp.c | 4 +++-
3 files c
On 05/03/2016 01:34 PM, Balbir Singh wrote:
>
>
> On 03/05/16 16:29, Anshuman Khandual wrote:
>> Change the vmemmap_populate function to detect device memory through
>> to_vmemmap_altmap and then call generic the __vmmemap_alloc_block_buf
>> function instead of vmemmap_alloc_block as the earlier
On Thu 2016-04-28 15:44:41, Josh Poimboeuf wrote:
> Add the TIF_PATCH_PENDING thread flag to enable the new livepatch
> per-task consistency model for powerpc. The bit getting set indicates
> the thread has a pending patch which needs to be applied when the thread
> exits the kernel.
>
> The bit
Valentin Rothberg writes:
> s/MMU_STD_64/STD_MMU_64/
>
> Fixes: 11ffc1cfa4c2 ("powerpc/mm/radix: Use STD_MMU_64 to properly
> isolate hash related code")
> Signed-off-by: Valentin Rothberg
Reviewed-by: Aneesh Kumar K.V
> ---
>
> I only compile tested this change. The is
On Thu 2016-04-28 15:44:44, Josh Poimboeuf wrote:
> Once we have a consistency model, patches and their objects will be
> enabled and disabled at different times. For example, when a patch is
> disabled, its loaded objects' funcs can remain registered with ftrace
> indefinitely until the unpatchin
On Thu 2016-04-28 15:44:46, Josh Poimboeuf wrote:
> Move functions related to the actual patching of functions and objects
> into a new patch.c file.
>
> diff --git a/kernel/livepatch/patch.c b/kernel/livepatch/patch.c
> new file mode 100644
> index 000..782fbb5
> --- /dev/null
> +++ b/kernel/
Fixing a WARN_ON caused by smp_call_function_any() when irq is disabled,
because of changes made in the patch
('cpufreq: powernv: Ramp-down global pstate slower than local-pstate')
https://patchwork.ozlabs.org/patch/612058/
WARNING: CPU: 0 PID: 4 at kernel/smp.c:291
smp_call_function_single+0x170
Deleting pending gpstates->timer for the policy when global and local pstate
are equal while executing target_index(). This saves an unnecessary
irq call.
Signed-off-by: Akshay Adiga
---
Patch is based on Rafael's linux-next
drivers/cpufreq/powernv-cpufreq.c | 2 ++
1 file changed, 2 insertions(
Fixes are based on patch https://patchwork.ozlabs.org/patch/612058/ which is
in Rafael's linux-next.
- Patch [1] fixes WARN_ON in powernv_target_index()
- Patch [2] Deleting any pending timer to saves an unnecessary irq call
in powernv_target_index()
Akshay Adiga (2):
cpufreq: powernv: Move s
On Tuesday 03 May 2016 09:24:18 Alexandre Belloni wrote:
> Hi Arnd,
>
> I see you didn't copy Greg on that series (that may explain his
> confusion on the previous patch), do you expect me to take it
> through the RTC tree? That is fine but I'd like some acks from him.
Yes, that was a mistake. I
On Tuesday 03 May 2016 14:05:09 Michael Ellerman wrote:
> On Thu, 2016-04-28 at 00:34 +0200, Arnd Bergmann wrote:
>
> > The rtc-generic driver provides an architecture specific
> > wrapper on top of the generic rtc_class_ops abstraction,
> > and powerpc has another abstraction on top, which is a b
On 03-05-16, 15:10, Akshay Adiga wrote:
> Fixing a WARN_ON caused by smp_call_function_any() when irq is disabled,
> because of changes made in the patch
> ('cpufreq: powernv: Ramp-down global pstate slower than local-pstate')
> https://patchwork.ozlabs.org/patch/612058/
>
> WARNING: CPU: 0 PID:
On Tue, 3 May 2016, Petr Mladek wrote:
> On Thu 2016-04-28 15:44:41, Josh Poimboeuf wrote:
> > Add the TIF_PATCH_PENDING thread flag to enable the new livepatch
> > per-task consistency model for powerpc. The bit getting set indicates
> > the thread has a pending patch which needs to be applied w
On Fri, 2016-29-04 at 22:29:27 UTC, Unknown sender due to SPF wrote:
> In create_zero_mask() we have:
>
> addi%1,%2,-1
> andc%1,%1,%2
> popcntd %0,%1
>
> using the "r" constraint for %2. r0 is a valid register in the "r" set,
> but addi X,r0,X turns it into an li:
>
>
Fix PCI interrupt map definition from 2 to 4 cells. Move
interrupt-map and interrupt-map-mask and clone interrupts
into the pcie child nodes.
Signed-off-by: Alessio Igor Bogani
---
This patch requires
https://lists.ozlabs.org/pipermail/linuxppc-dev/2016-April/141980.html
to be applied cleanly.
On Thu, Apr 28, 2016 at 12:34 AM, Suraj Jitindar Singh
wrote:
> The validity of the property input argument to of_remove_property() is
> never checked within the function and thus it is possible to pass a null
> value. It happens that this will be picked up in __of_remove_property()
> as no matchi
Hi Viresh,
On 05/03/2016 05:19 PM, Viresh Kumar wrote:
On 03-05-16, 15:10, Akshay Adiga wrote:
Fixing a WARN_ON caused by smp_call_function_any() when irq is disabled,
because of changes made in the patch
('cpufreq: powernv: Ramp-down global pstate slower than local-pstate')
https://patchwork
The series is split from "[PATCH v8 00/45] powerpc/powernv: PCI hotplug
support". Another series (A) sent to linux-ppc-dev maillist as it's only
related to PowerPC. Besides, this series needs the firmware patches (B)
to work. Without the firmware patches, the PCI hotplug driver won't detect
and pop
The PCI slots are associated with root port or downstream ports
of the PCIe switch connected to root port. When adapter is hot
added to the PCI slot, it usually requests more IO or memory
resource from the directly connected parent bridge (port) and
update the bridge's windows accordingly. The reso
PE number for one particular PE can be allocated dynamically or
reserved according to the consumed M64 (64-bits prefetchable)
segments of the PE. The M64 segment can't be remapped to arbitrary
PE, meaning the PE number is determined according to the index
of the consumed M64 segment. As below figur
This supports releasing PEs dynamically. A reference count is
introduced to PE representing number of PCI devices associated
with the PE. The reference count is increased when PCI device
joins the PE and decreased when PCI device leaves the PE in
pnv_pci_release_device(). When the count becomes zer
This exports 4 functions, which base on the corresponding OPAL
APIs to get/set PCI slot status. Those functions are going to
be used by PowerNV PCI hotplug driver:
pnv_pci_get_device_tree()opal_get_device_tree()
pnv_pci_get_presence_state() opal_pci_get_presence_state()
pnv_pci_get_po
This exports of_detach_node() for PowerPC PowerNV PCI hotplug
driver. No functional changes introduced.
Signed-off-by: Gavin Shan
---
drivers/of/dynamic.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c
index c647bd1..75ce30d 100644
--- a/drivers/o
In current implementation, unflatten_dt_node() is called recursively
to unflatten device nodes in FDT blob. It's stress to limited stack
capacity, especially to adopt the function to unflatten device sub-tree
that possibly has multiple root nodes. In that case, we runs out of
stack and the system c
This renames unflatten_dt_node() to unflatten_dt_nodes() as it
populates multiple device nodes from FDT blob. No logical changes
introduced.
Signed-off-by: Gavin Shan
Acked-by: Rob Herring
---
drivers/of/fdt.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/dr
Each PHB maintains an array helping to translate 2-bytes Request
ID (RID) to PE# with the assumption that PE# takes one byte, meaning
that we can't have more than 256 PEs. However, pci_dn->pe_number
already had 4-bytes for the PE#.
This extends the PE# capacity for every PHB. After that, the PE nu
Currently, the PEs and their associated resources are assigned in
ppc_md.pcibios_fixup() except those used by SRIOV VFs. The function
is called for once after PCI probing and resources assignment is
completed. So it's obviously not hotplug friendly.
This creates PEs dynamically in pcibios_setup_br
The reset and poll functionality from (OPAL) firmware supports
PHB and PCI slot at same time. They are identified by ID. This
supports PCI slot ID by:
* Rename the argument name for opal_pci_reset() and opal_pci_poll()
accordingly
* Rename pnv_eeh_phb_poll() to pnv_eeh_poll() and adjust
pnv_pci_ioda_setup_opal_tce_kill() called by pnv_ioda_setup_dma()
to remap the TCE kill regiter. What's done in pnv_ioda_setup_dma()
will be covered in pcibios_setup_bridge() which is invoked on each
PCI bridge. It means we will possibly remap the TCE kill register
for multiple times and it's unnec
There is no parent bridge for root bus, meaning pcibios_setup_bridge()
isn't invoked for root bus. The PE for root bus is the ancestor of
other PEs in PELTV. It means we need PE for root bus populated before
all others.
This populates the PE for root bus in pcibios_setup_bridge() path
if it's not
The (OPAL) firmware might provide the PCI slot reset capability
which is identified by property "ibm,reset-by-firmware" on the
PCI slot associated device node.
This routes the reset request to firmware if "ibm,reset-by-firmware"
exists in the PCI slot device node. Otherwise, the reset is done
insi
Currently, PowerPC PowerNV platform utilizes ppc_md.pcibios_fixup(),
which is called for once after PCI probing and resource assignment
are completed, to allocate platform required resources for PCI devices:
PE#, IO and MMIO mapping, DMA address translation (TCE) table etc.
Obviously, it's not hotp
pnv_ioda_deconfigure_pe() is visible only when CONFIG_PCI_IOV is
enabled. The function will be used to tear down PE's associated
mapping in PCI hotplug path that doesn't depend on CONFIG_PCI_IOV.
This makes pnv_ioda_deconfigure_pe() visible and not depend on
CONFIG_PCI_IOV.
Signed-off-by: Gavin S
The function unflatten_dt_node() is called recursively to unflatten
device nodes and properties in the FDT blob. It looks complicated
and hard to be understood.
This splits the function into 3 functions: populate_properties(),
populate_node() and unflatten_dt_node(). populate_properties(),
which i
This adds standalone driver to support PCI hotplug for PowerPC PowerNV
platform that runs on top of skiboot firmware. The firmware identifies
hotpluggable slots and marked their device tree node with proper
"ibm,slot-pluggable" and "ibm,reset-by-firmware". The driver scans
device tree nodes to crea
This returns the allocate memory chunk, storing the unflattened device
tree, from of_fdt_unflatten_tree() so that memory chunk can be released
on demand in PowerNV PCI hotplug driver.
Signed-off-by: Gavin Shan
Acked-by: Rob Herring
---
drivers/of/fdt.c | 33 ++-
This adds one more argument to of_fdt_unflatten_tree() to specify
the parent node of the FDT blob that is going to be unflattened.
In the result, the function can be used to unflatten FDT blob that
represents device sub-tree in PowerNV PCI hotplug driver.
Cc: Jyri Sarha
Signed-off-by: Gavin Shan
On the PCI plugging event, PCI slot's subordinate devices are
scanned and their (IO and MMIO) resources are assigned. Platform
dependent resources (PE#, IO/MMIO/DMA windows) are allocated or
created on updating windows of the slot's upstream bridge.
This updates the windows of the hot plugged slot
On Tue, May 03, 2016 at 11:30:12AM +0200, Petr Mladek wrote:
> On Thu 2016-04-28 15:44:44, Josh Poimboeuf wrote:
> > Once we have a consistency model, patches and their objects will be
> > enabled and disabled at different times. For example, when a patch is
> > disabled, its loaded objects' funcs
The pdn (struct pci_dn) instances are allocated from memblock or
bootmem when creating PCI controller (hoses) in setup_arch(). PCI
hotplug, which will be supported by proceeding patches, releases
PCI device nodes and their corresponding pdn on unplugging event.
The memory chunks for pdn instances a
Hi Alexey,
On Fri, 29 Apr 2016 18:55:24 Alexey Kardashevskiy wrote:
> IBM POWER8 NVlink systems come with Tesla K40-ish GPUs each of which
> also has a couple of fast speed links (NVLink). The interface to links
> is exposed as an emulated PCI bridge which is included into the same
> IOMMU group a
This overrides pcibios_setup_bridge() that is called to update PCI
bridge windows when PCI resource assignment is completed, to assign
PE and setup various (resource) mapping for the PE in subsequent
patches.
Signed-off-by: Gavin Shan
Reviewed-by: Alexey Kardashevskiy
---
arch/powerpc/include/a
Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address sp
IMMR is now mapped by a fixed 512k page managed by the TLB miss
handler so it is not anymore necessary to PIN TLBs
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig.debug | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index d3fcf
Bootloader may have pinned some TLB entries so the kernel must
unpin them before flushing TLBs with tlbia otherwise pinned TLB
entries won't get flushed
Signed-off-by: Christophe Leroy
---
arch/powerpc/kernel/head_8xx.S | 18 ++
1 file changed, 10 insertions(+), 8 deletions(-)
d
Instead of using the first level page table to define mappings for
the linear memory space, we can use direct mapping from the TLB
handling routines. This has several advantages:
* No need to read the tables at each TLB miss
* No issue in 16k pages mode where the 1st level table maps 64 Mbytes
The
Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
* 0xfffdf000..0xf000 : fixmap
* 0xfde0..0xfe00 : consistent mem
* 0xfddf6000..0xfde0 : early ioremap
* 0xc900..0xfddf6000
On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.
We c
CONFIG_PIN_TLB maps IMMR area and the first 24 Mbytes of memory.
In some circunstances it might be more interesting to not map
IMMR and to map 32 Mbytes of memory instead.
Therefore we add config option CONFIG_PIN_TLB_IMMR to select if
IMMR shall be pinned or not, hence whether we pin 24 or 32 Mby
The purpose of this set of patches is to continue on TLB handling
optimisation on the 8xx with the handling of IMMR area as a
single 512k area instead of multiple 4k pages.
This set includes a rework of linear RAM mapping in order to not use
page table but direct linear mapping. The result is equi
When global and local pstate are equal in a powernv_target_index() call,
we don't queue a timer. But we may have timer already queued for future.
This could cause the timer to fire one additional time for no use.
Signed-off-by: Akshay Adiga
---
Patch is based on Rafael's linux-next
drivers/cpufr
Fix a WARN_ON caused by smp_call_function_any() when irq is disabled,
because of changes made in the patch ('cpufreq: powernv: Ramp-down
global pstate slower than local-pstate')
https://patchwork.ozlabs.org/patch/612058/
WARNING: CPU: 0 PID: 4 at kernel/smp.c:291
smp_call_function_single+0x170/0
Fixes are based on patch https://patchwork.ozlabs.org/patch/612058/ which
is in Rafael's linux-next.
- Patch [1] fixes WARN_ON in powernv_target_index()
- Patch [2] Deleting any pending timer to saves an unnecessary irq call
in powernv_target_index()
Akshay Adiga (2):
cpufreq: powernv: Move sm
This patch addresses a deadlock issue seen during EEH recovery
and is intended for 4.7.
Manoj N. Kumar (1):
cxlflash: Fix to resolve dead-lock during EEH recovery
drivers/scsi/cxlflash/superpipe.c | 15 +++
1 file changed, 15 insertions(+)
--
2.1.0
__
From: "Manoj N. Kumar"
When a cxlflash adapter goes into EEH recovery and multiple processes
(each having established its own context) are active, the EEH recovery
can hang if the processes attempt to recover in parallel. The symptom
logged after a couple of minutes is:
INFO: task eehd:48 blocke
From: Philippe Reynes
Date: Sun, 1 May 2016 17:08:08 +0200
> The ethtool api {get|set}_settings is deprecated.
> We move the gianfar driver to new api {get|set}_link_ksettings.
>
> Signed-off-by: Philippe Reynes
Applied.
___
Linuxppc-dev mailing lis
From: Philippe Reynes
Date: Sun, 1 May 2016 17:08:09 +0200
> The ethtool api {get|set}_settings is deprecated.
> We move the ucc driver to new api {get|set}_link_ksettings.
>
> Signed-off-by: Philippe Reynes
Applied.
___
Linuxppc-dev mailing list
Li
From: Philippe Reynes
Date: Sun, 1 May 2016 17:08:10 +0200
> The ethtool api {get|set}_settings is deprecated.
> We move the fs-enet driver to new api {get|set}_link_ksettings.
>
> Signed-off-by: Philippe Reynes
Applied.
___
Linuxppc-dev mailing lis
From: Philippe Reynes
Date: Sun, 1 May 2016 17:08:11 +0200
> The ethtool api {get|set}_settings is deprecated.
> We move the fec_mpc52xx driver to new api {get|set}_link_ksettings.
>
> Signed-off-by: Philippe Reynes
Applied.
___
Linuxppc-dev mailing
On Mon, Apr 25, 2016 at 10:12 PM, Yangbo Lu wrote:
> Hi Scott and Leo,
>
>
>> -Original Message-
>> From: linux-mmc-ow...@vger.kernel.org [mailto:linux-mmc-
>> ow...@vger.kernel.org] On Behalf Of Scott Wood
>> Sent: Saturday, April 23, 2016 7:23 AM
>> To: Yangbo Lu; linux-...@vger.kernel.o
This are my logs of experience on a 7750HD 2GB
I attached my dmesg radeon,drm and Xorg logs for gave better investigating to
the devs.
I see on Xorg.1.log where the radeon config was called there is a crash on
radeonsi
a drm:.si_dpm_set_power_state] *ERROR* too.
Hope it will help for have a
On 04/29/2016 09:55 AM, Dmitry Safonov wrote:
> On 04/29/2016 04:22 PM, Christopher Covington wrote:
>> On 04/28/2016 02:53 PM, Andy Lutomirski wrote:
>>> Also, at some point, possibly quite soon, x86 will want a way for
>>> user code to ask the kernel to map a specific vdso variant at a specific
>
On 04/27/2016 10:34 PM, Suraj Jitindar Singh wrote:
> After obtaining a property from of_find_property() and before calling
> of_remove_property() most code checks to ensure that the property
> returned from of_find_property() is not null. The previous patch
> moved this check to the start of the f
Hi Leo and Scott,
> -Original Message-
> From: Leo Li [mailto:pku@gmail.com]
> Sent: Wednesday, May 04, 2016 4:06 AM
> To: Yangbo Lu
> Cc: Scott Wood; Yang-Leo Li; linux-...@vger.kernel.org; linuxppc-
> d...@lists.ozlabs.org; linux-arm-ker...@lists.infradead.org; linux-
> ker...@vger.k
This patchset is used to fix a host version register bug in the T4240-R1.0-R2.0
eSDHC controller. To get the SoC version and revision, it's needed to add the
GUTS driver to access the global utilities registers.
So, the first four patches are to add the GUTS driver.
The following patches except th
Update Freescale DCFG compatible with 'fsl,-dcfg' instead
of 'fsl,ls1021a-dcfg' to include more chips such as ls1021a,
ls1043a, and ls2080a.
Signed-off-by: Yangbo Lu
---
Changes for v8:
- Added this patch
Changes for v9:
- Added a list for the possible compatibles
---
Documentati
Add the dts node for device configuration unit that provides
general purpose configuration and status for the device.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
---
Changes for v5:
- Added this patch
Changes for v6:
- None
Changes for v7:
- None
Changes for v8:
The global utilities block controls power management, I/O device
enabling, power-onreset(POR) configuration monitoring, alternate
function selection for multiplexed signals,and clock control.
This patch adds GUTS driver to manage and access global utilities
block.
Signed-off-by: Yangbo Lu
Acked-
Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
since it's used by not only PowerPC but also ARM. And add a specification
for 'little-endian' property.
Signed-off-by: Yangbo Lu
Acked-by: Scott Wood
Acked-by: Rob Herring
---
Changes for v4:
- Added this patch
Chang
Move mpc85xx.h to include/linux/fsl and rename it to svr.h as
a common header file. It has been used for mpc85xx and it will
be used for ARM-based SoC as well.
Signed-off-by: Yangbo Lu
Acked-by: Wolfram Sang
Acked-by: Stephen Boyd
Acked-by: Scott Wood
Acked-by: Joerg Roedel
---
Changes for v2
Add maintainer entry for Freescale SoC driver including
the QE library and the GUTS driver now. Also add maintainer
for QE library.
Signed-off-by: Yangbo Lu
---
Changes for v8:
- Added this patch
Changes for v9:
- Added linux-arm mail list
- Removed GUTS driver entry
---
The eSDHC of T4240-R1.0-R2.0 has incorrect vender version and spec version.
Acturally the right version numbers should be VVN=0x13 and SVN = 0x1.
This patch adds the GUTS driver support for eSDHC driver to get SVR(System
version register). And fix host version to avoid that incorrect version
number
On Tue, 3 May 2016 15:41:37 Gavin Shan wrote:
> This renames pcibios_{add,remove}_pci_devices() to avoid conflicts
> with names of the weak functions in PCI subsystem, which have the
> prefix "pcibios". No logical changes introduced.
I'm guessing this is just protecting against future weak PCI sub
On Tue, 3 May 2016 15:41:33 Gavin Shan wrote:
> Currently, there is one macro (TCE32_TABLE_SIZE) representing the
> TCE table size for one DMA32 segment. The constant representing
> the DMA32 segment size (1 << 28) is still used in the code.
>
> This defines PNV_IODA1_DMA32_SEGSIZE representing on
On Tue, 3 May 2016 15:41:27 Gavin Shan wrote:
> pnv_ioda_setup_pe_seg() associates the IO and M32 segments with the
> owner PE. The code mapping segments should be fixed and immune from
> logic changes introduced to pnv_ioda_setup_pe_seg().
>
> This moves the code mapping segments to helper pnv_io
On Tue, 3 May 2016 15:41:26 Gavin Shan wrote:
> There are two arrays for IO and M32 segment maps on every PHB.
> The index of the arrays are segment number and the value stored
> in the corresponding element is PE number, indicating the segment
> is assigned to the PE. Initially, all elements in th
I had a quick look at the surrounding code and couldn't see anything obvious
that would result in a behaviour change.
Reviewed-By: Alistair Popple
On Tue, 3 May 2016 15:41:25 Gavin Shan wrote:
> This changes the data type of PE number from "int" to "unsigned int"
> in order to match the fact PE
On Wed, May 04, 2016 at 01:31:04PM +1000, Alistair Popple wrote:
>On Tue, 3 May 2016 15:41:26 Gavin Shan wrote:
>> There are two arrays for IO and M32 segment maps on every PHB.
>> The index of the arrays are segment number and the value stored
>> in the corresponding element is PE number, indicati
On 03/05/16 15:41, Gavin Shan wrote:
This renames pcibios_{add,remove}_pci_devices() to avoid conflicts
with names of the weak functions in PCI subsystem, which have the
prefix "pcibios". No logical changes introduced.
Signed-off-by: Gavin Shan
Looks fine to me.
Reviewed-by: Andrew Donnellan
From: Ian Munsie
In the cxl kernel API, it is possible to create a context and start it
without allocating any interrupts. Since we assign or allocate the PSL
interrupt when allocating AFU interrupts this will lead to a situation
where we start the context with no means to take any faults.
The u
On Wed, May 04, 2016 at 02:10:47PM +1000, Alistair Popple wrote:
>On Tue, 3 May 2016 15:41:37 Gavin Shan wrote:
>> This renames pcibios_{add,remove}_pci_devices() to avoid conflicts
>> with names of the weak functions in PCI subsystem, which have the
>> prefix "pcibios". No logical changes introduc
On 03/05/16 15:41, Gavin Shan wrote:
This moves pci_find_bus_by_node() from arch/powerpc/platforms/
pseries/pci_dlpar.c to arch/powerpc/kernel/pci-hotplug.c so that
the function can be used by pSeries and PowerNV platform at the
same time. Also, below cleanup applied. No functional changes
introd
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