On 18-03-16, 20:28, Shilpasri G Bhat wrote:
> From: Michael Neuling
>
> "cpufreq: powernv: Remove cpu_to_chip_id() from hot-path" introduced
If the patch is already committed, you should provide its commit id as well.
> 'core_to_chip_map' array to cache the chip-id of all cores. Replace
> this
On 03/21/2016 03:48 PM, David Gibson wrote:
On Wed, Mar 09, 2016 at 05:29:04PM +1100, Alexey Kardashevskiy wrote:
NPU devices have their own TVT which means they are isolated and can be
passed to the userspace via VFIO. The first step is to create an IOMMU
group and attach devices there so does
On Sat, 2016-03-19 at 15:57 -0700, Linus Torvalds wrote:
> On Fri, Mar 18, 2016 at 5:07 AM, Michael Ellerman wrote:
> >
> > I couldn't convince git request-pull to generate a sane diffstat below, it
> > seems to be confused because I merged powerpc-4.5-4 into my next.
>
> Yes, if there are multipl
On 3/9/16 8:10 PM, Anshuman Khandual wrote:
This enables ARCH_WANT_GENERAL_HUGETLB for BOOK3S 64K in Kconfig.
It also implements a new function 'pte_huge' which is required by
function 'huge_pte_alloc' from generic VM. Existing BOOK3S 64K
specific functions 'huge_pte_alloc' and 'huge_pte_offset'
Enable the gpio-expander pca9672 on p2041rdb. The expander
has been present on the p2041rdb all along, however not in
the device tree.
Signed-off-by: Nora Björklund
---
arch/powerpc/boot/dts/fsl/p2041rdb.dts | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/powerpc/boot/dts/fsl/p20
On 03/19/2016 05:51 AM, Paul Mackerras wrote:
> On Fri, Mar 18, 2016 at 08:23:24PM +0530, Shreyas B Prabhu wrote:
>> Hi Paul,
>>
>> On 03/17/2016 04:45 PM, Paul Mackerras wrote:
>>> On Mon, Feb 29, 2016 at 05:52:59PM +0530, Shreyas B. Prabhu wrote:
Before entering any idle state which can re
On Monday, March 21, 2016 12:52:55 PM Viresh Kumar wrote:
> On 18-03-16, 20:28, Shilpasri G Bhat wrote:
> > From: Michael Neuling
> >
> > "cpufreq: powernv: Remove cpu_to_chip_id() from hot-path" introduced
>
> If the patch is already committed, you should provide its commit id as well.
>
> > '
From: Michael Neuling
"96c4726f01cd cpufreq: powernv: Remove cpu_to_chip_id() from hot-path"
introduced 'core_to_chip_map' array to cache the chip-id of all cores.
Replace this with per_cpu variable that stores the pointer to the
chip-array. This removes the linear lookup and provides a neater an
Create sysfs attributes to export throttle information in
/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats directory. The
newly added sysfs files are as follows:
1)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/turbo_stat
2)/sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/sub-turbo_stat
On Mon, 2016-03-21 at 11:48 +0100, Nora Björklund wrote:
> Enable the gpio-expander pca9672 on p2041rdb. The expander
> has been present on the p2041rdb all along, however not in
> the device tree.
>
> Signed-off-by: Nora Björklund
> ---
> arch/powerpc/boot/dts/fsl/p2041rdb.dts | 7 +++
> 1
Failure to synchronize the PSL timebase currently prevents the
initialization of the cxl card, thus rendering the card useless. This
is too extreme for a feature which is rarely used, if at all. No
hardware AFUs or software is currently using PSL timebase.
This patch still tries to synchronize the
Useful to be able to dump the kernels page tables to check permissions
and memory types - derived from arm64's implementation.
Add a debugfs file to check the page tables. To use this the PPC_PTDUMP
config option must be selected.
Signed-off-by: Rashmica Gupta
---
arch/powerpc/Kconfig.debug
Useful to be able to dump the kernel hash page table to check
which pages are hashed along with their sizes and other details.
Add a debugfs file to check the page tables. To use this the PPC_PTDUMP
config option must be selected.
Signed-off-by: Rashmica Gupta
---
arch/powerpc/mm/Makefile
On Mon, Mar 21, 2016 at 07:25:23PM +1100, Alexey Kardashevskiy wrote:
> On 03/21/2016 03:48 PM, David Gibson wrote:
> >On Wed, Mar 09, 2016 at 05:29:04PM +1100, Alexey Kardashevskiy wrote:
> >>NPU devices have their own TVT which means they are isolated and can be
> >>passed to the userspace via VF
Uff, lost cc: list. Added back. Some comments below.
On 03/21/2016 04:19 PM, David Gibson wrote:
On Fri, Mar 18, 2016 at 11:12:26PM +1100, Alexey Kardashevskiy wrote:
On March 15, 2016 17:29:26 David Gibson wrote:
On Fri, Mar 11, 2016 at 10:09:50AM +1100, Alexey Kardashevskiy wrote:
On 03/
In the configure_pe and configure_bridge RTAS calls, the spec states
that values of 9900-9905 can be returned, indicating that software
should delay for 10^x (where x is the last digit, i.e. 990x)
milliseconds and attempt the call again. Currently, the kernel doesn't
know about this, and respecting
On 03/22/2016 11:25 AM, David Gibson wrote:
On Mon, Mar 21, 2016 at 07:25:23PM +1100, Alexey Kardashevskiy wrote:
On 03/21/2016 03:48 PM, David Gibson wrote:
On Wed, Mar 09, 2016 at 05:29:04PM +1100, Alexey Kardashevskiy wrote:
NPU devices have their own TVT which means they are isolated and c
On 21-03-16, 22:29, Shilpasri G Bhat wrote:
> + create_throttle_sysfs = kcalloc(cpu_nr_cores(), sizeof(bool),
> + GFP_KERNEL);
> + if (!create_throttle_sysfs) {
> + kfree(chips);
> + return -ENOMEM;
> + }
> +
> for (i = 0
On Mon, 2016-03-07 at 19:09 +0530, Aneesh Kumar K.V wrote:
> PowerISA 3.0 introduce three pte bits with the below meaning
> 000 -> Normal Memory
> 001 -> Strong Access Order
> 010 -> Non idempotent I/O ( Also cache inhibited and guarded)
> 100 -> Tolerant I/O (Cache inhibited)
Which PTE are you
On Mon, 2016-03-07 at 19:09 +0530, Aneesh Kumar K.V wrote:
> _PAGE_PRIVILEGED means the page can be accessed only by kernel. This is done
> to keep pte bits similar to PowerISA 3.0 radix PTE format. User
> pages are now makred by clearing _PAGE_PRIVILEGED bit.
>
> Previously we allowed kernel to h
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