On Wed, Mar 09, 2016 at 09:21:30AM +0800, Zhao Qiang wrote:
> Add uqe_serial document to
> Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt
>
> Signed-off-by: Zhao Qiang
> ---
> Changes for v2
> - modify tx/rx-clock-name specification
> Changes for v3
> - NA
> Chan
On 2016/3/17 0:30, Alex Williamson wrote:
On Mon, 7 Mar 2016 15:48:35 +0800
Yongji Xie wrote:
When vfio passthrough a PCI device of which MMIO BARs
are smaller than PAGE_SIZE, guest will not handle the
mmio accesses to the BARs which leads to mmio emulations
in host.
This is because vfio wil
On Thu, 2016-03-17 at 16:33 -0400, Rob Clark wrote:
> On Thu, Mar 17, 2016 at 4:22 PM, Joe Perches wrote:
> > On Thu, 2016-03-17 at 15:43 -0300, Gustavo Padovan wrote:
> > > 2016-03-17 Gustavo Padovan :
> > > > 2016-03-17 Joe Perches :
> > > > > On Thu, 2016-03-17 at 14:30 -0300, Gustavo Padovan w
On Wed, 2016-03-16 at 07:24 +0100, luigi burdo wrote:
> hi Scott,
> the P5020 mmu is signed by the kernel no book3e found
I don't understand this sentence.
> kvm ppc64 crash if run by qemu.
You didn't show that log.
> in the kernel( 4.5 too)all is enabled we had a base .config by freescale/nix
On Mon, 7 Mar 2016 15:48:35 +0800
Yongji Xie wrote:
> When vfio passthrough a PCI device of which MMIO BARs
> are smaller than PAGE_SIZE, guest will not handle the
> mmio accesses to the BARs which leads to mmio emulations
> in host.
>
> This is because vfio will not allow to passthrough one
>
On Thu, Jan 14, 2016 at 08:45:04AM +0530, Mahesh J Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> When a guest is assigned to a core it converts the host Timebase (TB)
> into guest TB by adding guest timebase offset before entering into
> guest. During guest exit it restores the guest TB to host
When handling page faults, cxl_handle_page_fault() checks whether the page
should be accessible by userspace and have its _PAGE_USER access bit set.
_PAGE_USER should be set if the context's kernel flag isn't set, or if the
page falls outside of kernel memory.
However, the check currently uses the
Hi Paul,
On 03/17/2016 04:45 PM, Paul Mackerras wrote:
> On Mon, Feb 29, 2016 at 05:52:59PM +0530, Shreyas B. Prabhu wrote:
>> Before entering any idle state which can result in a state loss
>> we currently save the context in the stack before entering idle.
>> Encapsulate these steps in a macro I
On Wednesday 16 March 2016 13:12:36 Andy Shevchenko wrote:
>
> > I've also sent a patch that fixes the link error on ARM and that should
> > work on all other architectures too.
>
> In case of avr32 signalfd_read() fails. Does your patch help with it as well?
>
> P.S. Bisecting shows same culpri
On Thu, Mar 17, 2016 at 12:11 PM, Arnd Bergmann wrote:
> On Thursday 17 March 2016 12:06:40 Rob Herring wrote:
>> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
>> > b/Documentation/devicetree/bindings/soc/fsl/guts.txt
>> > similarity index 91%
>> > rename from Documentatio
On 2016/3/17 20:40, Alex Williamson wrote:
On Thu, 17 Mar 2016 19:28:34 +0800
Yongji Xie wrote:
On 2016/3/17 0:30, Alex Williamson wrote:
On Mon, 7 Mar 2016 15:48:35 +0800
Yongji Xie wrote:
When vfio passthrough a PCI device of which MMIO BARs
are smaller than PAGE_SIZE, guest will not
On Mon, 7 Mar 2016 15:48:36 +0800
Yongji Xie wrote:
> Current vfio-pci implementation disallows to mmap
> sub-page(size < PAGE_SIZE) MMIO BARs because these BARs' mmio
> page may be shared with other BARs.
>
> But we should allow to mmap these sub-page MMIO BARs if PCI
> resource allocator can
On Thu, Mar 17, 2016 at 12:57 PM, Rob Herring wrote:
> On Thu, Mar 17, 2016 at 12:11 PM, Arnd Bergmann wrote:
>> On Thursday 17 March 2016 12:06:40 Rob Herring wrote:
>>> > diff --git a/Documentation/devicetree/bindings/powerpc/fsl/guts.txt
>>> > b/Documentation/devicetree/bindings/soc/fsl/guts.
On Wed, Mar 16, 2016 at 06:51:56PM +0800, Yongji Xie wrote:
>
> Ping.
This is mainly VFIO stuff, and Alex had some security concerns, so I'm
not going to spend much time looking at this until he's satisfied.
When I do, I'll be looking hard at the resource_alignment kernel
parameter. I'm opposed
From: Gustavo Padovan
to_user_ptr() is a local macro defined by signal_32.c, rename it to
__to_user_ptr() as now we will have a global to_user_ptr() defined by
kernel.h that has a different meaning from this one.
Cc: Benjamin Herrenschmidt
Cc: Paul Mackerras
Cc: Michael Ellerman
Signed-off-by
On Thu, 17 Mar 2016 19:38:29 +0800
Yongji Xie wrote:
> On 2016/3/17 0:32, Alex Williamson wrote:
> > On Mon, 7 Mar 2016 15:48:38 +0800
> > Yongji Xie wrote:
> >
> >> This patch adds IOMMU_CAP_INTR_REMAP for IODA host bridge so that
> >> we can mmap MSI-X table in vfio driver.
> >>
> >> Signed
On Fri, Mar 18, 2016 at 5:11 AM, Michael Neuling wrote:
> On Fri, 2016-03-18 at 15:04 +1100, Michael Neuling wrote:
>
>> On Wed, 2016-02-03 at 01:11 +0530, Shilpasri G Bhat wrote:
>>
>
>> > cpu_to_chip_id() does a DT walk through to find out the chip id by
>> > taking a contended device tree lock.
2016-03-17 Joe Perches :
> On Thu, 2016-03-17 at 18:19 -0300, Gustavo Padovan wrote:
> > 2016-03-17 Joe Perches :
> > > On Thu, 2016-03-17 at 16:50 -0400, Rob Clark wrote:
> > > > On Thu, Mar 17, 2016 at 4:40 PM, Joe Perches wrote:
> > > []
> > > > > It's a name that seems like it should be a str
On Thu, 2016-14-01 at 03:14:58 UTC, Mahesh Salgaonkar wrote:
> From: Mahesh Salgaonkar
>
> OPAL_CALL wrapper code sticks the r1 (stack pointer) into PACAR1 purely
> for debugging purpose only. The power7_wakeup* functions relies on stack
> pointer saved in PACAR1. Any opal call made using opal wr
On Fri, Mar 18, 2016 at 09:37:57AM +1100, Gavin Shan wrote:
>On Thu, Mar 17, 2016 at 05:03:46PM -0300, Guilherme G. Piccoli wrote:
>>The domain/PHB field of PCI addresses has its value obtained from a
>>global variable, incremented each time a new domain (represented by
>>struct pci_controller) is
On Thu, Mar 17, 2016 at 10:58:42AM +1100, Balbir Singh wrote:
>
> To be honest I think my v6 works well, but I don't have complete confidence
> due to the lack of proper testing. livepatch samples plus some others I wrote
> and I one Petr wrote all work (calling patched from within patched),
I ha
On Wed, 2016-03-16 at 13:29 +1100, Cyril Bur wrote:
> +#ifdef CONFIG_PPC_BOOK3S
> + ld r10,PACAKMSR(r13)
> + li r9,MSR_RI
> + andcr11,r10,r9 /* Re-clear RI */
> + mtmsrd r11,1
> +#endif
Do you need that ? IE, mtmsrd with "1" will only update RI and EE, is
the
On Fri, Mar 18, 2016 at 12:28AM, Rob Herring wrote:
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Friday, March 18, 2016 12:28 AM
> To: Qiang Zhao
> Cc: o...@buserror.net; Yang-Leo Li ; Xiaobo Xie
> ; linux-ker...@vger.kernel.org;
> devicet...@vger.kernel.org;
On 15/03/16 12:27, Jiri Kosina wrote:
> On Mon, 14 Mar 2016, Michael Ellerman wrote:
>
>>> Move the logic to work out the kernel toc pointer into a header. This is
>>> a good cleanup, and also means we can use it elsewhere in future.
>>>
>>> Reviewed-by: Kamalesh Babulal
>>> Reviewed-by: Torsten
2016-03-17 Joe Perches :
> On Thu, 2016-03-17 at 16:50 -0400, Rob Clark wrote:
> > On Thu, Mar 17, 2016 at 4:40 PM, Joe Perches wrote:
> []
> > > It's a name that seems like it should be a straightforward
> > > cast of a kernel pointer to a __user pointer like:
> > >
> > > static inline void __u
Hi All,
Just for info: I successfully tested the latest Git kernel with the
patched PR KVM today. I booted a ubuntu MATE 16.04 LTS PowerPC live DVD
with a virtual Power Mac G3 machine today.
Screenshot: https://plus.google.com/115515624056477014971/posts/HAuxJT4WGPr
Have a nice day.
Cheers,
On 03/18/2016 01:00 AM, Gavin Shan wrote:
Apart from below minor issues to be fixed, it looks good to me.
Reviewed-by: Gavin Shan
Thanks for the review Gavin, I'll fix the else/if detail and send a v4.
+ } else {
+ if (machine_is(powernv)) {
+ prop
> [PATCH] cxl: Don't fail initialization if PSL timebase can't be
synced
Nice double negative.. How about:
cxl: Allow initialization on timebase sync failures
> Failure to synchronize the PSL timebase currently prevents the
> initialization of the cxl card, thus rendering the card useless. Thi
Hi Linus,
Please pull powerpc updates for 4.6:
The following changes since commit 9ab3ac233a8b4ffcc27c8475b83dee49fc46bc76:
powerpc/mm/hash: Clear the invalid slot information correctly (2016-02-22
19:27:39 +1100)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/
Commit 2def86a7200c
("hvc: Convert to using interrupts instead of opal events")
enabled the use of interrupts in the hvc_driver for OPAL platforms.
However on machines with more than one hvc console, any console after
the first will fail to register an interrupt handler in
notifier_add_irq() since
On Fri, 2016-03-18 at 15:04 +1100, Michael Neuling wrote:
> On Wed, 2016-02-03 at 01:11 +0530, Shilpasri G Bhat wrote:
>
> > cpu_to_chip_id() does a DT walk through to find out the chip id by
> > taking a contended device tree lock. This adds an unnecessary
> > overhead
> > in a hot path. So ins
The POWER8NVL chip has two CAPI ports. Configure the PSL to route
data to the port corresponding to the CAPP unit.
Signed-off-by: Philippe Bergheaud
---
V2:
- Complete rewrite after Mikey's review
drivers/misc/cxl/pci.c | 31 ++-
1 file changed, 30 insertions(+),
On 3/18/2016 8:12 AM, Robin Murphy wrote:
> Since we know for sure that swiotlb_to_phys is a no-op on arm64, it might be
> cleaner to simply not reference it at all. I suppose we could have some
> private local wrappers, e.g.:
>
> #define swiotlb_to_virt(addr) phys_to_virt((phys_addr_t)(addr))
>
Upcoming in-kernel VFIO acceleration needs different handling in real
and virtual modes which makes it hard to support both modes in
the same handler.
This creates a copy of kvmppc_rm_h_stuff_tce and kvmppc_rm_h_put_tce
in addition to the existing kvmppc_rm_h_put_tce_indirect.
This also fixes lin
Failure to synchronize the PSL timebase currently prevents the
initialization of the cxl card, thus rendering the card useless. This
is too extreme for a feature which is rarely used, if at all. No
hardware AFUs or software is currently using PSL timebase.
This patch still tries to synchronize the
On Thu, 2016-03-17 at 14:38 +0100, luigi burdo wrote:
> Hi Scott,
> this is my Kernel 4.5 dmesg
>
> dmesg | grep -i MMU
> [0.00] MMU: Supported page sizes
> [0.00] MMU: Book3E HW tablewalk not supported
> [0.00] mmu_features = 0x000a0010
> [0.00] MMU: Allocate
On 2016/3/16 22:10, Bjorn Helgaas wrote:
On Wed, Mar 16, 2016 at 06:51:56PM +0800, Yongji Xie wrote:
Ping.
This is mainly VFIO stuff, and Alex had some security concerns, so I'm
not going to spend much time looking at this until he's satisfied.
When I do, I'll be looking hard at the resource_a
On 17/03/16 01:58, Torsten Duwe wrote:
> On Wed, Mar 16, 2016 at 09:23:19PM +1100, Michael Ellerman wrote:
>> Sure. I'll try and get something working, though this merge window is not
>> starting well so I may not get time for a few weeks :)
> Do you already have something in mind?
> Can you give
On Thu, Mar 17, 2016 at 05:03:46PM -0300, Guilherme G. Piccoli wrote:
>The domain/PHB field of PCI addresses has its value obtained from a
>global variable, incremented each time a new domain (represented by
>struct pci_controller) is added on the system. The domain addition
>process happens during
On 16/03/16 21:56, Michael Ellerman wrote:
> We have a bunch of SLB related code in the tree which is there to handle
> dynamic VSIDs - but currently it's all disabled at compile time. The
> comments say "Keep that around for when we re-implement dynamic VSIDs".
>
> But that was over 10 years ago
On 2016/3/17 0:31, Alex Williamson wrote:
On Mon, 7 Mar 2016 15:48:34 +0800
Yongji Xie wrote:
The resource_alignment will releases memory resources
allocated by firmware so that kernel can reassign new
resources later on. But this will cause the problem
that no resources can be allocated by k
On 3/16/2016 7:56 AM, Julian Margetson wrote:
On 2/3/2016 6:59 PM, Alexander Graf wrote:
On 02/03/2016 11:54 PM, Julian Margetson wrote:
On 2/3/2016 6:20 PM, Alexander Graf wrote:
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 1
On Mon, Feb 29, 2016 at 05:52:59PM +0530, Shreyas B. Prabhu wrote:
> Before entering any idle state which can result in a state loss
> we currently save the context in the stack before entering idle.
> Encapsulate these steps in a macro IDLE_STATE_PREP. Move this
> and other macros to commonly acce
On Wed, 2016-03-16 at 22:45 +1100, Benjamin Herrenschmidt wrote:
> On Wed, 2016-03-16 at 13:29 +1100, Cyril Bur wrote:
> > +#ifdef CONFIG_PPC_BOOK3S
> > + ld r10,PACAKMSR(r13)
> > + li r9,MSR_RI
> > + andcr11,r10,r9 /* Re-clear RI */
> > + mtmsrd r11,1
> > +
On 2016/3/17 20:48, Alex Williamson wrote:
On Thu, 17 Mar 2016 19:38:29 +0800
Yongji Xie wrote:
On 2016/3/17 0:32, Alex Williamson wrote:
On Mon, 7 Mar 2016 15:48:38 +0800
Yongji Xie wrote:
This patch adds IOMMU_CAP_INTR_REMAP for IODA host bridge so that
we can mmap MSI-X table in vfio
On Thu, 2016-03-17 at 16:50 -0400, Rob Clark wrote:
> On Thu, Mar 17, 2016 at 4:40 PM, Joe Perches wrote:
[]
> > It's a name that seems like it should be a straightforward
> > cast of a kernel pointer to a __user pointer like:
> >
> > static inline void __user *to_user_ptr(void *p)
> > {
> >
On 2016/3/17 0:31, Alex Williamson wrote:
[cc+ Eric, Will]
On Mon, 7 Mar 2016 15:48:37 +0800
Yongji Xie wrote:
Current vfio-pci implementation disallows to mmap MSI-X
table in case that user get to touch this directly.
But we should allow to mmap these MSI-X tables if IOMMU
supports interru
On Fri, Mar 18, 2016 at 5:07 AM, Michael Ellerman wrote:
>
> I couldn't convince git request-pull to generate a sane diffstat below, it
> seems to be confused because I merged powerpc-4.5-4 into my next.
Yes, if there are multiple merge bases (particularly cross-merges, but
you can get it just fr
On 03/17/2016 12:06 PM, Rob Herring wrote:
> On Wed, Mar 09, 2016 at 06:08:49PM +0800, Yangbo Lu wrote:
>> Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
>> since it's used by not only PowerPC but also ARM. And add a specification
>> for 'little-endian' property.
>>
>> Signe
On Fri, 4 Dec 2015 17:57:44 +0100 Petr Mladek wrote:
> On Wed 2015-12-02 00:24:49, Jiri Kosina wrote:
> > On Fri, 27 Nov 2015, Petr Mladek wrote:
> >
> > > MN10300 has its own implementation for entering and exiting NMI
> > > handlers. It does not call nmi_enter() and nmi_exit(). Please, find
On Wed, Mar 09, 2016 at 06:08:49PM +0800, Yangbo Lu wrote:
> Move guts devicetree doc to Documentation/devicetree/bindings/soc/fsl/
> since it's used by not only PowerPC but also ARM. And add a specification
> for 'little-endian' property.
>
> Signed-off-by: Yangbo Lu
> ---
> Changes for v2:
>
Signed-off-by: Philippe Bergheaud
---
V2:
- New patch, added to patch set
arch/powerpc/include/asm/reg.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c4cb2ff..6a6de4a 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/
On 2/3/2016 6:59 PM, Alexander Graf wrote:
On 02/03/2016 11:54 PM, Julian Margetson wrote:
On 2/3/2016 6:20 PM, Alexander Graf wrote:
On 02/03/2016 11:15 PM, Julian Margetson wrote:
On 2/3/2016 4:43 PM, Alexander Graf wrote:
On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as i
Acked-by: Ian Munsie
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
Prefixing dma_to_phys and phys_to_dma API with swiotlb so that
they are no longer part of the DMA API. These APIs do not exist
on all architectures and breaks compatibility.
In preparation for the clean up, also make the ARCH implementation
known by defining swiotlb_phys_do_dma and swiotlb_dma_to_
On Wed, Mar 09, 2016 at 05:59:40PM +1100, Balbir Singh wrote:
>
> Changelog v6:
> 1. Experimental changes -- need loads of testing
> Based on the assumption that very far TOC and LR values
> indicate the call happened through a stub and the
> stub return works diff
On 2016/3/17 0:30, Alex Williamson wrote:
On Mon, 7 Mar 2016 15:48:36 +0800
Yongji Xie wrote:
Current vfio-pci implementation disallows to mmap
sub-page(size < PAGE_SIZE) MMIO BARs because these BARs' mmio
page may be shared with other BARs.
But we should allow to mmap these sub-page MMIO BA
On Wed, 16 Mar 2016 22:45:20 +1100
Benjamin Herrenschmidt wrote:
> On Wed, 2016-03-16 at 13:29 +1100, Cyril Bur wrote:
> > +#ifdef CONFIG_PPC_BOOK3S
> > + ld r10,PACAKMSR(r13)
> > + li r9,MSR_RI
> > + andcr11,r10,r9 /* Re-clear RI */
> > + mtmsrd r11,1
> > +
On Thu 2016-03-17 12:35:27, Andrew Morton wrote:
> On Fri, 4 Dec 2015 17:57:44 +0100 Petr Mladek wrote:
>
> > On Wed 2015-12-02 00:24:49, Jiri Kosina wrote:
> > > On Fri, 27 Nov 2015, Petr Mladek wrote:
> > >
> > > > MN10300 has its own implementation for entering and exiting NMI
> > > > handle
Hi Scott,
thank you very much for your infos are really appreciated
because let me know better this hardware
Kind regards
Luigi Burdo
AmigaOne X5000
beta Tester
> From: o...@buserror.net
> To: intermedi...@hotmail.com
> Date: Thu, 17 Mar 2016 11:23:10 -0500
> Subject: Re: Freescale P5020 cpu
Excerpts from Michael Neuling's message of 2016-03-15 11:27:29 +1100:
> I'm not happy with doing this unless we add something which advertises
> that it's synced or not to userspace.
In my opinion this is probably unnecessary (but it's not a bad idea
either and I'm happy for that to be added). As
On Wed, Mar 16, 2016 at 09:23:19PM +1100, Michael Ellerman wrote:
>
> Sure. I'll try and get something working, though this merge window is not
> starting well so I may not get time for a few weeks :)
Do you already have something in mind?
Can you give us a hint?
Torsten
On 03/17/2016 12:06 PM, Arnd Bergmann wrote:
> On Thursday 17 March 2016 12:01:01 Rob Herring wrote:
>> On Mon, Mar 14, 2016 at 05:45:43PM +, Scott Wood wrote:
>
> This makes the driver non-portable. Better identify the specific
> workarounds based on the compatible string for this dev
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