Paul Mackerras writes:
> On Mon, Feb 08, 2016 at 02:50:20PM +0530, Aneesh Kumar K.V wrote:
>> With next generation power processor, we are having a new mmu model
>> [1] that require us to maintain a different linux page table format.
>>
>> Inorder to support both current and future ppc64 systems
Paul Mackerras writes:
> On Mon, Feb 08, 2016 at 02:50:21PM +0530, Aneesh Kumar K.V wrote:
>> We move large part of fsl related code to hugetlbpage-book3e.c.
>> Only code movement. This also avoid #ifdef in the code.
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> I am wondering why you are adding #i
hello there,
[linux-4.5-rc4/arch/powerpc/boot/treeboot-akebono.c:90]: (style) A pointer can
not be negative so it is either pointless or an error to check if it is not.
Source code is
emac = finddevice("/plb/opb/ethernet");
if (emac> 0) {
but
void *emac;
Suggest new code
ema
On Tue, Feb 16, 2016 at 11:17:02AM +0530, Kamalesh Babulal wrote:
> * Petr Mladek [2016-02-12 17:45:17]:
> > int test(int a)
> > {
> > + printk("%d\n", a);
> > return ++a;
> > }
>
> Thanks. This workaround, helped to load sample livepatch module.
N.b.: if you try to livepatch/trace such
Paul Mackerras writes:
> On Mon, Feb 08, 2016 at 02:50:24PM +0530, Aneesh Kumar K.V wrote:
>> Also split pgalloc 64k and 4k headers
>>
>> Signed-off-by: Aneesh Kumar K.V
>
> In the subject: s/defintions/definitions/; s/seperate/separate/
>
> A more detailed patch description would be good. Apa
On Mon, 2016-02-15 at 11:44 +0530, Raghav Dogra wrote:
> Add support of suspend, resume function to support deep sleep.
> Also make sure of SRAM initialization during resume.
>
> Signed-off-by: Prabhakar Kushwaha
> Signed-off-by: Raghav Dogra
> ---
> Changes for v3: Replace spin_event_timeout()
On Tue, 2016-02-16 at 07:19 +, Raghav Dogra wrote:
>
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Tuesday, February 16, 2016 6:12 AM
> > To: Raghav Dogra ; Brian Norris
> > ; Li Yang
> > Cc: Raghav Dogra ; linux-...@lists.infradead.org;
> > linuxppc
Incredibly, IBM online documentation for EEH uses "extended error handling"
and "enhanced error handling" to refer to the same thing, in different
places. In other parts of the kernel, namely the EEH documentation (found
in Documentation/powerpc/eeh-pci-error-recovery.txt), it's referred to as
"ex
This patch series adds twelve new ELF core note sections which can
be used with existing ptrace request PTRACE_GETREGSET-SETREGSET for accessing
various transactional memory and other miscellaneous debug register sets on
powerpc platform.
Test Result (All tests pass on both BE and LE)
This patch adds twelve ELF core note sections for powerpc
architecture for various registers and register sets which
need to be accessed from ptrace interface and then gdb.
These additions include special purpose registers like TAR,
PPR, DSCR, TM running and checkpointed state for various
register
This patch creates a function flush_tmregs_to_thread which
will then be used by subsequent patches in this series. The
function checks for self tracing ptrace interface attempts
while in the TM context and logs appropriate warning message.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/includ
This patch enables in transaction NT_PRFPREG ptrace requests.
The function fpr_get which gets the running value of all FPR
registers and the function fpr_set which sets the running
value of of all FPR registers work on the running set of FPR
registers whose location will be different if transaction
This patch enables in transaction NT_PPC_VMX ptrace requests. The
function vr_get which gets the running value of all VMX registers
and the function vr_set which sets the running value of of all VMX
registers work on the running set of VMX registers whose location
will be different if transaction i
This patch enables in transaction NT_PPC_VSX ptrace requests. The
function vsr_get which gets the running value of all VSX registers
and the function vsr_set which sets the running value of of all VSX
registers work on the running set of VMX registers whose location
will be different if transaction
This patch splits gpr32_get, gpr32_set functions to accommodate
in transaction ptrace requests implemented in patches later in
the series.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/kernel/ptrace.c | 64 +++-
1 file changed, 51 insertions(+), 13 del
This patch enables support for TM checkpointed GPR register
set ELF core note NT_PPC_CGPR based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CGPR in powerpc
corresponding to the ELF core note section added. It
implements the
This patch enables support for TM checkpointed FPR register
set ELF core note NT_PPC_CFPR based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CFPR in powerpc
corresponding to the ELF core note section added. It
implements the
This patch enables support for TM checkpointed VMX register
set ELF core note NT_PPC_CVMX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVMX in powerpc
corresponding to the ELF core note section added. It
implements the
This patch enables support for TM checkpointed VSX register
set ELF core note NT_PPC_CVSX based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding a register set REGSET_CVSX in powerpc
corresponding to the ELF core note section added. It
implements the
This patch enables support for TM SPR state related ELF core
note NT_PPC_TM_SPR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding a register
set REGSET_TM_SPR in powerpc corresponding to the ELF core note
section added. It implements the get, se
This patch enables support for all three TM checkpointed SPR
states related ELF core note NT_PPC_TM_CTAR, NT_PPC_TM_CPPR,
NT_PPC_TM_CDSCR based ptrace requests through PTRACE_GETREGSET,
PTRACE_SETREGSET calls. This is achieved through adding three
new register sets REGSET_TM_CTAR, REGSET_TM_CPPR a
This patch enables support for running TAR, PPR, DSCR registers
related ELF core notes NT_PPPC_TAR, NT_PPC_PPR, NT_PPC_DSCR based
ptrace requests through PTRACE_GETREGSET, PTRACE_SETREGSET calls.
This is achieved through adding three new register sets REGSET_TAR,
REGSET_PPR, REGSET_DSCR in powerpc
This patch enables support for EBB state registers related
ELF core note NT_PPC_EBB based ptrace requests through
PTRACE_GETREGSET, PTRACE_SETREGSET calls. This is achieved
through adding one new register sets REGSET_EBB in powerpc
corresponding to the ELF core note sections added in this
regard. I
This patch moves 'reg.h' file from pmu 'ebb' sub directory
to the powerpc root directory to make all the register
definitions and instructions available for tests present
in other subsystems.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/pmu/ebb/ebb.c | 2 +-
tools/t
This patch adds SPR number for TAR, PPR, DSCR special
purpose registers. It also adds TM, VSX, VMX related
instructions which will then be used by patches later
in the series.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/reg.h | 21 +
1 file changed, 2
This patch adds ptrace interface test for EBB specific
registers. This also adds some generic ptrace interface
based helper functions to be used by other patches later
on in the series.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/Makefile | 3 +-
tools/testin
This patch adds ptrace interface test for GPR/FPR registers.
This adds ptrace interface based helper functions related to
GPR/FPR access and some assembly helper functions related to
GPR/FPR registers.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3
This patch adds ptrace interface test for GPR/FPR registers
inside TM context. This adds ptrace interface based helper
functions related to checkpointed GPR/FPR access.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/
This patch adds ptrace interface test for GPR/FPR registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-gpr.c | 319 +
2 files changed, 320 insertio
This patch adds ptrace interface test for TAR, PPR, DSCR
registers. This also adds ptrace interface based helper
functions related to TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../testing/selftests/powerpc/pt
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside TM context. This also adds ptrace
interface based helper functions related to checkpointed
TAR, PPR, DSCR register access.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.
This patch adds ptrace interface test for TAR, PPR, DSCR
registers inside suspended TM context.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 184 +
2 files changed, 185 i
This patch adds ptrace interface test for VSX, VMX registers.
This also adds ptrace interface based helper functions related
to VSX, VMX registers access. This also adds some assembly
helper functions related to VSX and VMX registers.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/
This patch adds ptrace interface test for VSX, VMX registers
inside TM context. This also adds ptrace interface based helper
functions related to chckpointed VSX, VMX registers access.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests
This patch adds ptrace interface test for VSX, VMX registers
inside suspended TM context.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 3 +-
.../selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c | 212 +
2 files changed, 214 inserti
This patch adds ptrace interface test for TM SPR registers. This
also adds ptrace interface based helper functions related to TM
SPR registers access.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/Makefile| 2 +-
.../selftests/powerpc/ptrace/ptrace-tm-spr.c
This patch adds a .gitignore file for all the executables in
the ptrace test directory thus making invisible with git status
query.
Signed-off-by: Anshuman Khandual
---
tools/testing/selftests/powerpc/ptrace/.gitignore | 11 +++
1 file changed, 11 insertions(+)
create mode 100644 tools/
On 2/16/16, Anshuman Khandual wrote:
> This patch enables in transaction NT_PRFPREG ptrace requests.
> The function fpr_get which gets the running value of all FPR
> registers and the function fpr_set which sets the running
> value of of all FPR registers work on the running set of FPR
> registers
On Mon, Feb 15, 2016 at 12:35:12PM -0800, Paul E. McKenney wrote:
> On Mon, Feb 15, 2016 at 06:58:32PM +, Will Deacon wrote:
> > On Mon, Feb 15, 2016 at 09:58:25AM -0800, Paul E. McKenney wrote:
> > > Some architectures provide local transitivity for a chain of threads doing
> > > writes separa
On Mon, 15 Feb 2016, Kirill A. Shutemov wrote:
> Just to make sure: commit 122afea9626a is fine, commit 61f5d698cc97
> crashes. Correct?
Correct.
___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev
On Mon, 2016-02-15 at 15:04 +0100, Torsten Duwe wrote:
> On Mon, Feb 15, 2016 at 09:27:15PM +1100, Michael Ellerman wrote:
> >
> > There is explicit code in gcc to check whether the TOC setup is needed and
> > only
>
> That's undestood. The claim here is: that check is incomplete, at least.
OK
On Tue, 2016-02-16 at 12:09 +0300, Denis Kirjanov wrote:
> On 2/16/16, Anshuman Khandual wrote:
> > This patch enables in transaction NT_PRFPREG ptrace requests.
> > The function fpr_get which gets the running value of all FPR
> > registers and the function fpr_set which sets the running
> > val
On Tue, 2016-02-16 at 19:52 +1100, Russell Currey wrote:
> Incredibly, IBM online documentation for EEH uses "extended error handling"
> and "enhanced error handling" to refer to the same thing, in different
> places. In other parts of the kernel, namely the EEH documentation (found
> in Document
* Torsten Duwe [2016-02-16 09:23:02]:
> On Tue, Feb 16, 2016 at 11:17:02AM +0530, Kamalesh Babulal wrote:
> > * Petr Mladek [2016-02-12 17:45:17]:
> > > int test(int a)
> > > {
> > > + printk("%d\n", a);
> > > return ++a;
> > > }
> >
> > Thanks. This workaround, helped to load sample livep
On Tue, Feb 16, 2016 at 09:09:16PM +1100, Michael Ellerman wrote:
> On Mon, 2016-02-15 at 15:04 +0100, Torsten Duwe wrote:
> > If you use "-pg -mprofile-kernel", gcc seems to forget that, and omits the
> > TOC
> > load, for a similar assembler calling sequence.
>
> That's by design.
Ah, ok.
> m
On Tue, Feb 16, 2016 at 04:00:30PM +0530, Kamalesh Babulal wrote:
> * Torsten Duwe [2016-02-16 09:23:02]:
> >
> > N.b.: if you try to livepatch/trace such a leaf function without
> > global dependencies, it will crash if that function got called with
> > a different TOC value. Hence this whole te
Excerpts from christophe lombard's message of 2016-02-16 07:53:54 +1100:
+void cxl_guest_reload_module(struct cxl *adapter)
+{
+struct platform_device *pdev;
+int afu;
+
+for (afu = 0; afu < adapter->slices; afu++)
+cxl_guest_remove_afu(adapter->afu[afu]);
Should we possibly
On Tue, Feb 16, 2016 at 09:53:20AM +, Will Deacon wrote:
> On Mon, Feb 15, 2016 at 12:35:12PM -0800, Paul E. McKenney wrote:
> > On Mon, Feb 15, 2016 at 06:58:32PM +, Will Deacon wrote:
> > > On Mon, Feb 15, 2016 at 09:58:25AM -0800, Paul E. McKenney wrote:
> > > > Some architectures provid
IBM online documentation for EEH uses "extended error handling" and
"enhanced error handling" to refer to the same thing, in different
places. The only place mentioning it as "enhanced error handling" in the
kernel is the MAINTAINERS file, and it's "extended" in some documentation.
IBM originally
Your patches seem to be under review in Patchwork, see
https://patchwork.ozlabs.org/patch/526275/
Why do you resend it ?
Christophe
Le 16/02/2016 07:37, Anshuman Khandual a écrit :
This is the continuation (rebased and reworked) of the series
posted at https://lkml.org/lkml/2014/5/5/15
On 02/15/2016 09:18 PM, Michael Ellerman wrote:
On Tue, 2016-12-01 at 04:40:20 UTC, Alexey Kardashevskiy wrote:
Quite often drivers set only "write" permission assuming that this
includes "read" permission as well and this works on plenty platforms.
However IODA2 is strict about this and produ
On Tue 2016-02-16 11:39:07, Torsten Duwe wrote:
> On Tue, Feb 16, 2016 at 04:00:30PM +0530, Kamalesh Babulal wrote:
> > * Torsten Duwe [2016-02-16 09:23:02]:
> > >
> > > N.b.: if you try to livepatch/trace such a leaf function without
> > > global dependencies, it will crash if that function got
On Mon, 15 Feb 2016 23:35:26 +0200
"Kirill A. Shutemov" wrote:
> On Mon, Feb 15, 2016 at 07:37:02PM +0100, Gerald Schaefer wrote:
> > On Mon, 15 Feb 2016 13:31:59 +0200
> > "Kirill A. Shutemov" wrote:
> >
> > > On Sat, Feb 13, 2016 at 12:58:31PM +0100, Sebastian Ott wrote:
> > > >
> > > > On S
On 02/15/2016 10:35 PM, Kirill A. Shutemov wrote:
>
> Is there any chance that I'll be able to trigger the bug using QEMU?
> Does anybody have an QEMU image I can use?
qemu/TCG on s390 does neither provide SMP nor large pages (only QEMU/KVM does)
so this will probably not help you here.
Christi
On Mon, Feb 15, 2016 at 9:58 AM, Paul E. McKenney
wrote:
>
> Two threads:
>
> int a, b;
>
> void thread0(void)
> {
> WRITE_ONCE(a, 1);
> smp_wmb();
> WRITE_ONCE(b, 2);
> }
>
> void thread1(void)
> {
>
On Tue, Feb 16, 2016 at 10:59:08AM -0800, Linus Torvalds wrote:
> On Mon, Feb 15, 2016 at 9:58 AM, Paul E. McKenney
> wrote:
> >
> > Two threads:
> >
> > int a, b;
> >
> > void thread0(void)
> > {
> > WRITE_ONCE(a, 1);
> > smp_wmb();
> >
From: Steven Royer
The ibmvmc driver is a device driver for the POWER Virtual Management
Channel virtual adapter on the PowerVM platform. It is used to
communicate with the hypervisor for virtualization management. It
provides both request/response and asynchronous message support through
the /
On Thu, 2016-02-11 at 17:16 +0100, Christophe Leroy wrote:
> This patch provides VIRT_CPU_ACCOUTING to PPC32 architecture.
> PPC32 doesn't have the PACA structure, so we use the task_info
> structure to store the accounting data.
>
> In order to reuse on PPC32 the PPC64 functions, all u64 data has
This series adds support for a CAPI card in a powerVM guest.
It requires firmware FW840 and an activation code for CAPI.
Note that pHyp only claims support for cxlflash, and not generic
support for FPGA CAPI accelerators. cxlflash uses the (slightly
modified) Nallatech card, so the memcopy AFU is
Move a few functions around to better separate code specific to
bare-metal environment from code which will be commonly used between
guest and bare-metal.
Code specific to bare-metal is meant to be in native.c or pci.c
only. It's basically anything which touches the capi p1 registers,
some p2 regi
Cxl kernel API was defining the process problem state area during
context initialization, making it possible to map the problem state
area before attaching the context. This won't work on a powerVM
guest. So force the logical behavior, like in userspace: attach first,
then map the problem state are
From: Christophe Lombard
Move around some functions which will be accessed from the bare-metal
and guest environments.
Code in native.c and pci.c is meant to be bare-metal specific.
Other files contain code which may be shared with guests.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic
Rename a few functions, changing the 'cxl_' prefix to either
'cxl_pci_' or 'cxl_native_', to make clear that the implementation is
bare-metal specific.
Those functions will have an equivalent implementation for a guest in
a later patch.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic
The backend API (in cxl.h) lists some low-level functions whose
implementation is different on bare-metal and in a guest. Each
environment implements its own functions, and the common code uses
them through function pointers, defined in cxl_backend_ops
Co-authored-by: Christophe Lombard
Signed-of
The context parameter when calling cxl_irq() should be strongly typed.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/cxl.h | 2 +-
drivers/misc/cxl/irq.c | 3 +--
2 files changed, 2 insertions(+),
A few functions are mostly common between bare-metal and guest and
just need minor tuning. To avoid crowding the backend API, introduce a
few 'if' based on the CPU being in HV mode.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian
The PSL interrupt is not going to be multiplexed in a guest, so an
interrupt will be allocated for it for each context. It will still be
the first interrupt found in the first interrupt range, but is treated
almost like any other AFU interrupt when creating/deleting the
context. Only the handler is
From: Christophe Lombard
The hcalls introduced for CAPI use a possible new value:
H_STATE (invalid state).
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
arch/powerpc/include/asm/hvcall.h | 1 +
1 file changed, 1 ins
From: Christophe Lombard
The hypervisor calls provide an interface with a coherent plaform
facility and function. It matches version 0.16 of the 'PAPR changes'
document.
The following hcalls are supported:
H_ATTACH_CA_PROCESSAttach a process element to a coherent platform
From: Christophe Lombard
Introduce sub-structures containing the bare-metal specific fields in
the structures describing the adapter (struct cxl) and AFU (struct
cxl_afu).
Update all their references.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lomb
From: Christophe Lombard
The new of.c file contains code to parse the device tree to find out
about CAPI adapters and AFUs.
guest.c implements the guest-specific callbacks for the backend API.
The process element ID is not known until the context is attached, so
we have to separate the context
From: Christophe Lombard
Filter out a few adapter parameters which don't make sense in a guest.
Document the changes.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
---
Documentation/ABI/testing/sysfs-class-cxl | 8 +++
drivers/misc/cxl/
Like on bare-metal, the cxl driver creates a virtual PHB and a pci
device for the AFU. The configuration space of the device is mapped to
the configuration record of the AFU.
Reuse the code defined in afu_cr_read8|16|32() when reading the
configuration space of the AFU device.
Even though the (vi
Add new entry point to scan the device tree at boot in a guest,
looking for CAPI devices.
Co-authored-by: Christophe Lombard
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/base.c | 25 +
1 file changed, 25 ins
From: Christophe Lombard
The new flash.c file contains the logic to flash a new image on the
adapter, through a hcall. It is an iterative process, with chunks of
data of 1M at a time. There are also 2 phases: write and verify. The
flash operation itself is driven from a user-land tool.
Once flas
From: Christophe Lombard
Check the AFU state whenever an API is called. The hypervisor may
issue a reset of the adapter when it detects a fault. When it happens,
it launches an error recovery which will either move the AFU to a
permanent failure state, or in the disabled state.
If the AFU is foun
From: Christophe Lombard
To ease debugging, add a few tracepoints around the CAPI hcalls.
Co-authored-by: Frederic Barrat
Signed-off-by: Frederic Barrat
Signed-off-by: Christophe Lombard
Acked-by: Ian Munsie
---
drivers/misc/cxl/hcalls.c | 9 +++
drivers/misc/cxl/trace.h | 193 ++
On Thu, 2016-02-04 at 14:56 +0100, Alessio Igor Bogani wrote:
> Hi,
>
> Can we change this code (from mpc85xx_ds.c)
>
> if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS-CAMP")) {
> mpic = mpic_alloc(NULL, 0,
> MPIC_NO_RESET |
> MPIC_BIG_ENDIAN |
> MPIC_SINGLE_DEST_CPU
On Tue, Feb 16, 2016 at 02:43:13PM -0600, Steven Royer wrote:
> From: Steven Royer
>
> The ibmvmc driver is a device driver for the POWER Virtual Management
> Channel virtual adapter on the PowerVM platform. It is used to
> communicate with the hypervisor for virtualization management. It
> pro
Hi David,
>
> [linux-4.5-rc4/arch/powerpc/boot/treeboot-akebono.c:90]: (style) A pointer
> can not be negative so it is either pointless or an error to check if it is
> not.
>
> Source code is
>
> emac = finddevice("/plb/opb/ethernet");
> if (emac> 0) {
>
> but
>
> void *emac;
>
> Su
On Tue, Feb 16, 2016 at 07:52:00PM +1100, Russell Currey wrote:
>Incredibly, IBM online documentation for EEH uses "extended error handling"
>and "enhanced error handling" to refer to the same thing, in different
>places. In other parts of the kernel, namely the EEH documentation (found
>in Docume
On Wed, Feb 17, 2016 at 09:49:08AM +1100, Gavin Shan wrote:
>On Tue, Feb 16, 2016 at 07:52:00PM +1100, Russell Currey wrote:
>>Incredibly, IBM online documentation for EEH uses "extended error handling"
>>and "enhanced error handling" to refer to the same thing, in different
>>places. In other par
On Tue, Feb 16, 2016 at 11:06:05PM +1100, Russell Currey wrote:
>IBM online documentation for EEH uses "extended error handling" and
>"enhanced error handling" to refer to the same thing, in different
>places. The only place mentioning it as "enhanced error handling" in the
>kernel is the MAINTAIN
From aff5a822e873522b9a3f355f816547394b452a64 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 16 Feb 2016 20:07:51 -0500
Subject: [PATCH 1/2] powerpc/perf/hv-24x7: Display domain indices in sysfs
To help users determine domains, display the domain indices used by the
kernel in sysfs
From 1520e8087d047e8ab6c1bda027a74eb33956e5a0 Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu
Date: Tue, 16 Feb 2016 22:21:25 -0500
Subject: [PATCH 2/2] powerpc/perf/24x7: Eliminate domain suffix in event names
The Physical Core events of the 24x7 PMU can be monitored across various
domains (p
On Wed, 2016-02-17 at 09:58 +1100, Gavin Shan wrote:
> On Wed, Feb 17, 2016 at 09:49:08AM +1100, Gavin Shan wrote:
> >
> > On Tue, Feb 16, 2016 at 07:52:00PM +1100, Russell Currey wrote:
> > >
> > > Incredibly, IBM online documentation for EEH uses "extended error
> > > handling"
> > > and "enhan
On Wed, 2016-02-17 at 10:49 +1100, Russell Currey wrote:
> On Wed, 2016-02-17 at 09:58 +1100, Gavin Shan wrote:
> >
> > On Wed, Feb 17, 2016 at 09:49:08AM +1100, Gavin Shan wrote:
> > >
> > >
> > > On Tue, Feb 16, 2016 at 07:52:00PM +1100, Russell Currey wrote:
> > > >
> > > >
> > > > Incredib
On Wed, 2016-02-17 at 10:49 +1100, Russell Currey wrote:
> On Wed, 2016-02-17 at 09:58 +1100, Gavin Shan wrote:
> > On Wed, Feb 17, 2016 at 09:49:08AM +1100, Gavin Shan wrote:
> > >
> > > On Tue, Feb 16, 2016 at 07:52:00PM +1100, Russell Currey wrote:
> > > >
> > > > Incredibly, IBM online docume
> "Tyrel" == Tyrel Datwyler writes:
>> Is there some reason you didn't carry the review tag over from this:
>>
>> http://mid.gmane.org/20160204084459.gw27...@c203.arch.suse.de
>>
>> ?
>>
>> James
Tyrel> The patch is slightly changed from v1. A define for AIX os type
Tyrel> was added as me
On Tue, 2016-02-16 at 14:57 +0100, Petr Mladek wrote:
>
> Some dugging has shown an Oops in the fucntion int_to_scsilun()
> called from ibmvscsi_queuecommand(). So, I rebooted and
> did the following test:
>
> $> echo ibmvscsi_queuecommand >/sys/kernel/debug/tracing/set_ftrace_filter
> $> echo fu
This series of patches rebases on powerpc/next branch, plus below additional
patches:
https://patchwork.ozlabs.org/patch/581315/ (PATCH[1/9] Richard's SRIOV EEH)
https://patchwork.ozlabs.org/patch/582639/ (PATCH[1/1] Gavin's EEH fix)
https://patchwork.ozlabs.org/patch/582093/
Each PHB has one instance of "struct pci_controller_ops", which
includes various callbacks called by PCI subsystem. In the definition
of this struct, some callbacks have explicit names for its arguments,
but the left don't have.
This adds all explicit names of the arguments to the callbacks in
"st
Currently, PowerPC PowerNV platform utilizes ppc_md.pcibios_fixup(),
which is called for once after PCI probing and resource assignment
are completed, to allocate platform required resources for PCI devices:
PE#, IO and MMIO mapping, DMA address translation (TCE) table etc.
Obviously, it's not hotp
This overrides pcibios_setup_bridge() that is called to update PCI
bridge windows when PCI resource assignment is completed, to assign
PE and setup various (resource) mapping for the PE in subsequent
patches.
Signed-off-by: Gavin Shan
---
arch/powerpc/include/asm/pci-bridge.h | 2 ++
arch/powerp
This renames the fields related to PE number in "struct pnv_phb"
for better reflecting of their usages as Alexey suggested. No
logical changes introduced.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 2 +-
arch/powerpc/platforms/powernv/pci-ioda.c| 58 +++
There are two arrays for IO and M32 segment maps on every PHB.
The index of the arrays are segment number and the value stored
in the corresponding element is PE number, indicating the segment
is assigned to the PE. Initially, all elements in those two arrays
are zeroes, meaning all segments are as
Currently, there is one macro (TCE32_TABLE_SIZE) representing the
TCE table size for one DMA32 segment. The constant representing
the DMA32 segment size (1 << 28) is still used in the code.
This defines PNV_IODA1_DMA32_SEGSIZE representing one DMA32
segment size. the TCE table size can be calcualt
On the PCI plugging event, PCI slot's subordinate devices are
scanned and their (IO and MMIO) resources are assigned. Platform
dependent resources (PE#, IO/MMIO/DMA windows) are allocated or
created on updating windows of the slot's upstream bridge.
This updates the windows of the hot plugged slot
This renames traverse_pci_devices() to pci_traverse_device_nodes().
The function traverses all subordinate device nodes of the specified
one. Also, below cleanup applied to the function. No logical changes
introduced.
* Rename "pre" to "fn".
* Avoid assignment in if condition reported from c
This drops unnecessary nested if statements in pnv_eeh_reset() to
improve the code readability. After the changes, the unused local
variable "ret" is dropped as well. No logical changes introduced.
Signed-off-by: Gavin Shan
---
arch/powerpc/platforms/powernv/eeh-powernv.c | 67 +-
1 - 100 of 153 matches
Mail list logo
