On Tue, 2015-11-10 at 10:50 -0600, Douglas Miller wrote:
> +{
> + unsigned long tskv;
> + struct task_struct *tsk;
> +
> + if (scanhex(&tskv)) {
> + procshow((struct task_struct *)tskv);
> + } else {
> + for_each_process(tsk) {
> + procsho
The xmon and cascade irq handlers must not run as threads.
pmac_pic_lock is already a raw_spinlock, but the irq flag
IRQF_NO_THREAD needs to be set as well.
Signed-off-by: John Ogness
---
arch/powerpc/platforms/powermac/pic.c |3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git
Since gpio1 is not a timer, it also should not use IRQF_TIMER.
Similar to commit ba461f094bab ("powerpc: Use IRQF_NO_SUSPEND not
IRQF_TIMER for non-timer interrupts").
Signed-off-by: John Ogness
---
drivers/macintosh/via-pmu.c |5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff
This patch modifies KVM to cause a guest exit with
KVM_EXIT_NMI instead of immediately delivering a 0x200
interrupt to guest upon machine check exception in
guest address. Exiting the guest enables QEMU to build
error log and deliver machine check exception to guest
OS (either via guest OS register
Andrew Donnellan writes:
> On 06/11/15 10:43, Michael Ellerman wrote:
>> If it's unused *and* broken then we should just remove it.
>
> Following some discussion with Ian and Vaibhav, we'd like to keep it at
> this stage - while there are no current AFUs which write to AFU config
> space, it wo
Aravinda Prasad writes:
> This patch modifies KVM to cause a guest exit with
> KVM_EXIT_NMI instead of immediately delivering a 0x200
> interrupt to guest upon machine check exception in
> guest address. Exiting the guest enables QEMU to build
> error log and deliver machine check exception to gu
Someone willing to take a look?
On Fri, Oct 02, 2015 at 06:51:59AM +0800, Wei Yang wrote:
>On Thu, Oct 01, 2015 at 02:15:45PM +1000, Michael Ellerman wrote:
>>On Thu, 2015-10-01 at 07:50 +0800, Wei Yang wrote:
>>> Hmm... some comments on this one? like it or not?
>>
>>It sounds like it's fixing a
Hi Gavin,
Sorry to have taken so long to resume these reviews!
> Currently, the IO and M32 segments are mapped to the corresponding
> PE based on the windows of the parent bridge of PE's primary bus.
> It's not going to work when the windows of root port or upstream
> port of the PCIe switch behi
On Wed, Nov 11, 2015 at 10:28:46PM +0530, Aravinda Prasad wrote:
> This patch modifies KVM to cause a guest exit with
> KVM_EXIT_NMI instead of immediately delivering a 0x200
> interrupt to guest upon machine check exception in
> guest address. Exiting the guest enables QEMU to build
> error log an
On Thu, Nov 12, 2015 at 01:24:19PM +1100, Daniel Axtens wrote:
> Aravinda Prasad writes:
>
> > This patch modifies KVM to cause a guest exit with
> > KVM_EXIT_NMI instead of immediately delivering a 0x200
> > interrupt to guest upon machine check exception in
> > guest address. Exiting the guest
Looks good.
Will hold off on an official review until I can test the series.
Regards,
Daniel
Gavin Shan writes:
> As we track M32 segment consumption, this introduces an array to
> the PHB to track the mapping between M64 segment and PE number.
> The information is going to be used to find M64
On Thursday 12 November 2015 09:08 AM, David Gibson wrote:
> On Thu, Nov 12, 2015 at 01:24:19PM +1100, Daniel Axtens wrote:
>> Aravinda Prasad writes:
>>
>>> This patch modifies KVM to cause a guest exit with
>>> KVM_EXIT_NMI instead of immediately delivering a 0x200
>>> interrupt to guest upon
On Thu, Nov 12, 2015 at 10:02:10AM +0530, Aravinda Prasad wrote:
>
>
> On Thursday 12 November 2015 09:08 AM, David Gibson wrote:
> > On Thu, Nov 12, 2015 at 01:24:19PM +1100, Daniel Axtens wrote:
> >> Aravinda Prasad writes:
> >>
> >>> This patch modifies KVM to cause a guest exit with
> >>> KV
On Thu, Nov 12, 2015 at 02:30:27PM +1100, Daniel Axtens wrote:
>Hi Gavin,
>
>Sorry to have taken so long to resume these reviews!
>
Thanks for your review, Daniel!
>> Currently, the IO and M32 segments are mapped to the corresponding
>> PE based on the windows of the parent bridge of PE's primary
> So, IIUC. Once the qemu pieces are in place as well it shouldn't
> change this behaviour: KVM will exit to qemu, qemu will log the error
> information (new), then reinject the MC to the guest which can still
> handle it as you describe above.
Ah, that makes *much* more sense now! Thanks for th
> - rc = opal_pci_reset(phb->opal_id,
> - OPAL_RESET_PHB_ERROR,
> - OPAL_ASSERT_RESET);
> - if (rc != OPAL_SUCCESS) {
> - pr_warn("%s: Failure %lld cle
On Thursday 12 November 2015 09:04 AM, David Gibson wrote:
> On Wed, Nov 11, 2015 at 10:28:46PM +0530, Aravinda Prasad wrote:
>> This patch modifies KVM to cause a guest exit with
>> KVM_EXIT_NMI instead of immediately delivering a 0x200
>> interrupt to guest upon machine check exception in
>> gu
Currently, if HV KVM is configured but PR KVM isn't, we don't include
a test to see whether we were interrupted in KVM guest context for the
set of interrupts which get delivered directly to the guest by hardware
if they occur in the guest. This includes things like program
interrupts.
However, t
On Thu, Nov 12, 2015 at 04:11:12PM +1100, Daniel Axtens wrote:
>> -rc = opal_pci_reset(phb->opal_id,
>> -OPAL_RESET_PHB_ERROR,
>> -OPAL_ASSERT_RESET);
>> -if (rc != OPAL_SUCCESS)
On Thu, Nov 05, 2015 at 12:12:39AM +1100, Gavin Shan wrote:
>In pnv_pci_reset_secondary_bus(), we should issue fundamental
>reset if any one subordinate device of the specified is requesting
^^
the specifie
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